diff options
Diffstat (limited to 'arch/arm/dts/zynqmp.dtsi')
-rw-r--r-- | arch/arm/dts/zynqmp.dtsi | 69 |
1 files changed, 45 insertions, 24 deletions
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 1332f5373f..755a4ed2e5 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -265,7 +265,7 @@ }; /* GDMA */ - fpd_dma_chan1: dma@fd500000 { + fpd_dma_chan1: dma-controller@fd500000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xfd500000 0x0 0x1000>; @@ -276,9 +276,10 @@ #stream-id-cells = <1>; iommus = <&smmu 0x14e8>; power-domains = <&zynqmp_firmware PD_GDMA>; + #dma-cells = <1>; }; - fpd_dma_chan2: dma@fd510000 { + fpd_dma_chan2: dma-controller@fd510000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xfd510000 0x0 0x1000>; @@ -289,9 +290,10 @@ #stream-id-cells = <1>; iommus = <&smmu 0x14e9>; power-domains = <&zynqmp_firmware PD_GDMA>; + #dma-cells = <1>; }; - fpd_dma_chan3: dma@fd520000 { + fpd_dma_chan3: dma-controller@fd520000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xfd520000 0x0 0x1000>; @@ -302,9 +304,10 @@ #stream-id-cells = <1>; iommus = <&smmu 0x14ea>; power-domains = <&zynqmp_firmware PD_GDMA>; + #dma-cells = <1>; }; - fpd_dma_chan4: dma@fd530000 { + fpd_dma_chan4: dma-controller@fd530000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xfd530000 0x0 0x1000>; @@ -315,9 +318,10 @@ #stream-id-cells = <1>; iommus = <&smmu 0x14eb>; power-domains = <&zynqmp_firmware PD_GDMA>; + #dma-cells = <1>; }; - fpd_dma_chan5: dma@fd540000 { + fpd_dma_chan5: dma-controller@fd540000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xfd540000 0x0 0x1000>; @@ -328,9 +332,10 @@ #stream-id-cells = <1>; iommus = <&smmu 0x14ec>; power-domains = <&zynqmp_firmware PD_GDMA>; + #dma-cells = <1>; }; - fpd_dma_chan6: dma@fd550000 { + fpd_dma_chan6: dma-controller@fd550000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xfd550000 0x0 0x1000>; @@ -341,9 +346,10 @@ #stream-id-cells = <1>; iommus = <&smmu 0x14ed>; power-domains = <&zynqmp_firmware PD_GDMA>; + #dma-cells = <1>; }; - fpd_dma_chan7: dma@fd560000 { + fpd_dma_chan7: dma-controller@fd560000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xfd560000 0x0 0x1000>; @@ -354,9 +360,10 @@ #stream-id-cells = <1>; iommus = <&smmu 0x14ee>; power-domains = <&zynqmp_firmware PD_GDMA>; + #dma-cells = <1>; }; - fpd_dma_chan8: dma@fd570000 { + fpd_dma_chan8: dma-controller@fd570000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xfd570000 0x0 0x1000>; @@ -367,6 +374,7 @@ #stream-id-cells = <1>; iommus = <&smmu 0x14ef>; power-domains = <&zynqmp_firmware PD_GDMA>; + #dma-cells = <1>; }; gic: interrupt-controller@f9010000 { @@ -396,7 +404,7 @@ * These dma channels, Users should ensure that these dma * Channels are allowed for non secure access. */ - lpd_dma_chan1: dma@ffa80000 { + lpd_dma_chan1: dma-controller@ffa80000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xffa80000 0x0 0x1000>; @@ -407,9 +415,10 @@ #stream-id-cells = <1>; iommus = <&smmu 0x868>; power-domains = <&zynqmp_firmware PD_ADMA>; + #dma-cells = <1>; }; - lpd_dma_chan2: dma@ffa90000 { + lpd_dma_chan2: dma-controller@ffa90000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xffa90000 0x0 0x1000>; @@ -420,9 +429,10 @@ #stream-id-cells = <1>; iommus = <&smmu 0x869>; power-domains = <&zynqmp_firmware PD_ADMA>; + #dma-cells = <1>; }; - lpd_dma_chan3: dma@ffaa0000 { + lpd_dma_chan3: dma-controller@ffaa0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xffaa0000 0x0 0x1000>; @@ -433,9 +443,10 @@ #stream-id-cells = <1>; iommus = <&smmu 0x86a>; power-domains = <&zynqmp_firmware PD_ADMA>; + #dma-cells = <1>; }; - lpd_dma_chan4: dma@ffab0000 { + lpd_dma_chan4: dma-controller@ffab0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xffab0000 0x0 0x1000>; @@ -446,9 +457,10 @@ #stream-id-cells = <1>; iommus = <&smmu 0x86b>; power-domains = <&zynqmp_firmware PD_ADMA>; + #dma-cells = <1>; }; - lpd_dma_chan5: dma@ffac0000 { + lpd_dma_chan5: dma-controller@ffac0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xffac0000 0x0 0x1000>; @@ -459,9 +471,10 @@ #stream-id-cells = <1>; iommus = <&smmu 0x86c>; power-domains = <&zynqmp_firmware PD_ADMA>; + #dma-cells = <1>; }; - lpd_dma_chan6: dma@ffad0000 { + lpd_dma_chan6: dma-controller@ffad0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xffad0000 0x0 0x1000>; @@ -472,9 +485,10 @@ #stream-id-cells = <1>; iommus = <&smmu 0x86d>; power-domains = <&zynqmp_firmware PD_ADMA>; + #dma-cells = <1>; }; - lpd_dma_chan7: dma@ffae0000 { + lpd_dma_chan7: dma-controller@ffae0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xffae0000 0x0 0x1000>; @@ -485,9 +499,10 @@ #stream-id-cells = <1>; iommus = <&smmu 0x86e>; power-domains = <&zynqmp_firmware PD_ADMA>; + #dma-cells = <1>; }; - lpd_dma_chan8: dma@ffaf0000 { + lpd_dma_chan8: dma-controller@ffaf0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xffaf0000 0x0 0x1000>; @@ -498,6 +513,7 @@ #stream-id-cells = <1>; iommus = <&smmu 0x86f>; power-domains = <&zynqmp_firmware PD_ADMA>; + #dma-cells = <1>; }; mc: memory-controller@fd070000 { @@ -527,12 +543,13 @@ interrupt-parent = <&gic>; interrupts = <0 57 4>, <0 57 4>; reg = <0x0 0xff0b0000 0x0 0x1000>; - clock-names = "pclk", "hclk", "tx_clk"; + clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; #address-cells = <1>; #size-cells = <0>; #stream-id-cells = <1>; iommus = <&smmu 0x874>; power-domains = <&zynqmp_firmware PD_ETH_0>; + resets = <&zynqmp_reset ZYNQMP_RESET_GEM0>; }; gem1: ethernet@ff0c0000 { @@ -541,12 +558,13 @@ interrupt-parent = <&gic>; interrupts = <0 59 4>, <0 59 4>; reg = <0x0 0xff0c0000 0x0 0x1000>; - clock-names = "pclk", "hclk", "tx_clk"; + clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; #address-cells = <1>; #size-cells = <0>; #stream-id-cells = <1>; iommus = <&smmu 0x875>; power-domains = <&zynqmp_firmware PD_ETH_1>; + resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>; }; gem2: ethernet@ff0d0000 { @@ -555,12 +573,13 @@ interrupt-parent = <&gic>; interrupts = <0 61 4>, <0 61 4>; reg = <0x0 0xff0d0000 0x0 0x1000>; - clock-names = "pclk", "hclk", "tx_clk"; + clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; #address-cells = <1>; #size-cells = <0>; #stream-id-cells = <1>; iommus = <&smmu 0x876>; power-domains = <&zynqmp_firmware PD_ETH_2>; + resets = <&zynqmp_reset ZYNQMP_RESET_GEM2>; }; gem3: ethernet@ff0e0000 { @@ -569,12 +588,13 @@ interrupt-parent = <&gic>; interrupts = <0 63 4>, <0 63 4>; reg = <0x0 0xff0e0000 0x0 0x1000>; - clock-names = "pclk", "hclk", "tx_clk"; + clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; #address-cells = <1>; #size-cells = <0>; #stream-id-cells = <1>; iommus = <&smmu 0x877>; power-domains = <&zynqmp_firmware PD_ETH_3>; + resets = <&zynqmp_reset ZYNQMP_RESET_GEM3>; }; gpio: gpio@ff0a0000 { @@ -820,7 +840,7 @@ uart0: serial@ff000000 { u-boot,dm-pre-reloc; - compatible = "cdns,uart-r1p12", "xlnx,xuartps"; + compatible = "xlnx,zynqmp-uart", "cdns,uart-r1p12"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 21 4>; @@ -831,7 +851,7 @@ uart1: serial@ff010000 { u-boot,dm-pre-reloc; - compatible = "cdns,uart-r1p12", "xlnx,xuartps"; + compatible = "xlnx,zynqmp-uart", "cdns,uart-r1p12"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 22 4>; @@ -854,7 +874,7 @@ reset-names = "usb_crst", "usb_hibrst", "usb_apbrst"; ranges; - dwc3_0: dwc3@fe200000 { + dwc3_0: usb@fe200000 { compatible = "snps,dwc3"; status = "disabled"; reg = <0x0 0xfe200000 0x0 0x40000>; @@ -886,7 +906,7 @@ reset-names = "usb_crst", "usb_hibrst", "usb_apbrst"; ranges; - dwc3_1: dwc3@fe300000 { + dwc3_1: usb@fe300000 { compatible = "snps,dwc3"; status = "disabled"; reg = <0x0 0xfe300000 0x0 0x40000>; @@ -961,6 +981,7 @@ }; zynqmp_dpsub: display@fd4a0000 { + u-boot,dm-pre-reloc; compatible = "xlnx,zynqmp-dpsub-1.7"; status = "disabled"; reg = <0x0 0xfd4a0000 0x0 0x1000>, |