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-rw-r--r--arch/arm/dts/Makefile1
-rw-r--r--arch/arm/dts/socfpga_arria10_chameleonv3.dtsi (renamed from arch/arm/dts/socfpga_arria10_chameleonv3.dts)0
-rw-r--r--arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi12
-rw-r--r--arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts5
-rw-r--r--arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi4
-rw-r--r--arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts2
-rw-r--r--arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi4
-rw-r--r--arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts2
-rw-r--r--arch/arm/dts/tegra114.dtsi2
-rw-r--r--arch/arm/dts/tegra124.dtsi2
10 files changed, 30 insertions, 4 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9d647b9639..7a577deb50 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -442,6 +442,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_agilex_socdk.dtb \
socfpga_arria5_secu1.dtb \
socfpga_arria5_socdk.dtb \
+ socfpga_arria10_chameleonv3_270_2.dtb \
socfpga_arria10_chameleonv3_270_3.dtb \
socfpga_arria10_chameleonv3_480_2.dtb \
socfpga_arria10_socdk_sdmmc.dtb \
diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3.dts b/arch/arm/dts/socfpga_arria10_chameleonv3.dtsi
index 988cc44543..988cc44543 100644
--- a/arch/arm/dts/socfpga_arria10_chameleonv3.dts
+++ b/arch/arm/dts/socfpga_arria10_chameleonv3.dtsi
diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi
new file mode 100644
index 0000000000..05b4485cf3
--- /dev/null
+++ b/arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2022 Google LLC
+ */
+#include "socfpga_arria10_chameleonv3_480_2_handoff.h"
+#include "socfpga_arria10-handoff.dtsi"
+#include "socfpga_arria10_handoff_u-boot.dtsi"
+#include "socfpga_arria10_mercury_aa1-u-boot.dtsi"
+
+&fpga_mgr {
+ altr,bitstream = "fpga-270-2.itb";
+};
diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts b/arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts
new file mode 100644
index 0000000000..bef0280212
--- /dev/null
+++ b/arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts
@@ -0,0 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2022 Google LLC
+ */
+#include "socfpga_arria10_chameleonv3.dtsi"
diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi
index e789d49657..a7aa17b220 100644
--- a/arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi
+++ b/arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi
@@ -6,3 +6,7 @@
#include "socfpga_arria10-handoff.dtsi"
#include "socfpga_arria10_handoff_u-boot.dtsi"
#include "socfpga_arria10_mercury_aa1-u-boot.dtsi"
+
+&fpga_mgr {
+ altr,bitstream = "fpga-270-3.itb";
+};
diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts b/arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts
index 5f40af6eb9..bef0280212 100644
--- a/arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts
+++ b/arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts
@@ -2,4 +2,4 @@
/*
* Copyright 2022 Google LLC
*/
-#include "socfpga_arria10_chameleonv3.dts"
+#include "socfpga_arria10_chameleonv3.dtsi"
diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi
index 7bbcc471c5..82a94894ea 100644
--- a/arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi
+++ b/arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi
@@ -6,3 +6,7 @@
#include "socfpga_arria10-handoff.dtsi"
#include "socfpga_arria10_handoff_u-boot.dtsi"
#include "socfpga_arria10_mercury_aa1-u-boot.dtsi"
+
+&fpga_mgr {
+ altr,bitstream = "fpga-480-2.itb";
+};
diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts b/arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts
index 5f40af6eb9..bef0280212 100644
--- a/arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts
+++ b/arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts
@@ -2,4 +2,4 @@
/*
* Copyright 2022 Google LLC
*/
-#include "socfpga_arria10_chameleonv3.dts"
+#include "socfpga_arria10_chameleonv3.dtsi"
diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi
index 8932ea3afd..68ee7f3165 100644
--- a/arch/arm/dts/tegra114.dtsi
+++ b/arch/arm/dts/tegra114.dtsi
@@ -312,7 +312,7 @@
};
pwm: pwm@7000a000 {
- compatible = "nvidia,tegra114-pwm", "nvidia,tegra20-pwm";
+ compatible = "nvidia,tegra114-pwm";
reg = <0x7000a000 0x100>;
#pwm-cells = <2>;
clocks = <&tegra_car TEGRA114_CLK_PWM>;
diff --git a/arch/arm/dts/tegra124.dtsi b/arch/arm/dts/tegra124.dtsi
index f473ba28e4..ffec9cae09 100644
--- a/arch/arm/dts/tegra124.dtsi
+++ b/arch/arm/dts/tegra124.dtsi
@@ -377,7 +377,7 @@
};
pwm: pwm@7000a000 {
- compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm";
+ compatible = "nvidia,tegra124-pwm", "nvidia,tegra114-pwm";
reg = <0x7000a000 0x100>;
#pwm-cells = <2>;
clocks = <&tegra_car TEGRA124_CLK_PWM>;