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-rw-r--r--arch/arm/mach-imx/imx8/Kconfig6
-rw-r--r--arch/arm/mach-imx/imx8/ahab.c8
-rw-r--r--arch/arm/mach-imx/imx8/cpu.c96
-rw-r--r--arch/arm/mach-imx/imx8m/soc.c3
-rw-r--r--arch/arm/mach-imx/mx6/Kconfig30
-rw-r--r--arch/arm/mach-imx/mx7/clock.c22
6 files changed, 96 insertions, 69 deletions
diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig
index 9d1f73dfc7..04b9729109 100644
--- a/arch/arm/mach-imx/imx8/Kconfig
+++ b/arch/arm/mach-imx/imx8/Kconfig
@@ -65,6 +65,11 @@ config TARGET_COLIBRI_IMX8X
select BOARD_LATE_INIT
select IMX8QXP
+config TARGET_APALIS_IMX8X
+ bool "Support Apalis iMX8X module"
+ select BOARD_LATE_INIT
+ select IMX8QXP
+
config TARGET_DENEB
bool "Support i.MX8QXP Capricorn Deneb board"
select BOARD_LATE_INIT
@@ -98,6 +103,7 @@ source "board/freescale/imx8qxp_mek/Kconfig"
source "board/advantech/imx8qm_rom7720_a1/Kconfig"
source "board/toradex/apalis-imx8/Kconfig"
source "board/toradex/colibri-imx8x/Kconfig"
+source "board/toradex/apalis-imx8x/Kconfig"
source "board/siemens/capricorn/Kconfig"
config IMX_SNVS_SEC_SC
diff --git a/arch/arm/mach-imx/imx8/ahab.c b/arch/arm/mach-imx/imx8/ahab.c
index 5dbe1d56e0..600a1108ce 100644
--- a/arch/arm/mach-imx/imx8/ahab.c
+++ b/arch/arm/mach-imx/imx8/ahab.c
@@ -14,6 +14,7 @@
#include <asm/arch/sys_proto.h>
#include <asm/arch/image.h>
#include <console.h>
+#include <cpu_func.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -92,7 +93,7 @@ int authenticate_os_container(ulong addr)
sizeof(struct container_hdr) +
i * sizeof(struct boot_img_t));
- debug("img %d, dst 0x%x, src 0x%x, size 0x%x\n",
+ debug("img %d, dst 0x%x, src 0x%lux, size 0x%x\n",
i, (uint32_t) img->dst, img->offset + addr, img->size);
memcpy((void *)img->dst, (const void *)(img->offset + addr),
@@ -106,7 +107,7 @@ int authenticate_os_container(ulong addr)
/* Find the memreg and set permission for seco pt */
err = sc_rm_find_memreg(-1, &mr, s, e);
if (err) {
- printf("Error: can't find memreg for image load address 0x%x, error %d\n", img->dst, err);
+ printf("Error: can't find memreg for image load address 0x%llx, error %d\n", img->dst, err);
ret = -ENOMEM;
goto exit;
}
@@ -302,10 +303,11 @@ static int confirm_close(void)
static int do_ahab_close(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
+ int confirmed = argc >= 2 && !strcmp(argv[1], "-y");
int err;
u16 lc;
- if (!confirm_close())
+ if (!confirmed && !confirm_close())
return -EACCES;
err = sc_seco_chip_info(-1, &lc, NULL, NULL, NULL);
diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c
index 38b2c0926f..911d6a51d1 100644
--- a/arch/arm/mach-imx/imx8/cpu.c
+++ b/arch/arm/mach-imx/imx8/cpu.c
@@ -260,14 +260,30 @@ static int get_owned_memreg(sc_rm_mr_t mr, sc_faddr_t *addr_start,
return -EINVAL;
}
+__weak void board_mem_get_layout(u64 *phys_sdram_1_start,
+ u64 *phys_sdram_1_size,
+ u64 *phys_sdram_2_start,
+ u64 *phys_sdram_2_size)
+{
+ *phys_sdram_1_start = PHYS_SDRAM_1;
+ *phys_sdram_1_size = PHYS_SDRAM_1_SIZE;
+ *phys_sdram_2_start = PHYS_SDRAM_2;
+ *phys_sdram_2_size = PHYS_SDRAM_2_SIZE;
+}
+
phys_size_t get_effective_memsize(void)
{
sc_rm_mr_t mr;
sc_faddr_t start, end, end1, start_aligned;
+ u64 phys_sdram_1_start, phys_sdram_1_size;
+ u64 phys_sdram_2_start, phys_sdram_2_size;
int err;
- end1 = (sc_faddr_t)PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE;
+ board_mem_get_layout(&phys_sdram_1_start, &phys_sdram_1_size,
+ &phys_sdram_2_start, &phys_sdram_2_size);
+
+ end1 = (sc_faddr_t)phys_sdram_1_start + phys_sdram_1_size;
for (mr = 0; mr < 64; mr++) {
err = get_owned_memreg(mr, &start, &end);
if (!err) {
@@ -277,29 +293,35 @@ phys_size_t get_effective_memsize(void)
continue;
/* Find the memory region runs the U-Boot */
- if (start >= PHYS_SDRAM_1 && start <= end1 &&
+ if (start >= phys_sdram_1_start && start <= end1 &&
(start <= CONFIG_SYS_TEXT_BASE &&
end >= CONFIG_SYS_TEXT_BASE)) {
- if ((end + 1) <= ((sc_faddr_t)PHYS_SDRAM_1 +
- PHYS_SDRAM_1_SIZE))
- return (end - PHYS_SDRAM_1 + 1);
+ if ((end + 1) <=
+ ((sc_faddr_t)phys_sdram_1_start +
+ phys_sdram_1_size))
+ return (end - phys_sdram_1_start + 1);
else
- return PHYS_SDRAM_1_SIZE;
+ return phys_sdram_1_size;
}
}
}
- return PHYS_SDRAM_1_SIZE;
+ return phys_sdram_1_size;
}
int dram_init(void)
{
sc_rm_mr_t mr;
sc_faddr_t start, end, end1, end2;
+ u64 phys_sdram_1_start, phys_sdram_1_size;
+ u64 phys_sdram_2_start, phys_sdram_2_size;
int err;
- end1 = (sc_faddr_t)PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE;
- end2 = (sc_faddr_t)PHYS_SDRAM_2 + PHYS_SDRAM_2_SIZE;
+ board_mem_get_layout(&phys_sdram_1_start, &phys_sdram_1_size,
+ &phys_sdram_2_start, &phys_sdram_2_size);
+
+ end1 = (sc_faddr_t)phys_sdram_1_start + phys_sdram_1_size;
+ end2 = (sc_faddr_t)phys_sdram_2_start + phys_sdram_2_size;
for (mr = 0; mr < 64; mr++) {
err = get_owned_memreg(mr, &start, &end);
if (!err) {
@@ -308,12 +330,13 @@ int dram_init(void)
if (start > end)
continue;
- if (start >= PHYS_SDRAM_1 && start <= end1) {
+ if (start >= phys_sdram_1_start && start <= end1) {
if ((end + 1) <= end1)
gd->ram_size += end - start + 1;
else
gd->ram_size += end1 - start;
- } else if (start >= PHYS_SDRAM_2 && start <= end2) {
+ } else if (start >= phys_sdram_2_start &&
+ start <= end2) {
if ((end + 1) <= end2)
gd->ram_size += end - start + 1;
else
@@ -324,8 +347,8 @@ int dram_init(void)
/* If error, set to the default value */
if (!gd->ram_size) {
- gd->ram_size = PHYS_SDRAM_1_SIZE;
- gd->ram_size += PHYS_SDRAM_2_SIZE;
+ gd->ram_size = phys_sdram_1_size;
+ gd->ram_size += phys_sdram_2_size;
}
return 0;
}
@@ -358,11 +381,15 @@ int dram_init_banksize(void)
sc_rm_mr_t mr;
sc_faddr_t start, end, end1, end2;
int i = 0;
+ u64 phys_sdram_1_start, phys_sdram_1_size;
+ u64 phys_sdram_2_start, phys_sdram_2_size;
int err;
- end1 = (sc_faddr_t)PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE;
- end2 = (sc_faddr_t)PHYS_SDRAM_2 + PHYS_SDRAM_2_SIZE;
+ board_mem_get_layout(&phys_sdram_1_start, &phys_sdram_1_size,
+ &phys_sdram_2_start, &phys_sdram_2_size);
+ end1 = (sc_faddr_t)phys_sdram_1_start + phys_sdram_1_size;
+ end2 = (sc_faddr_t)phys_sdram_2_start + phys_sdram_2_size;
for (mr = 0; mr < 64 && i < CONFIG_NR_DRAM_BANKS; mr++) {
err = get_owned_memreg(mr, &start, &end);
if (!err) {
@@ -370,7 +397,7 @@ int dram_init_banksize(void)
if (start > end) /* Small memory region, no use it */
continue;
- if (start >= PHYS_SDRAM_1 && start <= end1) {
+ if (start >= phys_sdram_1_start && start <= end1) {
gd->bd->bi_dram[i].start = start;
if ((end + 1) <= end1)
@@ -381,7 +408,7 @@ int dram_init_banksize(void)
dram_bank_sort(i);
i++;
- } else if (start >= PHYS_SDRAM_2 && start <= end2) {
+ } else if (start >= phys_sdram_2_start && start <= end2) {
gd->bd->bi_dram[i].start = start;
if ((end + 1) <= end2)
@@ -398,10 +425,10 @@ int dram_init_banksize(void)
/* If error, set to the default value */
if (!i) {
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+ gd->bd->bi_dram[0].start = phys_sdram_1_start;
+ gd->bd->bi_dram[0].size = phys_sdram_1_size;
+ gd->bd->bi_dram[1].start = phys_sdram_2_start;
+ gd->bd->bi_dram[1].size = phys_sdram_2_size;
}
return 0;
@@ -411,11 +438,16 @@ static u64 get_block_attrs(sc_faddr_t addr_start)
{
u64 attr = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN;
+ u64 phys_sdram_1_start, phys_sdram_1_size;
+ u64 phys_sdram_2_start, phys_sdram_2_size;
+
+ board_mem_get_layout(&phys_sdram_1_start, &phys_sdram_1_size,
+ &phys_sdram_2_start, &phys_sdram_2_size);
- if ((addr_start >= PHYS_SDRAM_1 &&
- addr_start <= ((sc_faddr_t)PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)) ||
- (addr_start >= PHYS_SDRAM_2 &&
- addr_start <= ((sc_faddr_t)PHYS_SDRAM_2 + PHYS_SDRAM_2_SIZE)))
+ if ((addr_start >= phys_sdram_1_start &&
+ addr_start <= ((sc_faddr_t)phys_sdram_1_start + phys_sdram_1_size)) ||
+ (addr_start >= phys_sdram_2_start &&
+ addr_start <= ((sc_faddr_t)phys_sdram_2_start + phys_sdram_2_size)))
return (PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE);
return attr;
@@ -424,14 +456,20 @@ static u64 get_block_attrs(sc_faddr_t addr_start)
static u64 get_block_size(sc_faddr_t addr_start, sc_faddr_t addr_end)
{
sc_faddr_t end1, end2;
+ u64 phys_sdram_1_start, phys_sdram_1_size;
+ u64 phys_sdram_2_start, phys_sdram_2_size;
+
+ board_mem_get_layout(&phys_sdram_1_start, &phys_sdram_1_size,
+ &phys_sdram_2_start, &phys_sdram_2_size);
+
- end1 = (sc_faddr_t)PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE;
- end2 = (sc_faddr_t)PHYS_SDRAM_2 + PHYS_SDRAM_2_SIZE;
+ end1 = (sc_faddr_t)phys_sdram_1_start + phys_sdram_1_size;
+ end2 = (sc_faddr_t)phys_sdram_2_start + phys_sdram_2_size;
- if (addr_start >= PHYS_SDRAM_1 && addr_start <= end1) {
+ if (addr_start >= phys_sdram_1_start && addr_start <= end1) {
if ((addr_end + 1) > end1)
return end1 - addr_start;
- } else if (addr_start >= PHYS_SDRAM_2 && addr_start <= end2) {
+ } else if (addr_start >= phys_sdram_2_start && addr_start <= end2) {
if ((addr_end + 1) > end2)
return end2 - addr_start;
}
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 9bca5bf972..5df8e17510 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -210,6 +210,9 @@ int dram_init(void)
else
gd->ram_size = sdram_size;
+ /* also update the SDRAM size in the mem_map used externally */
+ imx8m_mem_map[5].size = sdram_size;
+
#ifdef PHYS_SDRAM_2_SIZE
gd->ram_size += PHYS_SDRAM_2_SIZE;
#endif
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index 0646b7369c..513d007ce7 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -128,30 +128,8 @@ config TARGET_APALIS_IMX6
imply CMD_DM
imply CMD_SATA
-config TARGET_ARISTAINETOS2
- bool "aristainetos2"
- depends on MX6DL
- select BOARD_LATE_INIT
- select SYS_I2C_MXC
- select MXC_UART
- select FEC_MXC
- select DM
- imply CMD_SATA
- imply CMD_DM
-
-config TARGET_ARISTAINETOS2B
- bool "Support aristainetos2-revB"
- depends on MX6DL
- select BOARD_LATE_INIT
- select SYS_I2C_MXC
- select MXC_UART
- select FEC_MXC
- select DM
- imply CMD_SATA
- imply CMD_DM
-
-config TARGET_ARISTAINETOS2BCSL
- bool "Support aristainetos2-revB CSL"
+config TARGET_ARISTAINETOS2C
+ bool "Support aristainetos2-revC"
depends on MX6DL
select BOARD_LATE_INIT
select SYS_I2C_MXC
@@ -161,8 +139,8 @@ config TARGET_ARISTAINETOS2BCSL
imply CMD_SATA
imply CMD_DM
-config TARGET_ARISTAINETOS2C
- bool "Support aristainetos2-revC"
+config TARGET_ARISTAINETOS2CCSLB
+ bool "Support aristainetos2-revC CSL"
depends on MX6DL
select BOARD_LATE_INIT
select SYS_I2C_MXC
diff --git a/arch/arm/mach-imx/mx7/clock.c b/arch/arm/mach-imx/mx7/clock.c
index aba9461d92..6a1bad855e 100644
--- a/arch/arm/mach-imx/mx7/clock.c
+++ b/arch/arm/mach-imx/mx7/clock.c
@@ -916,7 +916,7 @@ void mxs_set_lcdclk(uint32_t base_addr, uint32_t freq)
}
if (5 == i) {
- printf("Fail to set rate to %dkhz", freq);
+ printf("Fail to set rate to %u kHz", freq);
return;
}
}
@@ -936,7 +936,7 @@ void mxs_set_lcdclk(uint32_t base_addr, uint32_t freq)
}
if (best == 0) {
- printf("Fail to set rate to %dkhz", freq);
+ printf("Fail to set rate to %u kHz", freq);
return;
}
@@ -1115,17 +1115,17 @@ int do_mx7_showclocks(struct cmd_tbl *cmdtp, int flag, int argc,
printf("\n");
- printf("IPG %8d kHz\n", mxc_get_clock(MXC_IPG_CLK) / 1000);
- printf("UART %8d kHz\n", mxc_get_clock(MXC_UART_CLK) / 1000);
+ printf("IPG %8u kHz\n", mxc_get_clock(MXC_IPG_CLK) / 1000);
+ printf("UART %8u kHz\n", mxc_get_clock(MXC_UART_CLK) / 1000);
#ifdef CONFIG_MXC_SPI
- printf("CSPI %8d kHz\n", mxc_get_clock(MXC_CSPI_CLK) / 1000);
+ printf("CSPI %8u kHz\n", mxc_get_clock(MXC_CSPI_CLK) / 1000);
#endif
- printf("AHB %8d kHz\n", mxc_get_clock(MXC_AHB_CLK) / 1000);
- printf("AXI %8d kHz\n", mxc_get_clock(MXC_AXI_CLK) / 1000);
- printf("DDR %8d kHz\n", mxc_get_clock(MXC_DDR_CLK) / 1000);
- printf("USDHC1 %8d kHz\n", mxc_get_clock(MXC_ESDHC_CLK) / 1000);
- printf("USDHC2 %8d kHz\n", mxc_get_clock(MXC_ESDHC2_CLK) / 1000);
- printf("USDHC3 %8d kHz\n", mxc_get_clock(MXC_ESDHC3_CLK) / 1000);
+ printf("AHB %8u kHz\n", mxc_get_clock(MXC_AHB_CLK) / 1000);
+ printf("AXI %8u kHz\n", mxc_get_clock(MXC_AXI_CLK) / 1000);
+ printf("DDR %8u kHz\n", mxc_get_clock(MXC_DDR_CLK) / 1000);
+ printf("USDHC1 %8u kHz\n", mxc_get_clock(MXC_ESDHC_CLK) / 1000);
+ printf("USDHC2 %8u kHz\n", mxc_get_clock(MXC_ESDHC2_CLK) / 1000);
+ printf("USDHC3 %8u kHz\n", mxc_get_clock(MXC_ESDHC3_CLK) / 1000);
return 0;
}
generated by cgit v1.2.3 (git 2.39.0) at 2024-08-09 23:24:33 +0300