4 files changed, 13 insertions, 13 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index c038a6ddb0..8cc82f80b4 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -1208,8 +1208,8 @@ config FSL_LAW
 	help
 		Use Freescale common code for Local Access Window
 
-config SECURE_BOOT
-	bool	"Secure Boot"
+config NXP_ESBC
+	bool	"NXP_ESBC"
 	help
 		Enable Freescale Secure Boot feature. Normally selected
 		by defconfig. If unsure, do not change.
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index cac9280790..c2b2ef2041 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -38,7 +38,7 @@
 #ifdef CONFIG_FSL_CAAM
 #include <fsl_sec.h>
 #endif
-#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_FSL_CORENET)
+#if defined(CONFIG_NXP_ESBC) && defined(CONFIG_FSL_CORENET)
 #include <asm/fsl_pamu.h>
 #include <fsl_secboot_err.h>
 #endif
@@ -440,7 +440,7 @@ ulong cpu_init_f(void)
 #ifdef CONFIG_SYS_DCSRBAR_PHYS
 	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 #endif
-#if defined(CONFIG_SECURE_BOOT) && !defined(CONFIG_SYS_RAMBOOT)
+#if defined(CONFIG_NXP_ESBC) && !defined(CONFIG_SYS_RAMBOOT)
 	struct law_entry law;
 #endif
 #ifdef CONFIG_ARCH_MPC8548
@@ -460,7 +460,7 @@ ulong cpu_init_f(void)
 	disable_tlb(14);
 	disable_tlb(15);
 
-#if defined(CONFIG_SECURE_BOOT) && !defined(CONFIG_SYS_RAMBOOT)
+#if defined(CONFIG_NXP_ESBC) && !defined(CONFIG_SYS_RAMBOOT)
 	/* Disable the LAW created for NOR flash by the PBI commands */
 	law = find_law(CONFIG_SYS_PBI_FLASH_BASE);
 	if (law.index != -1)
@@ -963,7 +963,7 @@ int cpu_init_r(void)
 	fman_enet_init();
 #endif
 
-#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_FSL_CORENET)
+#if defined(CONFIG_NXP_ESBC) && defined(CONFIG_FSL_CORENET)
 	if (pamu_init() < 0)
 		fsl_secboot_handle_error(ERROR_ESBC_PAMU_INIT);
 #endif
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index dbc705388c..38e907f5ad 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -33,7 +33,7 @@
 #endif
 
 #if !defined(CONFIG_SPL) && !defined(CONFIG_SYS_RAMBOOT) && \
-	!defined(CONFIG_SECURE_BOOT) && !defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
+	!defined(CONFIG_NXP_ESBC) && !defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 #define NOR_BOOT
 #endif
 
@@ -123,7 +123,7 @@ _start_e500:
 #endif
 
 
-#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_E500MC) && \
+#if defined(CONFIG_NXP_ESBC) && defined(CONFIG_E500MC) && \
 	!defined(CONFIG_E6500)
 	/* ISBC uses L2 as stack.
 	 * Disable L2 cache here so that u-boot can enable it later
@@ -467,7 +467,7 @@ nexti:	mflr	r1		/* R1 = our PC */
 	blt	1b
 
 #if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB) && !defined(MINIMAL_SPL) && \
-	!defined(CONFIG_SECURE_BOOT)
+	!defined(CONFIG_NXP_ESBC)
 /*
  * TLB entry for debuggging in AS1
  * Create temporary TLB entry in AS0 to handle debug exception
@@ -1065,7 +1065,7 @@ create_init_ram_area:
 		0xffc00000, MAS3_SX|MAS3_SW|MAS3_SR, \
 		0, r6
 
-#elif !defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SECURE_BOOT)
+#elif !defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_NXP_ESBC)
 	/* create a temp mapping in AS = 1 for Flash mapping
 	 * created by PBL for ISBC code
 	 */
@@ -1080,7 +1080,7 @@ create_init_ram_area:
  * and for targets with CONFIG_SPL like T1, T2, T4, only for
  * u-boot-spl i.e. CONFIG_SPL_BUILD
  */
-#elif defined(CONFIG_RAMBOOT_PBL) && defined(CONFIG_SECURE_BOOT) && \
+#elif defined(CONFIG_RAMBOOT_PBL) && defined(CONFIG_NXP_ESBC) && \
 	(!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
 	/* create a temp mapping in AS = 1 for mapping CONFIG_SYS_MONITOR_BASE
 	 * to L3 Address configured by PBL for ISBC code
diff --git a/arch/powerpc/cpu/mpc8xxx/law.c b/arch/powerpc/cpu/mpc8xxx/law.c
index 30f35e25e3..ca9e6aa8eb 100644
--- a/arch/powerpc/cpu/mpc8xxx/law.c
+++ b/arch/powerpc/cpu/mpc8xxx/law.c
@@ -259,7 +259,7 @@ void init_laws(void)
 #error FSL_HW_NUM_LAWS can not be greater than 32 w/o code changes
 #endif
 
-#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_E500) && \
+#if defined(CONFIG_NXP_ESBC) && defined(CONFIG_E500) && \
 						!defined(CONFIG_E500MC)
 	/* ISBC (Boot ROM) creates a LAW 0 entry for non PBL platforms,
 	 * which is not disabled before transferring the control to uboot.
@@ -268,7 +268,7 @@ void init_laws(void)
 	disable_law(0);
 #endif
 
-#if !defined(CONFIG_SECURE_BOOT)
+#if !defined(CONFIG_NXP_ESBC)
 	/*
 	 * if any non DDR LAWs has been created earlier, remove them before
 	 * LAW table is parsed.