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-rw-r--r--arch/sparc/include/asm/arch-leon2/asi.h19
-rw-r--r--arch/sparc/include/asm/arch-leon3/asi.h19
-rw-r--r--arch/sparc/include/asm/asi.h15
-rw-r--r--arch/sparc/include/asm/asmmacro.h28
-rw-r--r--arch/sparc/include/asm/atomic.h12
-rw-r--r--arch/sparc/include/asm/bitops.h17
-rw-r--r--arch/sparc/include/asm/byteorder.h21
-rw-r--r--arch/sparc/include/asm/cache.h23
-rw-r--r--arch/sparc/include/asm/config.h21
-rw-r--r--arch/sparc/include/asm/global_data.h30
-rw-r--r--arch/sparc/include/asm/io.h96
-rw-r--r--arch/sparc/include/asm/irq.h38
-rw-r--r--arch/sparc/include/asm/leon.h28
-rw-r--r--arch/sparc/include/asm/leon2.h222
-rw-r--r--arch/sparc/include/asm/leon3.h35
-rw-r--r--arch/sparc/include/asm/linkage.h0
-rw-r--r--arch/sparc/include/asm/machines.h78
-rw-r--r--arch/sparc/include/asm/page.h28
-rw-r--r--arch/sparc/include/asm/posix_types.h125
-rw-r--r--arch/sparc/include/asm/processor.h102
-rw-r--r--arch/sparc/include/asm/prom.h283
-rw-r--r--arch/sparc/include/asm/psr.h83
-rw-r--r--arch/sparc/include/asm/ptrace.h167
-rw-r--r--arch/sparc/include/asm/sections.h11
-rw-r--r--arch/sparc/include/asm/srmmu.h287
-rw-r--r--arch/sparc/include/asm/stack.h148
-rw-r--r--arch/sparc/include/asm/string.h41
-rw-r--r--arch/sparc/include/asm/types.h60
-rw-r--r--arch/sparc/include/asm/u-boot.h24
-rw-r--r--arch/sparc/include/asm/unaligned.h10
-rw-r--r--arch/sparc/include/asm/winmacro.h138
31 files changed, 0 insertions, 2209 deletions
diff --git a/arch/sparc/include/asm/arch-leon2/asi.h b/arch/sparc/include/asm/arch-leon2/asi.h
deleted file mode 100644
index 045bd77014..0000000000
--- a/arch/sparc/include/asm/arch-leon2/asi.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/* asi.h: Address Space Identifier values for the LEON2 sparc.
- *
- * Copyright (C) 2008 Daniel Hellstrom (daniel@gaisler.com)
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _LEON2_ASI_H
-#define _LEON2_ASI_H
-
-#define ASI_CACHEMISS 0x01 /* Force D-Cache miss on load (lda) */
-#define ASI_M_FLUSH_PROBE 0x03 /* MMU Flush/Probe */
-#define ASI_IFLUSH 0x05 /* Flush I-Cache */
-#define ASI_DFLUSH 0x06 /* Flush D-Cache */
-#define ASI_BYPASS 0x1c /* Bypass MMU (Physical address) */
-#define ASI_MMUFLUSH 0x18 /* FLUSH TLB */
-#define ASI_M_MMUREGS 0x19 /* READ/Write MMU Registers */
-
-#endif /* _LEON2_ASI_H */
diff --git a/arch/sparc/include/asm/arch-leon3/asi.h b/arch/sparc/include/asm/arch-leon3/asi.h
deleted file mode 100644
index 61ffcc4f74..0000000000
--- a/arch/sparc/include/asm/arch-leon3/asi.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/* asi.h: Address Space Identifier values for the LEON3 sparc.
- *
- * Copyright (C) 2008 Daniel Hellstrom (daniel@gaisler.com)
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _LEON3_ASI_H
-#define _LEON3_ASI_H
-
-#define ASI_CACHEMISS 0x01 /* Force D-Cache miss on load (lda) */
-#define ASI_M_FLUSH_PROBE 0x03 /* MMU Flush/Probe */
-#define ASI_IFLUSH 0x10 /* Flush I-Cache */
-#define ASI_DFLUSH 0x11 /* Flush D-Cache */
-#define ASI_BYPASS 0x1c /* Bypass MMU (Physical address) */
-#define ASI_MMUFLUSH 0x18 /* FLUSH TLB */
-#define ASI_M_MMUREGS 0x19 /* READ/Write MMU Registers */
-
-#endif /* _LEON3_ASI_H */
diff --git a/arch/sparc/include/asm/asi.h b/arch/sparc/include/asm/asi.h
deleted file mode 100644
index 16942f42db..0000000000
--- a/arch/sparc/include/asm/asi.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/* Address Space Identifier (ASI) values for sparc processors.
- *
- * (C) Copyright 2008
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _SPARC_ASI_H
-#define _SPARC_ASI_H
-
-/* ASI numbers are processor implementation specific */
-#include <asm/arch/asi.h>
-
-#endif /* _SPARC_ASI_H */
diff --git a/arch/sparc/include/asm/asmmacro.h b/arch/sparc/include/asm/asmmacro.h
deleted file mode 100644
index 653f2e4848..0000000000
--- a/arch/sparc/include/asm/asmmacro.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/* Assembler macros for SPARC
- *
- * (C) Copyright 2007, taken from linux asm-sparc/asmmacro.h
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __SPARC_ASMMACRO_H__
-#define __SPARC_ASMMACRO_H__
-
-#include <config.h>
-
-/* All trap entry points _must_ begin with this macro or else you
- * lose. It makes sure the kernel has a proper window so that
- * c-code can be called.
- */
-#define SAVE_ALL_HEAD \
- sethi %hi(trap_setup+(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)), %l4; \
- jmpl %l4 + %lo(trap_setup+(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)), %l6;
-#define SAVE_ALL \
- SAVE_ALL_HEAD \
- nop;
-
-/* All traps low-level code here must end with this macro. */
-#define RESTORE_ALL b ret_trap_entry; clr %l6;
-
-#endif
diff --git a/arch/sparc/include/asm/atomic.h b/arch/sparc/include/asm/atomic.h
deleted file mode 100644
index 35236d01f8..0000000000
--- a/arch/sparc/include/asm/atomic.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPARC atomic operations
- *
- * (C) Copyright 2008
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _ASM_SPARC_ATOMIC_H_
-#define _ASM_SPARC_ATOMIC_H_
-
-#endif /* _ASM_SPARC_ATOMIC_H_ */
diff --git a/arch/sparc/include/asm/bitops.h b/arch/sparc/include/asm/bitops.h
deleted file mode 100644
index c66f730c88..0000000000
--- a/arch/sparc/include/asm/bitops.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* Bit string operations on the SPARC
- *
- * (C) Copyright 2007, taken from asm-ppc/bitops.h
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _SPARC_BITOPS_H
-#define _SPARC_BITOPS_H
-
-#include <asm-generic/bitops/fls.h>
-#include <asm-generic/bitops/__fls.h>
-#include <asm-generic/bitops/fls64.h>
-#include <asm-generic/bitops/__ffs.h>
-
-#endif /* _SPARC_BITOPS_H */
diff --git a/arch/sparc/include/asm/byteorder.h b/arch/sparc/include/asm/byteorder.h
deleted file mode 100644
index bdc5e63f21..0000000000
--- a/arch/sparc/include/asm/byteorder.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2008
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _SPARC_BYTEORDER_H
-#define _SPARC_BYTEORDER_H
-
-#include <asm/types.h>
-
-#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
-#define __BYTEORDER_HAS_U64__
-#define __SWAB_64_THRU_32__
-#endif
-#include <linux/byteorder/big_endian.h>
-#endif /* _SPARC_BYTEORDER_H */
diff --git a/arch/sparc/include/asm/cache.h b/arch/sparc/include/asm/cache.h
deleted file mode 100644
index d9671d1c74..0000000000
--- a/arch/sparc/include/asm/cache.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * (C) Copyright 2008,
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __SPARC_CACHE_H__
-#define __SPARC_CACHE_H__
-
-#include <asm/processor.h>
-
-/*
- * If CONFIG_SYS_CACHELINE_SIZE is defined use it for DMA alignment. Otherwise
- * use 32-bytes, the cacheline size for Sparc.
- */
-#ifdef CONFIG_SYS_CACHELINE_SIZE
-#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
-#else
-#define ARCH_DMA_MINALIGN 32
-#endif
-
-#endif
diff --git a/arch/sparc/include/asm/config.h b/arch/sparc/include/asm/config.h
deleted file mode 100644
index 455fbc1b73..0000000000
--- a/arch/sparc/include/asm/config.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * Copyright 2015,
- * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _ASM_CONFIG_H_
-#define _ASM_CONFIG_H_
-
-#define CONFIG_SYS_GENERIC_GLOBAL_DATA
-#define CONFIG_NEEDS_MANUAL_RELOC
-
-#define CONFIG_LMB
-#define CONFIG_SYS_BOOT_RAMDISK_HIGH
-
-#define CONFIG_SYS_TIMER_RATE 1000000 /* 1MHz */
-#define CONFIG_SYS_TIMER_COUNTER gd->arch.timer
-#define CONFIG_SYS_TIMER_COUNTS_DOWN
-
-#endif
diff --git a/arch/sparc/include/asm/global_data.h b/arch/sparc/include/asm/global_data.h
deleted file mode 100644
index af38d17b0d..0000000000
--- a/arch/sparc/include/asm/global_data.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * (C) Copyright 2002-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2007, 2015
- * Daniel Hellstrom, Cobham, Gaisler, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __ASM_GBL_DATA_H
-#define __ASM_GBL_DATA_H
-
-#include "asm/types.h"
-
-/* Architecture-specific global data */
-struct arch_global_data {
- void *timer;
- void *uart;
- unsigned int uart_freq;
-#ifdef CONFIG_LEON3
- unsigned int snooping_available;
-#endif
-};
-
-#include <asm-generic/global_data.h>
-
-#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("%g7")
-
-#endif /* __ASM_GBL_DATA_H */
diff --git a/arch/sparc/include/asm/io.h b/arch/sparc/include/asm/io.h
deleted file mode 100644
index a317d132be..0000000000
--- a/arch/sparc/include/asm/io.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/* SPARC I/O definitions
- *
- * (C) Copyright 2007, 2015
- * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _SPARC_IO_H
-#define _SPARC_IO_H
-
-/* Nothing to sync, total store ordering (TSO)... */
-#define sync()
-
-/*
- * Generic virtual read/write.
- */
-
-#ifndef CONFIG_SYS_HAS_NO_CACHE
-
-/* Forces a cache miss on read/load.
- * On some architectures we need to bypass the cache when reading
- * I/O registers so that we are not reading the same status word
- * over and over again resulting in a hang (until an IRQ if lucky)
- */
-
-#define __arch_getb(a) SPARC_NOCACHE_READ_BYTE((unsigned int)(a))
-#define __arch_getw(a) SPARC_NOCACHE_READ_HWORD((unsigned int)(a))
-#define __arch_getl(a) SPARC_NOCACHE_READ((unsigned int)(a))
-#define __arch_getq(a) SPARC_NOCACHE_READ_DWORD((unsigned int)(a))
-
-#else
-
-#define __arch_getb(a) (*(volatile unsigned char *)(a))
-#define __arch_getw(a) (*(volatile unsigned short *)(a))
-#define __arch_getl(a) (*(volatile unsigned int *)(a))
-#define __arch_getq(a) (*(volatile unsigned long long *)(a))
-
-#endif /* CONFIG_SYS_HAS_NO_CACHE */
-
-#define __arch_putb(v, a) (*(volatile unsigned char *)(a) = (v))
-#define __arch_putw(v, a) (*(volatile unsigned short *)(a) = (v))
-#define __arch_putl(v, a) (*(volatile unsigned int *)(a) = (v))
-#define __arch_putq(v, a) (*(volatile unsigned long long *)(a) = (v))
-
-#define __raw_writeb(v, a) __arch_putb(v, a)
-#define __raw_writew(v, a) __arch_putw(v, a)
-#define __raw_writel(v, a) __arch_putl(v, a)
-#define __raw_writeq(v, a) __arch_putq(v, a)
-
-#define __raw_readb(a) __arch_getb(a)
-#define __raw_readw(a) __arch_getw(a)
-#define __raw_readl(a) __arch_getl(a)
-#define __raw_readq(a) __arch_getq(a)
-
-#define writeb __raw_writeb
-#define writew __raw_writew
-#define writel __raw_writel
-#define writeq __raw_writeq
-
-#define readb __raw_readb
-#define readw __raw_readw
-#define readl __raw_readl
-#define readq __raw_readq
-
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-
-#define MAP_NOCACHE (0)
-#define MAP_WRCOMBINE (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH (0)
-
-static inline void *map_physmem(phys_addr_t paddr, unsigned long len,
- unsigned long flags)
-{
- return (void *)paddr;
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
-
-static inline phys_addr_t virt_to_phys(void * vaddr)
-{
- return (phys_addr_t)(vaddr);
-}
-
-#endif
diff --git a/arch/sparc/include/asm/irq.h b/arch/sparc/include/asm/irq.h
deleted file mode 100644
index 5d0f7564e9..0000000000
--- a/arch/sparc/include/asm/irq.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/* IRQ functions
- *
- * (C) Copyright 2007
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __SPARC_IRQ_H__
-#define __SPARC_IRQ_H__
-
-#include <asm/psr.h>
-
-/* Set SPARC Processor Interrupt Level */
-static inline void set_pil(unsigned int level)
-{
- unsigned int psr = get_psr();
-
- put_psr((psr & ~PSR_PIL) | ((level & 0xf) << PSR_PIL_OFS));
-}
-
-/* Get SPARC Processor Interrupt Level */
-static inline unsigned int get_pil(void)
-{
- unsigned int psr = get_psr();
- return (psr & PSR_PIL) >> PSR_PIL_OFS;
-}
-
-/* Disables interrupts and return current PIL value */
-extern int intLock(void);
-
-/* Sets the PIL to oldLevel */
-extern void intUnlock(int oldLevel);
-
-/* Return non-zero if interrupts are currently enabled */
-extern int interrupt_is_enabled(void);
-
-#endif
diff --git a/arch/sparc/include/asm/leon.h b/arch/sparc/include/asm/leon.h
deleted file mode 100644
index cc7c7f349d..0000000000
--- a/arch/sparc/include/asm/leon.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/* LEON Header File select
- *
- * (C) Copyright 2007
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __ASM_LEON_H__
-#define __ASM_LEON_H__
-
-#if defined(CONFIG_LEON3)
-
-#include <asm/leon3.h>
-
-#elif defined(CONFIG_LEON2)
-
-#include <asm/leon2.h>
-
-#else
-
-#error Unknown LEON processor
-
-#endif
-
-/* Common stuff */
-
-#endif
diff --git a/arch/sparc/include/asm/leon2.h b/arch/sparc/include/asm/leon2.h
deleted file mode 100644
index ffac0de1d2..0000000000
--- a/arch/sparc/include/asm/leon2.h
+++ /dev/null
@@ -1,222 +0,0 @@
-/* LEON2 header file. LEON2 is a SOC processor.
- *
- * (C) Copyright 2008
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __LEON2_H__
-#define __LEON2_H__
-
-#ifdef CONFIG_LEON2
-
-/* LEON 2 I/O register definitions */
-#define LEON2_PREGS 0x80000000
-#define LEON2_MCFG1 0x00
-#define LEON2_MCFG2 0x04
-#define LEON2_ECTRL 0x08
-#define LEON2_FADDR 0x0C
-#define LEON2_MSTAT 0x10
-#define LEON2_CCTRL 0x14
-#define LEON2_PWDOWN 0x18
-#define LEON2_WPROT1 0x1C
-#define LEON2_WPROT2 0x20
-#define LEON2_LCONF 0x24
-#define LEON2_TCNT0 0x40
-#define LEON2_TRLD0 0x44
-#define LEON2_TCTRL0 0x48
-#define LEON2_TCNT1 0x50
-#define LEON2_TRLD1 0x54
-#define LEON2_TCTRL1 0x58
-#define LEON2_SCNT 0x60
-#define LEON2_SRLD 0x64
-#define LEON2_UART0 0x70
-#define LEON2_UDATA0 0x70
-#define LEON2_USTAT0 0x74
-#define LEON2_UCTRL0 0x78
-#define LEON2_USCAL0 0x7C
-#define LEON2_UART1 0x80
-#define LEON2_UDATA1 0x80
-#define LEON2_USTAT1 0x84
-#define LEON2_UCTRL1 0x88
-#define LEON2_USCAL1 0x8C
-#define LEON2_IMASK 0x90
-#define LEON2_IPEND 0x94
-#define LEON2_IFORCE 0x98
-#define LEON2_ICLEAR 0x9C
-#define LEON2_IOREG 0xA0
-#define LEON2_IODIR 0xA4
-#define LEON2_IOICONF 0xA8
-#define LEON2_IPEND2 0xB0
-#define LEON2_IMASK2 0xB4
-#define LEON2_ISTAT2 0xB8
-#define LEON2_ICLEAR2 0xBC
-
-#ifndef __ASSEMBLER__
-/*
- * Structure for LEON memory mapped registers.
- *
- * Source: Section 6.1 - On-chip registers
- *
- * NOTE: There is only one of these structures per CPU, its base address
- * is 0x80000000, and the variable LEON_REG is placed there by the
- * linkcmds file.
- */
-typedef struct {
- volatile unsigned int Memory_Config_1;
- volatile unsigned int Memory_Config_2;
- volatile unsigned int Edac_Control;
- volatile unsigned int Failed_Address;
- volatile unsigned int Memory_Status;
- volatile unsigned int Cache_Control;
- volatile unsigned int Power_Down;
- volatile unsigned int Write_Protection_1;
- volatile unsigned int Write_Protection_2;
- volatile unsigned int Leon_Configuration;
- volatile unsigned int dummy2;
- volatile unsigned int dummy3;
- volatile unsigned int dummy4;
- volatile unsigned int dummy5;
- volatile unsigned int dummy6;
- volatile unsigned int dummy7;
- volatile unsigned int Timer_Counter_1;
- volatile unsigned int Timer_Reload_1;
- volatile unsigned int Timer_Control_1;
- volatile unsigned int Watchdog;
- volatile unsigned int Timer_Counter_2;
- volatile unsigned int Timer_Reload_2;
- volatile unsigned int Timer_Control_2;
- volatile unsigned int dummy8;
- volatile unsigned int Scaler_Counter;
- volatile unsigned int Scaler_Reload;
- volatile unsigned int dummy9;
- volatile unsigned int dummy10;
- volatile unsigned int UART_Channel_1;
- volatile unsigned int UART_Status_1;
- volatile unsigned int UART_Control_1;
- volatile unsigned int UART_Scaler_1;
- volatile unsigned int UART_Channel_2;
- volatile unsigned int UART_Status_2;
- volatile unsigned int UART_Control_2;
- volatile unsigned int UART_Scaler_2;
- volatile unsigned int Interrupt_Mask;
- volatile unsigned int Interrupt_Pending;
- volatile unsigned int Interrupt_Force;
- volatile unsigned int Interrupt_Clear;
- volatile unsigned int PIO_Data;
- volatile unsigned int PIO_Direction;
- volatile unsigned int PIO_Interrupt;
-} LEON2_regs;
-
-typedef struct {
- volatile unsigned int UART_Channel;
- volatile unsigned int UART_Status;
- volatile unsigned int UART_Control;
- volatile unsigned int UART_Scaler;
-} LEON2_Uart_regs;
-
-#endif
-
-/*
- * The following constants are intended to be used ONLY in assembly
- * language files.
- *
- * NOTE: The intended style of usage is to load the address of LEON REGS
- * into a register and then use these as displacements from
- * that register.
- */
-#define LEON_REG_MEMCFG1_OFFSET 0x00
-#define LEON_REG_MEMCFG2_OFFSET 0x04
-#define LEON_REG_EDACCTRL_OFFSET 0x08
-#define LEON_REG_FAILADDR_OFFSET 0x0C
-#define LEON_REG_MEMSTATUS_OFFSET 0x10
-#define LEON_REG_CACHECTRL_OFFSET 0x14
-#define LEON_REG_POWERDOWN_OFFSET 0x18
-#define LEON_REG_WRITEPROT1_OFFSET 0x1C
-#define LEON_REG_WRITEPROT2_OFFSET 0x20
-#define LEON_REG_LEONCONF_OFFSET 0x24
-#define LEON_REG_UNIMPLEMENTED_2_OFFSET 0x28
-#define LEON_REG_UNIMPLEMENTED_3_OFFSET 0x2C
-#define LEON_REG_UNIMPLEMENTED_4_OFFSET 0x30
-#define LEON_REG_UNIMPLEMENTED_5_OFFSET 0x34
-#define LEON_REG_UNIMPLEMENTED_6_OFFSET 0x38
-#define LEON_REG_UNIMPLEMENTED_7_OFFSET 0x3C
-#define LEON_REG_TIMERCNT1_OFFSET 0x40
-#define LEON_REG_TIMERLOAD1_OFFSET 0x44
-#define LEON_REG_TIMERCTRL1_OFFSET 0x48
-#define LEON_REG_WDOG_OFFSET 0x4C
-#define LEON_REG_TIMERCNT2_OFFSET 0x50
-#define LEON_REG_TIMERLOAD2_OFFSET 0x54
-#define LEON_REG_TIMERCTRL2_OFFSET 0x58
-#define LEON_REG_UNIMPLEMENTED_8_OFFSET 0x5C
-#define LEON_REG_SCALERCNT_OFFSET 0x60
-#define LEON_REG_SCALER_LOAD_OFFSET 0x64
-#define LEON_REG_UNIMPLEMENTED_9_OFFSET 0x68
-#define LEON_REG_UNIMPLEMENTED_10_OFFSET 0x6C
-#define LEON_REG_UARTDATA1_OFFSET 0x70
-#define LEON_REG_UARTSTATUS1_OFFSET 0x74
-#define LEON_REG_UARTCTRL1_OFFSET 0x78
-#define LEON_REG_UARTSCALER1_OFFSET 0x7C
-#define LEON_REG_UARTDATA2_OFFSET 0x80
-#define LEON_REG_UARTSTATUS2_OFFSET 0x84
-#define LEON_REG_UARTCTRL2_OFFSET 0x88
-#define LEON_REG_UARTSCALER2_OFFSET 0x8C
-#define LEON_REG_IRQMASK_OFFSET 0x90
-#define LEON_REG_IRQPEND_OFFSET 0x94
-#define LEON_REG_IRQFORCE_OFFSET 0x98
-#define LEON_REG_IRQCLEAR_OFFSET 0x9C
-#define LEON_REG_PIODATA_OFFSET 0xA0
-#define LEON_REG_PIODIR_OFFSET 0xA4
-#define LEON_REG_PIOIRQ_OFFSET 0xA8
-#define LEON_REG_SIM_RAM_SIZE_OFFSET 0xF4
-#define LEON_REG_SIM_ROM_SIZE_OFFSET 0xF8
-
-/*
- * Interrupt Sources
- *
- * The interrupt source numbers directly map to the trap type and to
- * the bits used in the Interrupt Clear, Interrupt Force, Interrupt Mask,
- * and the Interrupt Pending Registers.
- */
-#define LEON_INTERRUPT_CORRECTABLE_MEMORY_ERROR 1
-#define LEON_INTERRUPT_UART_1_RX_TX 2
-#define LEON_INTERRUPT_UART_0_RX_TX 3
-#define LEON_INTERRUPT_EXTERNAL_0 4
-#define LEON_INTERRUPT_EXTERNAL_1 5
-#define LEON_INTERRUPT_EXTERNAL_2 6
-#define LEON_INTERRUPT_EXTERNAL_3 7
-#define LEON_INTERRUPT_TIMER1 8
-#define LEON_INTERRUPT_TIMER2 9
-#define LEON_INTERRUPT_EMPTY1 10
-#define LEON_INTERRUPT_EMPTY2 11
-#define LEON_INTERRUPT_OPEN_ETH 12
-#define LEON_INTERRUPT_EMPTY4 13
-#define LEON_INTERRUPT_EMPTY5 14
-#define LEON_INTERRUPT_EMPTY6 15
-
-/* Timer Bits */
-#define LEON2_TIMER_CTRL_EN 0x1 /* Timer enable */
-#define LEON2_TIMER_CTRL_RS 0x2 /* Timer reStart */
-#define LEON2_TIMER_CTRL_LD 0x4 /* Timer reLoad */
-#define LEON2_TIMER1_IRQNO 8 /* Timer 1 IRQ number */
-#define LEON2_TIMER2_IRQNO 9 /* Timer 2 IRQ number */
-#define LEON2_TIMER1_IE (1<<LEON2_TIMER1_IRQNO) /* Timer 1 interrupt enable */
-#define LEON2_TIMER2_IE (1<<LEON2_TIMER2_IRQNO) /* Timer 2 interrupt enable */
-
-/* UART bits */
-#define LEON2_UART_CTRL_RE 1 /* UART Receiver enable */
-#define LEON2_UART_CTRL_TE 2 /* UART Transmitter enable */
-#define LEON2_UART_CTRL_RI 4 /* UART Receiver Interrupt enable */
-#define LEON2_UART_CTRL_TI 8 /* UART Transmitter Interrupt enable */
-#define LEON2_UART_CTRL_DBG (1<<11) /* Debug Bit used by GRMON */
-
-#define LEON2_UART_STAT_DR 1 /* UART Data Ready */
-#define LEON2_UART_STAT_TSE 2 /* UART Transmit Shift Reg empty */
-#define LEON2_UART_STAT_THE 4 /* UART Transmit Hold Reg empty */
-
-#else
-#error Include LEON2 header file only if LEON2 processor
-#endif
-
-#endif
diff --git a/arch/sparc/include/asm/leon3.h b/arch/sparc/include/asm/leon3.h
deleted file mode 100644
index a9f32b9b90..0000000000
--- a/arch/sparc/include/asm/leon3.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/* LEON3 header file. LEON3 is a free GPL SOC processor available
- * at www.gaisler.com.
- *
- * (C) Copyright 2007
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __LEON3_H__
-#define __LEON3_H__
-
-#ifndef CONFIG_LEON3
-#error Include LEON3 header file only if LEON3 processor
-#endif
-
-/* Not much to define, most is Plug and Play and GRLIB dependent
- * not LEON3 dependent. See <ambapp.h> for GRLIB timers, interrupt
- * ctrl, memory controllers etc.
- */
-
-
-#ifndef __ASSEMBLER__
-/* The frequency of the CPU */
-extern unsigned int leon_cpu_freq;
-
-/* Number of LEON processors in system */
-extern int leon_cpu_cnt;
-
-/* Ver/subversion of CPU */
-extern int leon_ver;
-
-#endif /* __ASSEMBLER__ */
-
-#endif
diff --git a/arch/sparc/include/asm/linkage.h b/arch/sparc/include/asm/linkage.h
deleted file mode 100644
index e69de29bb2..0000000000
--- a/arch/sparc/include/asm/linkage.h
+++ /dev/null
diff --git a/arch/sparc/include/asm/machines.h b/arch/sparc/include/asm/machines.h
deleted file mode 100644
index e209f3fa60..0000000000
--- a/arch/sparc/include/asm/machines.h
+++ /dev/null
@@ -1,78 +0,0 @@
-/* machines.h: Defines for taking apart the machine type value in the
- * idprom and determining the kind of machine we are on.
- *
- * Taken from the SPARC port of Linux.
- *
- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
- * Copyright (C) 2007 Daniel Hellstrom (daniel@gaisler.com)
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __SPARC_MACHINES_H__
-#define __SPARC_MACHINES_H__
-
-struct Sun_Machine_Models {
- char *name;
- unsigned char id_machtype;
-};
-
-/* Current number of machines we know about that has an IDPROM
- * machtype entry including one entry for the 0x80 OBP machines.
- */
-#define NUM_SUN_MACHINES 16
-
-extern struct Sun_Machine_Models Sun_Machines[NUM_SUN_MACHINES];
-
-/* The machine type in the idprom area looks like this:
- *
- * ---------------
- * | ARCH | MACH |
- * ---------------
- * 7 4 3 0
- *
- * The ARCH field determines the architecture line (sun4, sun4c, etc).
- * The MACH field determines the machine make within that architecture.
- */
-
-#define SM_ARCH_MASK 0xf0
-#define SM_SUN4 0x20
-#define M_LEON2 0x30
-#define SM_SUN4C 0x50
-#define SM_SUN4M 0x70
-#define SM_SUN4M_OBP 0x80
-
-#define SM_TYP_MASK 0x0f
-/* Sun4 machines */
-#define SM_4_260 0x01 /* Sun 4/200 series */
-#define SM_4_110 0x02 /* Sun 4/100 series */
-#define SM_4_330 0x03 /* Sun 4/300 series */
-#define SM_4_470 0x04 /* Sun 4/400 series */
-
-/* Leon machines */
-#define M_LEON2_SOC 0x01 /* Leon2 SoC */
-
-/* Sun4c machines Full Name - PROM NAME */
-#define SM_4C_SS1 0x01 /* Sun4c SparcStation 1 - Sun 4/60 */
-#define SM_4C_IPC 0x02 /* Sun4c SparcStation IPC - Sun 4/40 */
-#define SM_4C_SS1PLUS 0x03 /* Sun4c SparcStation 1+ - Sun 4/65 */
-#define SM_4C_SLC 0x04 /* Sun4c SparcStation SLC - Sun 4/20 */
-#define SM_4C_SS2 0x05 /* Sun4c SparcStation 2 - Sun 4/75 */
-#define SM_4C_ELC 0x06 /* Sun4c SparcStation ELC - Sun 4/25 */
-#define SM_4C_IPX 0x07 /* Sun4c SparcStation IPX - Sun 4/50 */
-
-/* Sun4m machines, these predate the OpenBoot. These values only mean
- * something if the value in the ARCH field is SM_SUN4M, if it is
- * SM_SUN4M_OBP then you have the following situation:
- * 1) You either have a sun4d, a sun4e, or a recently made sun4m.
- * 2) You have to consult OpenBoot to determine which machine this is.
- */
-#define SM_4M_SS60 0x01 /* Sun4m SparcSystem 600 */
-#define SM_4M_SS50 0x02 /* Sun4m SparcStation 10 */
-#define SM_4M_SS40 0x03 /* Sun4m SparcStation 5 */
-
-/* Sun4d machines -- N/A */
-/* Sun4e machines -- N/A */
-/* Sun4u machines -- N/A */
-
-#endif /* !(_SPARC_MACHINES_H) */
diff --git a/arch/sparc/include/asm/page.h b/arch/sparc/include/asm/page.h
deleted file mode 100644
index 181d1c1952..0000000000
--- a/arch/sparc/include/asm/page.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/* page.h: Various defines and such for MMU operations on the Sparc for
- * the Linux kernel.
- *
- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
- * Copyright (C) 2007 Daniel Hellstrom (daniel@gaisler.com)
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _SPARC_PAGE_H
-#define _SPARC_PAGE_H
-
-#ifdef CONFIG_SUN4
-#define PAGE_SHIFT 13
-#else
-#define PAGE_SHIFT 12
-#endif
-
-#ifndef __ASSEMBLY__
-/* I have my suspicions... -DaveM */
-#define PAGE_SIZE (1UL << PAGE_SHIFT)
-#else
-#define PAGE_SIZE (1 << PAGE_SHIFT)
-#endif
-
-#define PAGE_MASK (~(PAGE_SIZE-1))
-
-#endif /* _SPARC_PAGE_H */
diff --git a/arch/sparc/include/asm/posix_types.h b/arch/sparc/include/asm/posix_types.h
deleted file mode 100644
index 61d3bbc9a1..0000000000
--- a/arch/sparc/include/asm/posix_types.h
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2000 - 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2007, taken from asm-ppc/posix_types.h
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __SPARC_POSIX_TYPES_H__
-#define __SPARC_POSIX_TYPES_H__
-
-/*
- * This file is generally used by user-level software, so you need to
- * be a little careful about namespace pollution etc. Also, we cannot
- * assume GCC is being used.
- */
-
-typedef unsigned int __kernel_dev_t;
-typedef unsigned int __kernel_ino_t;
-typedef unsigned int __kernel_mode_t;
-typedef unsigned short __kernel_nlink_t;
-typedef long __kernel_off_t;
-typedef int __kernel_pid_t;
-typedef unsigned int __kernel_uid_t;
-typedef unsigned int __kernel_gid_t;
-typedef unsigned int __kernel_size_t;
-typedef int __kernel_ssize_t;
-typedef long __kernel_ptrdiff_t;
-typedef long __kernel_time_t;
-typedef long __kernel_suseconds_t;
-typedef long __kernel_clock_t;
-typedef int __kernel_daddr_t;
-typedef char *__kernel_caddr_t;
-typedef short __kernel_ipc_pid_t;
-typedef unsigned short __kernel_uid16_t;
-typedef unsigned short __kernel_gid16_t;
-typedef unsigned int __kernel_uid32_t;
-typedef unsigned int __kernel_gid32_t;
-
-typedef unsigned int __kernel_old_uid_t;
-typedef unsigned int __kernel_old_gid_t;
-
-#ifdef __GNUC__
-typedef long long __kernel_loff_t;
-#endif
-
-typedef struct {
- int val[2];
-} __kernel_fsid_t;
-
-#ifndef __GNUC__
-
-#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
-#define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d))
-#define __FD_ISSET(d, set) ((set)->fds_bits[__FDELT(d)] & __FDMASK(d))
-#define __FD_ZERO(set) \
- ((void) memset ((__ptr_t) (set), 0, sizeof (__kernel_fd_set)))
-
-#else /* __GNUC__ */
-
-#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) \
- || (__GLIBC__ == 2 && __GLIBC_MINOR__ == 0)
-/* With GNU C, use inline functions instead so args are evaluated only once: */
-
-#undef __FD_SET
-static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set * fdsetp)
-{
- unsigned long _tmp = fd / __NFDBITS;
- unsigned long _rem = fd % __NFDBITS;
- fdsetp->fds_bits[_tmp] |= (1UL << _rem);
-}
-
-#undef __FD_CLR
-static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set * fdsetp)
-{
- unsigned long _tmp = fd / __NFDBITS;
- unsigned long _rem = fd % __NFDBITS;
- fdsetp->fds_bits[_tmp] &= ~(1UL << _rem);
-}
-
-#undef __FD_ISSET
-static __inline__ int __FD_ISSET(unsigned long fd, __kernel_fd_set * p)
-{
- unsigned long _tmp = fd / __NFDBITS;
- unsigned long _rem = fd % __NFDBITS;
- return (p->fds_bits[_tmp] & (1UL << _rem)) != 0;
-}
-
-/*
- * This will unroll the loop for the normal constant case (8 ints,
- * for a 256-bit fd_set)
- */
-#undef __FD_ZERO
-static __inline__ void __FD_ZERO(__kernel_fd_set * p)
-{
- unsigned int *tmp = (unsigned int *)p->fds_bits;
- int i;
-
- if (__builtin_constant_p(__FDSET_LONGS)) {
- switch (__FDSET_LONGS) {
- case 8:
- tmp[0] = 0;
- tmp[1] = 0;
- tmp[2] = 0;
- tmp[3] = 0;
- tmp[4] = 0;
- tmp[5] = 0;
- tmp[6] = 0;
- tmp[7] = 0;
- return;
- }
- }
- i = __FDSET_LONGS;
- while (i) {
- i--;
- *tmp = 0;
- tmp++;
- }
-}
-
-#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
-#endif /* __GNUC__ */
-#endif /* _SPARC_POSIX_TYPES_H */
diff --git a/arch/sparc/include/asm/processor.h b/arch/sparc/include/asm/processor.h
deleted file mode 100644
index 9a6535d30d..0000000000
--- a/arch/sparc/include/asm/processor.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/* SPARC Processor specifics
- * taken from the SPARC port of Linux (ptrace.h).
- *
- * (C) Copyright 2007
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __ASM_SPARC_PROCESSOR_H
-#define __ASM_SPARC_PROCESSOR_H
-
-#include <asm/arch/asi.h>
-
-#ifdef CONFIG_LEON
-
-/* All LEON processors supported */
-#include <asm/leon.h>
-
-#else
-/* other processors */
-#error Unknown SPARC Processor
-#endif
-
-#ifndef __ASSEMBLY__
-
-/* flush data cache */
-static __inline__ void sparc_dcache_flush_all(void)
-{
- __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t"::"i"(ASI_DFLUSH):"memory");
-}
-
-/* flush instruction cache */
-static __inline__ void sparc_icache_flush_all(void)
-{
- __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t"::"i"(ASI_IFLUSH):"memory");
-}
-
-/* do a cache miss load */
-static __inline__ unsigned long long sparc_load_reg_cachemiss_qword(unsigned
- long paddr)
-{
- unsigned long long retval;
- __asm__ __volatile__("ldda [%1] %2, %0\n\t":
- "=r"(retval):"r"(paddr), "i"(ASI_CACHEMISS));
- return retval;
-}
-
-static __inline__ unsigned long sparc_load_reg_cachemiss(unsigned long paddr)
-{
- unsigned long retval;
- __asm__ __volatile__("lda [%1] %2, %0\n\t":
- "=r"(retval):"r"(paddr), "i"(ASI_CACHEMISS));
- return retval;
-}
-
-static __inline__ unsigned short sparc_load_reg_cachemiss_word(unsigned long
- paddr)
-{
- unsigned short retval;
- __asm__ __volatile__("lduha [%1] %2, %0\n\t":
- "=r"(retval):"r"(paddr), "i"(ASI_CACHEMISS));
- return retval;
-}
-
-static __inline__ unsigned char sparc_load_reg_cachemiss_byte(unsigned long
- paddr)
-{
- unsigned char retval;
- __asm__ __volatile__("lduba [%1] %2, %0\n\t":
- "=r"(retval):"r"(paddr), "i"(ASI_CACHEMISS));
- return retval;
-}
-
-/* do a physical address bypass write, i.e. for 0x80000000 */
-static __inline__ void sparc_store_reg_bypass(unsigned long paddr,
- unsigned long value)
-{
- __asm__ __volatile__("sta %0, [%1] %2\n\t"::"r"(value), "r"(paddr),
- "i"(ASI_BYPASS):"memory");
-}
-
-static __inline__ unsigned long sparc_load_reg_bypass(unsigned long paddr)
-{
- unsigned long retval;
- __asm__ __volatile__("lda [%1] %2, %0\n\t":
- "=r"(retval):"r"(paddr), "i"(ASI_BYPASS));
- return retval;
-}
-
-/* Macros for bypassing cache when reading */
-#define SPARC_NOCACHE_READ_DWORD(address) sparc_load_reg_cachemiss_qword((unsigned int)(address))
-#define SPARC_NOCACHE_READ(address) sparc_load_reg_cachemiss((unsigned int)(address))
-#define SPARC_NOCACHE_READ_HWORD(address) sparc_load_reg_cachemiss_word((unsigned int)(address))
-#define SPARC_NOCACHE_READ_BYTE(address) sparc_load_reg_cachemiss_byte((unsigned int)(address))
-
-#define SPARC_BYPASS_READ(address) sparc_load_reg_bypass((unsigned int)(address))
-#define SPARC_BYPASS_WRITE(address,value) sparc_store_reg_bypass((unsigned int)(address),(unsigned int)(value))
-
-#endif
-
-#endif /* __ASM_SPARC_PROCESSOR_H */
diff --git a/arch/sparc/include/asm/prom.h b/arch/sparc/include/asm/prom.h
deleted file mode 100644
index 8906ef6cc7..0000000000
--- a/arch/sparc/include/asm/prom.h
+++ /dev/null
@@ -1,283 +0,0 @@
-/* OpenProm defines mainly taken from linux kernel header files
- *
- * openprom.h: Prom structures and defines for access to the OPENBOOT
- * prom routines and data areas.
- *
- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
- * Copyright (C) 2007 Daniel Hellstrom (daniel@gaisler.com)
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __SPARC_OPENPROM_H__
-#define __SPARC_OPENPROM_H__
-
-/* Empirical constants... */
-#define LINUX_OPPROM_MAGIC 0x10010407
-
-#ifndef __ASSEMBLY__
-/* V0 prom device operations. */
-struct linux_dev_v0_funcs {
- int (*v0_devopen) (char *device_str);
- int (*v0_devclose) (int dev_desc);
- int (*v0_rdblkdev) (int dev_desc, int num_blks, int blk_st, char *buf);
- int (*v0_wrblkdev) (int dev_desc, int num_blks, int blk_st, char *buf);
- int (*v0_wrnetdev) (int dev_desc, int num_bytes, char *buf);
- int (*v0_rdnetdev) (int dev_desc, int num_bytes, char *buf);
- int (*v0_rdchardev) (int dev_desc, int num_bytes, int dummy, char *buf);
- int (*v0_wrchardev) (int dev_desc, int num_bytes, int dummy, char *buf);
- int (*v0_seekdev) (int dev_desc, long logical_offst, int from);
-};
-
-/* V2 and later prom device operations. */
-struct linux_dev_v2_funcs {
- int (*v2_inst2pkg) (int d); /* Convert ihandle to phandle */
- char *(*v2_dumb_mem_alloc) (char *va, unsigned sz);
- void (*v2_dumb_mem_free) (char *va, unsigned sz);
-
- /* To map devices into virtual I/O space. */
- char *(*v2_dumb_mmap) (char *virta, int which_io, unsigned paddr,
- unsigned sz);
- void (*v2_dumb_munmap) (char *virta, unsigned size);
-
- int (*v2_dev_open) (char *devpath);
- void (*v2_dev_close) (int d);
- int (*v2_dev_read) (int d, char *buf, int nbytes);
- int (*v2_dev_write) (int d, char *buf, int nbytes);
- int (*v2_dev_seek) (int d, int hi, int lo);
-
- /* Never issued (multistage load support) */
- void (*v2_wheee2) (void);
- void (*v2_wheee3) (void);
-};
-
-struct linux_mlist_v0 {
- struct linux_mlist_v0 *theres_more;
- char *start_adr;
- unsigned num_bytes;
-};
-
-struct linux_mem_v0 {
- struct linux_mlist_v0 **v0_totphys;
- struct linux_mlist_v0 **v0_prommap;
- struct linux_mlist_v0 **v0_available; /* What we can use */
-};
-
-/* Arguments sent to the kernel from the boot prompt. */
-struct linux_arguments_v0 {
- char * const argv[8];
- char args[100];
- char boot_dev[2];
- int boot_dev_ctrl;
- int boot_dev_unit;
- int dev_partition;
- char *kernel_file_name;
- void *aieee1; /* XXX */
-};
-
-/* V2 and up boot things. */
-struct linux_bootargs_v2 {
- char **bootpath;
- char **bootargs;
- int *fd_stdin;
- int *fd_stdout;
-};
-
-/* The top level PROM vector. */
-struct linux_romvec {
- /* Version numbers. */
- unsigned int pv_magic_cookie;
- unsigned int pv_romvers;
- unsigned int pv_plugin_revision;
- unsigned int pv_printrev;
-
- /* Version 0 memory descriptors. */
- struct linux_mem_v0 pv_v0mem;
-
- /* Node operations. */
- struct linux_nodeops *pv_nodeops;
-
- char **pv_bootstr;
- struct linux_dev_v0_funcs pv_v0devops;
-
- char *pv_stdin;
- char *pv_stdout;
-#define PROMDEV_KBD 0 /* input from keyboard */
-#define PROMDEV_SCREEN 0 /* output to screen */
-#define PROMDEV_TTYA 1 /* in/out to ttya */
-#define PROMDEV_TTYB 2 /* in/out to ttyb */
-
- /* Blocking getchar/putchar. NOT REENTRANT! (grr) */
- int (*pv_getchar) (void);
- void (*pv_putchar) (int ch);
-
- /* Non-blocking variants. */
- int (*pv_nbgetchar) (void);
- int (*pv_nbputchar) (int ch);
-
- void (*pv_putstr) (char *str, int len);
-
- /* Miscellany. */
- void (*pv_reboot) (char *bootstr);
- void (*pv_printf) (__const__ char *fmt, ...);
- void (*pv_abort) (void);
- __volatile__ int *pv_ticks;
- void (*pv_halt) (void);
- void (**pv_synchook) (void);
-
- /* Evaluate a forth string, not different proto for V0 and V2->up. */
- union {
- void (*v0_eval) (int len, char *str);
- void (*v2_eval) (char *str);
- } pv_fortheval;
-
- struct linux_arguments_v0 **pv_v0bootargs;
-
- /* Get ether address. */
- unsigned int (*pv_enaddr) (int d, char *enaddr);
-
- struct linux_bootargs_v2 pv_v2bootargs;
- struct linux_dev_v2_funcs pv_v2devops;
-
- int filler[15];
-
- /* This one is sun4c/sun4 only. */
- void (*pv_setctxt) (int ctxt, char *va, int pmeg);
-
- /* Prom version 3 Multiprocessor routines. This stuff is crazy.
- * No joke. Calling these when there is only one cpu probably
- * crashes the machine, have to test this. :-)
- */
-
- /* v3_cpustart() will start the cpu 'whichcpu' in mmu-context
- * 'thiscontext' executing at address 'prog_counter'
- */
- int (*v3_cpustart) (unsigned int whichcpu, int ctxtbl_ptr,
- int thiscontext, char *prog_counter);
-
- /* v3_cpustop() will cause cpu 'whichcpu' to stop executing
- * until a resume cpu call is made.
- */
- int (*v3_cpustop) (unsigned int whichcpu);
-
- /* v3_cpuidle() will idle cpu 'whichcpu' until a stop or
- * resume cpu call is made.
- */
- int (*v3_cpuidle) (unsigned int whichcpu);
-
- /* v3_cpuresume() will resume processor 'whichcpu' executing
- * starting with whatever 'pc' and 'npc' were left at the
- * last 'idle' or 'stop' call.
- */
- int (*v3_cpuresume) (unsigned int whichcpu);
-};
-
-/* Routines for traversing the prom device tree. */
-struct linux_nodeops {
- int (*no_nextnode) (int node);
- int (*no_child) (int node);
- int (*no_proplen) (int node, char *name);
- int (*no_getprop) (int node, char *name, char *val);
- int (*no_setprop) (int node, char *name, char *val, int len);
- char *(*no_nextprop) (int node, char *name);
-};
-
-/* More fun PROM structures for device probing. */
-#define PROMREG_MAX 16
-#define PROMVADDR_MAX 16
-#define PROMINTR_MAX 15
-
-struct linux_prom_registers {
- unsigned int which_io; /* is this in OBIO space? */
- unsigned int phys_addr; /* The physical address of this register */
- unsigned int reg_size; /* How many bytes does this register take up? */
-};
-
-struct linux_prom_irqs {
- int pri; /* IRQ priority */
- int vector; /* This is foobar, what does it do? */
-};
-
-/* Element of the "ranges" vector */
-struct linux_prom_ranges {
- unsigned int ot_child_space;
- unsigned int ot_child_base; /* Bus feels this */
- unsigned int ot_parent_space;
- unsigned int ot_parent_base; /* CPU looks from here */
- unsigned int or_size;
-};
-
-/* Ranges and reg properties are a bit different for PCI. */
-struct linux_prom_pci_registers {
- /*
- * We don't know what information this field contain.
- * We guess, PCI device function is in bits 15:8
- * So, ...
- */
- unsigned int which_io; /* Let it be which_io */
-
- unsigned int phys_hi;
- unsigned int phys_lo;
-
- unsigned int size_hi;
- unsigned int size_lo;
-};
-
-struct linux_prom_pci_ranges {
- unsigned int child_phys_hi; /* Only certain bits are encoded here. */
- unsigned int child_phys_mid;
- unsigned int child_phys_lo;
-
- unsigned int parent_phys_hi;
- unsigned int parent_phys_lo;
-
- unsigned int size_hi;
- unsigned int size_lo;
-};
-
-struct linux_prom_pci_assigned_addresses {
- unsigned int which_io;
-
- unsigned int phys_hi;
- unsigned int phys_lo;
-
- unsigned int size_hi;
- unsigned int size_lo;
-};
-
-struct linux_prom_ebus_ranges {
- unsigned int child_phys_hi;
- unsigned int child_phys_lo;
-
- unsigned int parent_phys_hi;
- unsigned int parent_phys_mid;
- unsigned int parent_phys_lo;
-
- unsigned int size;
-};
-
-/* Offset into the EEPROM where the id PROM is located on the 4c */
-#define IDPROM_OFFSET 0x7d8
-
-/* On sun4m; physical. */
-/* MicroSPARC(-II) does not decode 31rd bit, but it works. */
-#define IDPROM_OFFSET_M 0xfd8
-
-struct idprom {
- unsigned char id_format; /* Format identifier (always 0x01) */
- unsigned char id_machtype; /* Machine type */
- unsigned char id_ethaddr[6]; /* Hardware ethernet address */
- long id_date; /* Date of manufacture */
- unsigned int id_sernum:24; /* Unique serial number */
- unsigned char id_cksum; /* Checksum - xor of the data bytes */
- unsigned char reserved[16];
-};
-
-extern struct idprom *idprom;
-extern void idprom_init(void);
-
-#define IDPROM_SIZE (sizeof(struct idprom))
-
-#endif /* !(__ASSEMBLY__) */
-
-#endif
diff --git a/arch/sparc/include/asm/psr.h b/arch/sparc/include/asm/psr.h
deleted file mode 100644
index a91bdc903c..0000000000
--- a/arch/sparc/include/asm/psr.h
+++ /dev/null
@@ -1,83 +0,0 @@
-/* psr.h: This file holds the macros for masking off various parts of
- * the processor status register on the Sparc. This is valid
- * for Version 8. On the V9 this is renamed to the PSTATE
- * register and its members are accessed as fields like
- * PSTATE.PRIV for the current CPU privilege level.
- *
- * taken from the SPARC port of Linux,
- *
- * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)
- * Copyright (C) 2007 Daniel Hellstrom (daniel@gaisler.com)
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __SPARC_PSR_H__
-#define __SPARC_PSR_H__
-
-/* The Sparc PSR fields are laid out as the following:
- *
- * ------------------------------------------------------------------------
- * | impl | vers | icc | resv | EC | EF | PIL | S | PS | ET | CWP |
- * | 31-28 | 27-24 | 23-20 | 19-14 | 13 | 12 | 11-8 | 7 | 6 | 5 | 4-0 |
- * ------------------------------------------------------------------------
- */
-#define PSR_CWP 0x0000001f /* current window pointer */
-#define PSR_ET 0x00000020 /* enable traps field */
-#define PSR_PS 0x00000040 /* previous privilege level */
-#define PSR_S 0x00000080 /* current privilege level */
-#define PSR_PIL 0x00000f00 /* processor interrupt level */
-#define PSR_EF 0x00001000 /* enable floating point */
-#define PSR_EC 0x00002000 /* enable co-processor */
-#define PSR_LE 0x00008000 /* SuperSparcII little-endian */
-#define PSR_ICC 0x00f00000 /* integer condition codes */
-#define PSR_C 0x00100000 /* carry bit */
-#define PSR_V 0x00200000 /* overflow bit */
-#define PSR_Z 0x00400000 /* zero bit */
-#define PSR_N 0x00800000 /* negative bit */
-#define PSR_VERS 0x0f000000 /* cpu-version field */
-#define PSR_IMPL 0xf0000000 /* cpu-implementation field */
-
-#define PSR_PIL_OFS 8
-
-#ifndef __ASSEMBLY__
-/* Get the %psr register. */
-static __inline__ unsigned int get_psr(void)
-{
- unsigned int psr;
- __asm__ __volatile__("rd %%psr, %0\n\t"
- "nop\n\t" "nop\n\t" "nop\n\t":"=r"(psr)
- : /* no inputs */
- :"memory");
-
- return psr;
-}
-
-static __inline__ void put_psr(unsigned int new_psr)
-{
- __asm__ __volatile__("wr %0, 0x0, %%psr\n\t" "nop\n\t" "nop\n\t" "nop\n\t": /* no outputs */
- :"r"(new_psr)
- :"memory", "cc");
-}
-
-/* Get the %fsr register. Be careful, make sure the floating point
- * enable bit is set in the %psr when you execute this or you will
- * incur a trap.
- */
-
-extern unsigned int fsr_storage;
-
-static __inline__ unsigned int get_fsr(void)
-{
- unsigned int fsr = 0;
-
- __asm__ __volatile__("st %%fsr, %1\n\t"
- "ld %1, %0\n\t":"=r"(fsr)
- :"m"(fsr_storage));
-
- return fsr;
-}
-
-#endif /* !(__ASSEMBLY__) */
-
-#endif /* !(__SPARC_PSR_H__) */
diff --git a/arch/sparc/include/asm/ptrace.h b/arch/sparc/include/asm/ptrace.h
deleted file mode 100644
index 33cfbacb0c..0000000000
--- a/arch/sparc/include/asm/ptrace.h
+++ /dev/null
@@ -1,167 +0,0 @@
-/* Contain the Stack frame layout on interrupt. pt_regs.
- * taken from the SPARC port of Linux (ptrace.h).
- *
- * (C) Copyright 2007
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __SPARC_PTRACE_H__
-#define __SPARC_PTRACE_H__
-
-#include <asm/psr.h>
-
-/* This struct defines the way the registers are stored on the
- * stack during a system call and basically all traps.
- */
-
-#ifndef __ASSEMBLY__
-
-struct pt_regs {
- unsigned long psr;
- unsigned long pc;
- unsigned long npc;
- unsigned long y;
- unsigned long u_regs[16]; /* globals and ins */
-};
-
-#define UREG_G0 0
-#define UREG_G1 1
-#define UREG_G2 2
-#define UREG_G3 3
-#define UREG_G4 4
-#define UREG_G5 5
-#define UREG_G6 6
-#define UREG_G7 7
-#define UREG_I0 8
-#define UREG_I1 9
-#define UREG_I2 10
-#define UREG_I3 11
-#define UREG_I4 12
-#define UREG_I5 13
-#define UREG_I6 14
-#define UREG_I7 15
-#define UREG_WIM UREG_G0
-#define UREG_FADDR UREG_G0
-#define UREG_FP UREG_I6
-#define UREG_RETPC UREG_I7
-
-/* A register window */
-struct reg_window {
- unsigned long locals[8];
- unsigned long ins[8];
-};
-
-/* A Sparc stack frame */
-struct sparc_stackf {
- unsigned long locals[8];
- unsigned long ins[6];
- struct sparc_stackf *fp;
- unsigned long callers_pc;
- char *structptr;
- unsigned long xargs[6];
- unsigned long xxargs[1];
-};
-
-#define TRACEREG_SZ sizeof(struct pt_regs)
-#define STACKFRAME_SZ sizeof(struct sparc_stackf)
-
-#else /* __ASSEMBLY__ */
-/* For assembly code. */
-#define TRACEREG_SZ 0x50
-#define STACKFRAME_SZ 0x60
-#endif
-
-/*
- * The asm_offsets.h is a generated file, so we cannot include it.
- * It may be OK for glibc headers, but it's utterly pointless for C code.
- * The assembly code using those offsets has to include it explicitly.
- */
-/* #include <asm/asm_offsets.h> */
-
-/* These are for pt_regs. */
-#define PT_PSR 0x0
-#define PT_PC 0x4
-#define PT_NPC 0x8
-#define PT_Y 0xc
-#define PT_G0 0x10
-#define PT_WIM PT_G0
-#define PT_G1 0x14
-#define PT_G2 0x18
-#define PT_G3 0x1c
-#define PT_G4 0x20
-#define PT_G5 0x24
-#define PT_G6 0x28
-#define PT_G7 0x2c
-#define PT_I0 0x30
-#define PT_I1 0x34
-#define PT_I2 0x38
-#define PT_I3 0x3c
-#define PT_I4 0x40
-#define PT_I5 0x44
-#define PT_I6 0x48
-#define PT_FP PT_I6
-#define PT_I7 0x4c
-
-/* Reg_window offsets */
-#define RW_L0 0x00
-#define RW_L1 0x04
-#define RW_L2 0x08
-#define RW_L3 0x0c
-#define RW_L4 0x10
-#define RW_L5 0x14
-#define RW_L6 0x18
-#define RW_L7 0x1c
-#define RW_I0 0x20
-#define RW_I1 0x24
-#define RW_I2 0x28
-#define RW_I3 0x2c
-#define RW_I4 0x30
-#define RW_I5 0x34
-#define RW_I6 0x38
-#define RW_I7 0x3c
-
-/* Stack_frame offsets */
-#define SF_L0 0x00
-#define SF_L1 0x04
-#define SF_L2 0x08
-#define SF_L3 0x0c
-#define SF_L4 0x10
-#define SF_L5 0x14
-#define SF_L6 0x18
-#define SF_L7 0x1c
-#define SF_I0 0x20
-#define SF_I1 0x24
-#define SF_I2 0x28
-#define SF_I3 0x2c
-#define SF_I4 0x30
-#define SF_I5 0x34
-#define SF_FP 0x38
-#define SF_PC 0x3c
-#define SF_RETP 0x40
-#define SF_XARG0 0x44
-#define SF_XARG1 0x48
-#define SF_XARG2 0x4c
-#define SF_XARG3 0x50
-#define SF_XARG4 0x54
-#define SF_XARG5 0x58
-#define SF_XXARG 0x5c
-
-/* Stuff for the ptrace system call */
-#define PTRACE_SUNATTACH 10
-#define PTRACE_SUNDETACH 11
-#define PTRACE_GETREGS 12
-#define PTRACE_SETREGS 13
-#define PTRACE_GETFPREGS 14
-#define PTRACE_SETFPREGS 15
-#define PTRACE_READDATA 16
-#define PTRACE_WRITEDATA 17
-#define PTRACE_READTEXT 18
-#define PTRACE_WRITETEXT 19
-#define PTRACE_GETFPAREGS 20
-#define PTRACE_SETFPAREGS 21
-
-#define PTRACE_GETUCODE 29 /* stupid bsd-ism */
-
-#endif /* !(_SPARC_PTRACE_H) */
diff --git a/arch/sparc/include/asm/sections.h b/arch/sparc/include/asm/sections.h
deleted file mode 100644
index 65ad891dde..0000000000
--- a/arch/sparc/include/asm/sections.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/*
- * Copyright (c) 2012 The Chromium OS Authors.
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __ASM_SPARC_SECTIONS_H
-#define __ASM_SPARC_SECTIONS_H
-
-#include <asm-generic/sections.h>
-
-#endif
diff --git a/arch/sparc/include/asm/srmmu.h b/arch/sparc/include/asm/srmmu.h
deleted file mode 100644
index 8da2f67f1c..0000000000
--- a/arch/sparc/include/asm/srmmu.h
+++ /dev/null
@@ -1,287 +0,0 @@
-/* SRMMU page table defines and code,
- * taken from the SPARC port of Linux
- *
- * Copyright (C) 2007 Daniel Hellstrom (daniel@gaisler.com)
- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __SPARC_SRMMU_H__
-#define __SPARC_SRMMU_H__
-
-#include <asm/asi.h>
-#include <asm/page.h>
-
-/* Number of contexts is implementation-dependent; 64k is the most we support */
-#define SRMMU_MAX_CONTEXTS 65536
-
-/* PMD_SHIFT determines the size of the area a second-level page table entry can map */
-#define SRMMU_REAL_PMD_SHIFT 18
-#define SRMMU_REAL_PMD_SIZE (1UL << SRMMU_REAL_PMD_SHIFT)
-#define SRMMU_REAL_PMD_MASK (~(SRMMU_REAL_PMD_SIZE-1))
-#define SRMMU_REAL_PMD_ALIGN(__addr) (((__addr)+SRMMU_REAL_PMD_SIZE-1)&SRMMU_REAL_PMD_MASK)
-
-/* PGDIR_SHIFT determines what a third-level page table entry can map */
-#define SRMMU_PGDIR_SHIFT 24
-#define SRMMU_PGDIR_SIZE (1UL << SRMMU_PGDIR_SHIFT)
-#define SRMMU_PGDIR_MASK (~(SRMMU_PGDIR_SIZE-1))
-#define SRMMU_PGDIR_ALIGN(addr) (((addr)+SRMMU_PGDIR_SIZE-1)&SRMMU_PGDIR_MASK)
-
-#define SRMMU_REAL_PTRS_PER_PTE 64
-#define SRMMU_REAL_PTRS_PER_PMD 64
-#define SRMMU_PTRS_PER_PGD 256
-
-#define SRMMU_REAL_PTE_TABLE_SIZE (SRMMU_REAL_PTRS_PER_PTE*4)
-#define SRMMU_PMD_TABLE_SIZE (SRMMU_REAL_PTRS_PER_PMD*4)
-#define SRMMU_PGD_TABLE_SIZE (SRMMU_PTRS_PER_PGD*4)
-
-/*
- * To support pagetables in highmem, Linux introduces APIs which
- * return struct page* and generally manipulate page tables when
- * they are not mapped into kernel space. Our hardware page tables
- * are smaller than pages. We lump hardware tabes into big, page sized
- * software tables.
- *
- * PMD_SHIFT determines the size of the area a second-level page table entry
- * can map, and our pmd_t is 16 times larger than normal. The values which
- * were once defined here are now generic for 4c and srmmu, so they're
- * found in pgtable.h.
- */
-#define SRMMU_PTRS_PER_PMD 4
-
-/* Definition of the values in the ET field of PTD's and PTE's */
-#define SRMMU_ET_MASK 0x3
-#define SRMMU_ET_INVALID 0x0
-#define SRMMU_ET_PTD 0x1
-#define SRMMU_ET_PTE 0x2
-#define SRMMU_ET_REPTE 0x3 /* AIEEE, SuperSparc II reverse endian page! */
-
-/* Physical page extraction from PTP's and PTE's. */
-#define SRMMU_CTX_PMASK 0xfffffff0
-#define SRMMU_PTD_PMASK 0xfffffff0
-#define SRMMU_PTE_PMASK 0xffffff00
-
-/* The pte non-page bits. Some notes:
- * 1) cache, dirty, valid, and ref are frobbable
- * for both supervisor and user pages.
- * 2) exec and write will only give the desired effect
- * on user pages
- * 3) use priv and priv_readonly for changing the
- * characteristics of supervisor ptes
- */
-#define SRMMU_CACHE 0x80
-#define SRMMU_DIRTY 0x40
-#define SRMMU_REF 0x20
-#define SRMMU_NOREAD 0x10
-#define SRMMU_EXEC 0x08
-#define SRMMU_WRITE 0x04
-#define SRMMU_VALID 0x02 /* SRMMU_ET_PTE */
-#define SRMMU_PRIV 0x1c
-#define SRMMU_PRIV_RDONLY 0x18
-
-#define SRMMU_FILE 0x40 /* Implemented in software */
-
-#define SRMMU_PTE_FILE_SHIFT 8 /* == 32-PTE_FILE_MAX_BITS */
-
-#define SRMMU_CHG_MASK (0xffffff00 | SRMMU_REF | SRMMU_DIRTY)
-
-/* SRMMU swap entry encoding
- *
- * We use 5 bits for the type and 19 for the offset. This gives us
- * 32 swapfiles of 4GB each. Encoding looks like:
- *
- * oooooooooooooooooootttttRRRRRRRR
- * fedcba9876543210fedcba9876543210
- *
- * The bottom 8 bits are reserved for protection and status bits, especially
- * FILE and PRESENT.
- */
-#define SRMMU_SWP_TYPE_MASK 0x1f
-#define SRMMU_SWP_TYPE_SHIFT SRMMU_PTE_FILE_SHIFT
-#define SRMMU_SWP_OFF_MASK 0x7ffff
-#define SRMMU_SWP_OFF_SHIFT (SRMMU_PTE_FILE_SHIFT + 5)
-
-/* Some day I will implement true fine grained access bits for
- * user pages because the SRMMU gives us the capabilities to
- * enforce all the protection levels that vma's can have.
- * XXX But for now...
- */
-#define SRMMU_PAGE_NONE __pgprot(SRMMU_CACHE | \
- SRMMU_PRIV | SRMMU_REF)
-#define SRMMU_PAGE_SHARED __pgprot(SRMMU_VALID | SRMMU_CACHE | \
- SRMMU_EXEC | SRMMU_WRITE | SRMMU_REF)
-#define SRMMU_PAGE_COPY __pgprot(SRMMU_VALID | SRMMU_CACHE | \
- SRMMU_EXEC | SRMMU_REF)
-#define SRMMU_PAGE_RDONLY __pgprot(SRMMU_VALID | SRMMU_CACHE | \
- SRMMU_EXEC | SRMMU_REF)
-#define SRMMU_PAGE_KERNEL __pgprot(SRMMU_VALID | SRMMU_CACHE | SRMMU_PRIV | \
- SRMMU_DIRTY | SRMMU_REF)
-
-/* SRMMU Register addresses in ASI 0x4. These are valid for all
- * current SRMMU implementations that exist.
- */
-#define SRMMU_CTRL_REG 0x00000000
-#define SRMMU_CTXTBL_PTR 0x00000100
-#define SRMMU_CTX_REG 0x00000200
-#define SRMMU_FAULT_STATUS 0x00000300
-#define SRMMU_FAULT_ADDR 0x00000400
-
-#define WINDOW_FLUSH(tmp1, tmp2) \
- mov 0, tmp1; \
-98: ld [%g6 + TI_UWINMASK], tmp2; \
- orcc %g0, tmp2, %g0; \
- add tmp1, 1, tmp1; \
- bne 98b; \
- save %sp, -64, %sp; \
-99: subcc tmp1, 1, tmp1; \
- bne 99b; \
- restore %g0, %g0, %g0;
-
-#ifndef __ASSEMBLY__
-
-/* This makes sense. Honest it does - Anton */
-/* XXX Yes but it's ugly as sin. FIXME. -KMW */
-extern void *srmmu_nocache_pool;
-#define __nocache_pa(VADDR) (((unsigned long)VADDR) - SRMMU_NOCACHE_VADDR + __pa((unsigned long)srmmu_nocache_pool))
-#define __nocache_va(PADDR) (__va((unsigned long)PADDR) - (unsigned long)srmmu_nocache_pool + SRMMU_NOCACHE_VADDR)
-#define __nocache_fix(VADDR) __va(__nocache_pa(VADDR))
-
-/* Accessing the MMU control register. */
-static __inline__ unsigned int srmmu_get_mmureg(void)
-{
- unsigned int retval;
- __asm__ __volatile__("lda [%%g0] %1, %0\n\t":
- "=r"(retval):"i"(ASI_M_MMUREGS));
- return retval;
-}
-
-static __inline__ void srmmu_set_mmureg(unsigned long regval)
-{
- __asm__ __volatile__("sta %0, [%%g0] %1\n\t"::"r"(regval),
- "i"(ASI_M_MMUREGS):"memory");
-
-}
-
-static __inline__ void srmmu_set_ctable_ptr(unsigned long paddr)
-{
- paddr = ((paddr >> 4) & SRMMU_CTX_PMASK);
- __asm__ __volatile__("sta %0, [%1] %2\n\t"::"r"(paddr),
- "r"(SRMMU_CTXTBL_PTR),
- "i"(ASI_M_MMUREGS):"memory");
-}
-
-static __inline__ unsigned long srmmu_get_ctable_ptr(void)
-{
- unsigned int retval;
-
- __asm__ __volatile__("lda [%1] %2, %0\n\t":
- "=r"(retval):
- "r"(SRMMU_CTXTBL_PTR), "i"(ASI_M_MMUREGS));
- return (retval & SRMMU_CTX_PMASK) << 4;
-}
-
-static __inline__ void srmmu_set_context(int context)
-{
- __asm__ __volatile__("sta %0, [%1] %2\n\t"::"r"(context),
- "r"(SRMMU_CTX_REG), "i"(ASI_M_MMUREGS):"memory");
-}
-
-static __inline__ int srmmu_get_context(void)
-{
- register int retval;
- __asm__ __volatile__("lda [%1] %2, %0\n\t":
- "=r"(retval):
- "r"(SRMMU_CTX_REG), "i"(ASI_M_MMUREGS));
- return retval;
-}
-
-static __inline__ unsigned int srmmu_get_fstatus(void)
-{
- unsigned int retval;
-
- __asm__ __volatile__("lda [%1] %2, %0\n\t":
- "=r"(retval):
- "r"(SRMMU_FAULT_STATUS), "i"(ASI_M_MMUREGS));
- return retval;
-}
-
-static __inline__ unsigned int srmmu_get_faddr(void)
-{
- unsigned int retval;
-
- __asm__ __volatile__("lda [%1] %2, %0\n\t":
- "=r"(retval):
- "r"(SRMMU_FAULT_ADDR), "i"(ASI_M_MMUREGS));
- return retval;
-}
-
-/* This is guaranteed on all SRMMU's. */
-static __inline__ void srmmu_flush_whole_tlb(void)
-{
- __asm__ __volatile__("sta %%g0, [%0] %1\n\t"::"r"(0x400), /* Flush entire TLB!! */
- "i"(ASI_M_FLUSH_PROBE):"memory");
-
-}
-
-/* These flush types are not available on all chips... */
-static __inline__ void srmmu_flush_tlb_ctx(void)
-{
- __asm__ __volatile__("sta %%g0, [%0] %1\n\t"::"r"(0x300), /* Flush TLB ctx.. */
- "i"(ASI_M_FLUSH_PROBE):"memory");
-
-}
-
-static __inline__ void srmmu_flush_tlb_region(unsigned long addr)
-{
- addr &= SRMMU_PGDIR_MASK;
- __asm__ __volatile__("sta %%g0, [%0] %1\n\t"::"r"(addr | 0x200), /* Flush TLB region.. */
- "i"(ASI_M_FLUSH_PROBE):"memory");
-
-}
-
-static __inline__ void srmmu_flush_tlb_segment(unsigned long addr)
-{
- addr &= SRMMU_REAL_PMD_MASK;
- __asm__ __volatile__("sta %%g0, [%0] %1\n\t"::"r"(addr | 0x100), /* Flush TLB segment.. */
- "i"(ASI_M_FLUSH_PROBE):"memory");
-
-}
-
-static __inline__ void srmmu_flush_tlb_page(unsigned long page)
-{
- page &= PAGE_MASK;
- __asm__ __volatile__("sta %%g0, [%0] %1\n\t"::"r"(page), /* Flush TLB page.. */
- "i"(ASI_M_FLUSH_PROBE):"memory");
-
-}
-
-static __inline__ unsigned long srmmu_hwprobe(unsigned long vaddr)
-{
- unsigned long retval;
-
- vaddr &= PAGE_MASK;
- __asm__ __volatile__("lda [%1] %2, %0\n\t":
- "=r"(retval):
- "r"(vaddr | 0x400), "i"(ASI_M_FLUSH_PROBE));
-
- return retval;
-}
-
-static __inline__ int srmmu_get_pte(unsigned long addr)
-{
- register unsigned long entry;
-
- __asm__ __volatile__("\n\tlda [%1] %2,%0\n\t":
- "=r"(entry):
- "r"((addr & 0xfffff000) | 0x400),
- "i"(ASI_M_FLUSH_PROBE));
- return entry;
-}
-
-extern unsigned long (*srmmu_read_physical) (unsigned long paddr);
-extern void (*srmmu_write_physical) (unsigned long paddr, unsigned long word);
-
-#endif /* !(__ASSEMBLY__) */
-
-#endif /* !(__SPARC_SRMMU_H__) */
diff --git a/arch/sparc/include/asm/stack.h b/arch/sparc/include/asm/stack.h
deleted file mode 100644
index fcab92096b..0000000000
--- a/arch/sparc/include/asm/stack.h
+++ /dev/null
@@ -1,148 +0,0 @@
-/* SPARC stack layout Macros and structures,
- * mainly taken from BCC (the Bare C compiler for
- * SPARC LEON2/3) sources.
- *
- * (C) Copyright 2007
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __SPARC_STACK_H__
-#define __SPARC_STACK_H__
-
-#include <asm/ptrace.h>
-
-#ifndef __ASSEMBLER__
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define PT_REGS_SZ sizeof(struct pt_regs)
-
-/* A Sparc stack frame */
- struct sparc_stackframe_regs {
- unsigned long sf_locals[8];
- unsigned long sf_ins[6];
- struct sparc_stackframe_regs *sf_fp;
- unsigned long sf_callers_pc;
- char *sf_structptr;
- unsigned long sf_xargs[6];
- unsigned long sf_xxargs[1];
- };
-#define SF_REGS_SZ sizeof(struct sparc_stackframe_regs)
-
-/* A register window */
- struct sparc_regwindow_regs {
- unsigned long locals[8];
- unsigned long ins[8];
- };
-#define RW_REGS_SZ sizeof(struct sparc_regwindow_regs)
-
-/* A fpu window */
- struct sparc_fpuwindow_regs {
- unsigned long locals[32];
- unsigned long fsr;
- unsigned long lastctx;
- };
-#define FW_REGS_SZ sizeof(struct sparc_fpuwindow_regs)
-
-#ifdef __cplusplus
-}
-#endif
-#else
-#define PT_REGS_SZ 0x50 /* 20*4 */
-#define SF_REGS_SZ 0x60 /* 24*4 */
-#define RW_REGS_SZ 0x20 /* 16*4 */
-#define FW_REGS_SZ 0x88 /* 34*4 */
-#endif /* !ASM */
-
-/* These are for pt_regs. */
-#define PT_PSR 0x0
-#define PT_PC 0x4
-#define PT_NPC 0x8
-#define PT_Y 0xc
-#define PT_G0 0x10
-#define PT_WIM PT_G0
-#define PT_G1 0x14
-#define PT_G2 0x18
-#define PT_G3 0x1c
-#define PT_G4 0x20
-#define PT_G5 0x24
-#define PT_G6 0x28
-#define PT_G7 0x2c
-#define PT_I0 0x30
-#define PT_I1 0x34
-#define PT_I2 0x38
-#define PT_I3 0x3c
-#define PT_I4 0x40
-#define PT_I5 0x44
-#define PT_I6 0x48
-#define PT_FP PT_I6
-#define PT_I7 0x4c
-
-/* Stack_frame offsets */
-#define SF_L0 0x00
-#define SF_L1 0x04
-#define SF_L2 0x08
-#define SF_L3 0x0c
-#define SF_L4 0x10
-#define SF_L5 0x14
-#define SF_L6 0x18
-#define SF_L7 0x1c
-#define SF_I0 0x20
-#define SF_I1 0x24
-#define SF_I2 0x28
-#define SF_I3 0x2c
-#define SF_I4 0x30
-#define SF_I5 0x34
-#define SF_FP 0x38
-#define SF_PC 0x3c
-#define SF_RETP 0x40
-#define SF_XARG0 0x44
-#define SF_XARG1 0x48
-#define SF_XARG2 0x4c
-#define SF_XARG3 0x50
-#define SF_XARG4 0x54
-#define SF_XARG5 0x58
-#define SF_XXARG 0x5c
-
-/* Reg_window offsets */
-#define RW_L0 0x00
-#define RW_L1 0x04
-#define RW_L2 0x08
-#define RW_L3 0x0c
-#define RW_L4 0x10
-#define RW_L5 0x14
-#define RW_L6 0x18
-#define RW_L7 0x1c
-#define RW_I0 0x20
-#define RW_I1 0x24
-#define RW_I2 0x28
-#define RW_I3 0x2c
-#define RW_I4 0x30
-#define RW_I5 0x34
-#define RW_I6 0x38
-#define RW_I7 0x3c
-
-/* Fpu_window offsets */
-#define FW_F0 0x00
-#define FW_F2 0x08
-#define FW_F4 0x10
-#define FW_F6 0x18
-#define FW_F8 0x20
-#define FW_F10 0x28
-#define FW_F12 0x30
-#define FW_F14 0x38
-#define FW_F16 0x40
-#define FW_F18 0x48
-#define FW_F20 0x50
-#define FW_F22 0x58
-#define FW_F24 0x60
-#define FW_F26 0x68
-#define FW_F28 0x70
-#define FW_F30 0x78
-#define FW_FSR 0x80
-
-#endif
diff --git a/arch/sparc/include/asm/string.h b/arch/sparc/include/asm/string.h
deleted file mode 100644
index d9cc5dba62..0000000000
--- a/arch/sparc/include/asm/string.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * (C) Copyright 2000 - 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2007
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _SPARC_STRING_H_
-#define _SPARC_STRING_H_
-
-/*
-#define __HAVE_ARCH_STRCPY
-#define __HAVE_ARCH_STRNCPY
-#define __HAVE_ARCH_STRLEN
-#define __HAVE_ARCH_STRCMP
-#define __HAVE_ARCH_STRCAT
-#define __HAVE_ARCH_MEMSET
-#define __HAVE_ARCH_BCOPY
-#define __HAVE_ARCH_MEMCPY
-#define __HAVE_ARCH_MEMMOVE
-#define __HAVE_ARCH_MEMCMP
-#define __HAVE_ARCH_MEMCHR
-*/
-
-extern int strcasecmp(const char *, const char *);
-extern int strncasecmp(const char *, const char *, __kernel_size_t);
-extern char *strcpy(char *, const char *);
-extern char *strncpy(char *, const char *, __kernel_size_t);
-extern __kernel_size_t strlen(const char *);
-extern int strcmp(const char *, const char *);
-extern char *strcat(char *, const char *);
-extern void *memset(void *, int, __kernel_size_t);
-extern void *memcpy(void *, const void *, __kernel_size_t);
-extern void *memmove(void *, const void *, __kernel_size_t);
-extern int memcmp(const void *, const void *, __kernel_size_t);
-extern void *memchr(const void *, int, __kernel_size_t);
-
-#endif
diff --git a/arch/sparc/include/asm/types.h b/arch/sparc/include/asm/types.h
deleted file mode 100644
index 72030b264e..0000000000
--- a/arch/sparc/include/asm/types.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * (C) Copyright 2000 - 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _SPARC_TYPES_H
-#define _SPARC_TYPES_H
-
-#ifndef __ASSEMBLY__
-
-typedef unsigned short umode_t;
-
-typedef __signed__ char __s8;
-typedef unsigned char __u8;
-
-typedef __signed__ short __s16;
-typedef unsigned short __u16;
-
-typedef __signed__ int __s32;
-typedef unsigned int __u32;
-
-#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
-typedef __signed__ long long __s64;
-typedef unsigned long long __u64;
-#endif
-
-typedef struct {
- __u32 u[4];
-} __attribute__((aligned(16))) vector128;
-
-#ifdef __KERNEL__
-/*
- * These aren't exported outside the kernel to avoid name space clashes
- */
-typedef signed char s8;
-typedef unsigned char u8;
-
-typedef signed short s16;
-typedef unsigned short u16;
-
-typedef signed int s32;
-typedef unsigned int u32;
-
-typedef signed long long s64;
-typedef unsigned long long u64;
-
-#define BITS_PER_LONG 32
-
-/* DMA addresses are 32-bits wide */
-typedef u32 dma_addr_t;
-
-typedef unsigned long phys_addr_t;
-typedef unsigned long phys_size_t;
-
-#endif /* __KERNEL__ */
-#endif /* __ASSEMBLY__ */
-
-#endif
diff --git a/arch/sparc/include/asm/u-boot.h b/arch/sparc/include/asm/u-boot.h
deleted file mode 100644
index 75ac7dc62a..0000000000
--- a/arch/sparc/include/asm/u-boot.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * (C) Copyright 2000 - 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2007, 2015
- * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __U_BOOT_H__
-#define __U_BOOT_H__
-
-/* Currently, this board information is not passed to
- * Linux kernel from U-Boot, but may be passed to other
- * Operating systems. This is because U-Boot emulates
- * a SUN PROM loader (from Linux point of view).
- */
-#include <asm-generic/u-boot.h>
-
-/* For image.h:image_check_target_arch() */
-#define IH_ARCH_DEFAULT IH_ARCH_SPARC
-
-#endif
diff --git a/arch/sparc/include/asm/unaligned.h b/arch/sparc/include/asm/unaligned.h
deleted file mode 100644
index 0e646f7fa9..0000000000
--- a/arch/sparc/include/asm/unaligned.h
+++ /dev/null
@@ -1,10 +0,0 @@
-#ifndef _ASM_SPARC_UNALIGNED_H
-#define _ASM_SPARC_UNALIGNED_H
-
-/*
- * The SPARC can not do unaligned accesses, it must be split into multiple
- * byte accesses. The SPARC is in big endian mode.
- */
-#include <asm-generic/unaligned.h>
-
-#endif /* _ASM_SPARC_UNALIGNED_H */
diff --git a/arch/sparc/include/asm/winmacro.h b/arch/sparc/include/asm/winmacro.h
deleted file mode 100644
index 916ee9c5a3..0000000000
--- a/arch/sparc/include/asm/winmacro.h
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * Added to U-Boot,
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com
- * Copyright (C) 2007
- *
- * LEON2/3 LIBIO low-level routines
- * Written by Jiri Gaisler.
- * Copyright (C) 2004 Gaisler Research AB
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __SPARC_WINMACRO_H__
-#define __SPARC_WINMACRO_H__
-
-#include <asm/asmmacro.h>
-#include <asm/stack.h>
-
-/* Store the register window onto the 8-byte aligned area starting
- * at %reg. It might be %sp, it might not, we don't care.
- */
-#define RW_STORE(reg) \
- std %l0, [%reg + RW_L0]; \
- std %l2, [%reg + RW_L2]; \
- std %l4, [%reg + RW_L4]; \
- std %l6, [%reg + RW_L6]; \
- std %i0, [%reg + RW_I0]; \
- std %i2, [%reg + RW_I2]; \
- std %i4, [%reg + RW_I4]; \
- std %i6, [%reg + RW_I6];
-
-/* Load a register window from the area beginning at %reg. */
-#define RW_LOAD(reg) \
- ldd [%reg + RW_L0], %l0; \
- ldd [%reg + RW_L2], %l2; \
- ldd [%reg + RW_L4], %l4; \
- ldd [%reg + RW_L6], %l6; \
- ldd [%reg + RW_I0], %i0; \
- ldd [%reg + RW_I2], %i2; \
- ldd [%reg + RW_I4], %i4; \
- ldd [%reg + RW_I6], %i6;
-
-/* Loading and storing struct pt_reg trap frames. */
-#define PT_LOAD_INS(base_reg) \
- ldd [%base_reg + SF_REGS_SZ + PT_I0], %i0; \
- ldd [%base_reg + SF_REGS_SZ + PT_I2], %i2; \
- ldd [%base_reg + SF_REGS_SZ + PT_I4], %i4; \
- ldd [%base_reg + SF_REGS_SZ + PT_I6], %i6;
-
-#define PT_LOAD_GLOBALS(base_reg) \
- ld [%base_reg + SF_REGS_SZ + PT_G1], %g1; \
- ldd [%base_reg + SF_REGS_SZ + PT_G2], %g2; \
- ldd [%base_reg + SF_REGS_SZ + PT_G4], %g4; \
- ldd [%base_reg + SF_REGS_SZ + PT_G6], %g6;
-
-#define PT_LOAD_YREG(base_reg, scratch) \
- ld [%base_reg + SF_REGS_SZ + PT_Y], %scratch; \
- wr %scratch, 0x0, %y;
-
-#define PT_LOAD_PRIV(base_reg, pt_psr, pt_pc, pt_npc) \
- ld [%base_reg + SF_REGS_SZ + PT_PSR], %pt_psr; \
- ld [%base_reg + SF_REGS_SZ + PT_PC], %pt_pc; \
- ld [%base_reg + SF_REGS_SZ + PT_NPC], %pt_npc;
-
-#define PT_LOAD_ALL(base_reg, pt_psr, pt_pc, pt_npc, scratch) \
- PT_LOAD_YREG(base_reg, scratch) \
- PT_LOAD_INS(base_reg) \
- PT_LOAD_GLOBALS(base_reg) \
- PT_LOAD_PRIV(base_reg, pt_psr, pt_pc, pt_npc)
-
-#define PT_STORE_INS(base_reg) \
- std %i0, [%base_reg + SF_REGS_SZ + PT_I0]; \
- std %i2, [%base_reg + SF_REGS_SZ + PT_I2]; \
- std %i4, [%base_reg + SF_REGS_SZ + PT_I4]; \
- std %i6, [%base_reg + SF_REGS_SZ + PT_I6];
-
-#define PT_STORE_GLOBALS(base_reg) \
- st %g1, [%base_reg + SF_REGS_SZ + PT_G1]; \
- std %g2, [%base_reg + SF_REGS_SZ + PT_G2]; \
- std %g4, [%base_reg + SF_REGS_SZ + PT_G4]; \
- std %g6, [%base_reg + SF_REGS_SZ + PT_G6];
-
-#define PT_STORE_YREG(base_reg, scratch) \
- rd %y, %scratch; \
- st %scratch, [%base_reg + SF_REGS_SZ + PT_Y];
-
-#define PT_STORE_PRIV(base_reg, pt_psr, pt_pc, pt_npc) \
- st %pt_psr, [%base_reg + SF_REGS_SZ + PT_PSR]; \
- st %pt_pc, [%base_reg + SF_REGS_SZ + PT_PC]; \
- st %pt_npc, [%base_reg + SF_REGS_SZ + PT_NPC];
-
-#define PT_STORE_ALL(base_reg, reg_psr, reg_pc, reg_npc, g_scratch) \
- PT_STORE_PRIV(base_reg, reg_psr, reg_pc, reg_npc) \
- PT_STORE_GLOBALS(base_reg) \
- PT_STORE_YREG(base_reg, g_scratch) \
- PT_STORE_INS(base_reg)
-
-/* Store the fpu register window*/
-#define FW_STORE(reg) \
- std %f0, [reg + FW_F0]; \
- std %f2, [reg + FW_F2]; \
- std %f4, [reg + FW_F4]; \
- std %f6, [reg + FW_F6]; \
- std %f8, [reg + FW_F8]; \
- std %f10, [reg + FW_F10]; \
- std %f12, [reg + FW_F12]; \
- std %f14, [reg + FW_F14]; \
- std %f16, [reg + FW_F16]; \
- std %f18, [reg + FW_F18]; \
- std %f20, [reg + FW_F20]; \
- std %f22, [reg + FW_F22]; \
- std %f24, [reg + FW_F24]; \
- std %f26, [reg + FW_F26]; \
- std %f28, [reg + FW_F28]; \
- std %f30, [reg + FW_F30]; \
- st %fsr, [reg + FW_FSR];
-
-/* Load a fpu register window from the area beginning at reg. */
-#define FW_LOAD(reg) \
- ldd [reg + FW_F0], %f0; \
- ldd [reg + FW_F2], %f2; \
- ldd [reg + FW_F4], %f4; \
- ldd [reg + FW_F6], %f6; \
- ldd [reg + FW_F8], %f8; \
- ldd [reg + FW_F10], %f10; \
- ldd [reg + FW_F12], %f12; \
- ldd [reg + FW_F14], %f14; \
- ldd [reg + FW_F16], %f16; \
- ldd [reg + FW_F18], %f18; \
- ldd [reg + FW_F20], %f20; \
- ldd [reg + FW_F22], %f22; \
- ldd [reg + FW_F24], %f24; \
- ldd [reg + FW_F26], %f26; \
- ldd [reg + FW_F28], %f28; \
- ldd [reg + FW_F30], %f30; \
- ld [reg + FW_FSR], %fsr;
-
-#endif