diff options
Diffstat (limited to 'arch/x86/dts/chromebook_coral.dts')
| -rw-r--r-- | arch/x86/dts/chromebook_coral.dts | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index d66e128ae6..a846022095 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -102,12 +102,13 @@ }; cpus { - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; #address-cells = <1>; #size-cells = <0>; cpu_0: cpu@0 { - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; + u-boot,dm-spl; device_type = "cpu"; compatible = "intel,apl-cpu"; reg = <0>; @@ -174,6 +175,9 @@ */ fsp_s: fsp-s { }; + fsp_m: fsp-m { + u-boot,dm-spl; + }; nhlt { intel,dmic-channels = <4>; @@ -181,12 +185,14 @@ }; punit@0,1 { - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; + u-boot,dm-spl; reg = <0x00000800 0 0 0 0>; compatible = "intel,apl-punit"; }; gma@2,0 { + u-boot,dm-pre-proper; reg = <0x00001000 0 0 0 0>; compatible = "fsp-fb"; }; @@ -321,7 +327,8 @@ }; spi: fast-spi@d,2 { - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; + u-boot,dm-spl; reg = <0x02006a10 0 0 0 0>; #address-cells = <1>; #size-cells = <0>; @@ -332,7 +339,8 @@ fwstore_spi: spi-flash@0 { #size-cells = <1>; #address-cells = <1>; - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; + u-boot,dm-spl; reg = <0>; compatible = "winbond,w25q128fw", "jedec,spi-nor"; @@ -574,7 +582,7 @@ #size-cells = <0>; u-boot,dm-pre-reloc; cros_ec: cros-ec { - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; compatible = "google,cros-ec-lpc"; reg = <0x204 1 0x200 1 0x880 0x80>; @@ -650,7 +658,9 @@ PAD_CFG_NF(LPC_CLKRUNB, UP_20K, DEEP, NF1) /* LPC_CLKRUN_N */ PAD_CFG_NF(LPC_FRAMEB, NATIVE, DEEP, NF1) /* LPC_FRAME_N */ >; +}; +&fsp_m { fspm,package = <PACKAGE_BGA>; fspm,profile = <PROFILE_LPDDR4_2400_24_22_22>; fspm,memory-down = <MEMORY_DOWN_YES>; |