diff options
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/cpu/baytrail/cpu.c | 4 | ||||
-rw-r--r-- | arch/x86/cpu/broadwell/cpu.c | 4 | ||||
-rw-r--r-- | arch/x86/cpu/ivybridge/cpu.c | 4 | ||||
-rw-r--r-- | arch/x86/cpu/quark/quark.c | 4 | ||||
-rw-r--r-- | arch/x86/include/asm/fsp2/fsp_api.h | 8 | ||||
-rw-r--r-- | arch/x86/lib/fsp2/fsp_init.c | 4 | ||||
-rw-r--r-- | arch/x86/lib/spl.c | 5 | ||||
-rw-r--r-- | arch/x86/lib/tpl.c | 10 |
8 files changed, 26 insertions, 17 deletions
diff --git a/arch/x86/cpu/baytrail/cpu.c b/arch/x86/cpu/baytrail/cpu.c index 309a50a116..68bf40ba8e 100644 --- a/arch/x86/cpu/baytrail/cpu.c +++ b/arch/x86/cpu/baytrail/cpu.c @@ -8,6 +8,7 @@ #include <common.h> #include <cpu.h> #include <dm.h> +#include <event.h> #include <init.h> #include <log.h> #include <pci.h> @@ -44,7 +45,7 @@ static void hsuart_clock_set(void *base) * Configure the internal clock of both SIO HS-UARTs, if they are enabled * via FSP */ -int arch_cpu_init_dm(void) +static int baytrail_uart_init(void *ctx, struct event *event) { struct udevice *dev; void *base; @@ -63,6 +64,7 @@ int arch_cpu_init_dm(void) return 0; } +EVENT_SPY(EVT_DM_POST_INIT, baytrail_uart_init); static void set_max_freq(void) { diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c index 3832a97f2c..2adcf4b242 100644 --- a/arch/x86/cpu/broadwell/cpu.c +++ b/arch/x86/cpu/broadwell/cpu.c @@ -8,6 +8,7 @@ #include <common.h> #include <dm.h> #include <cpu.h> +#include <event.h> #include <init.h> #include <log.h> #include <asm/cpu.h> @@ -24,7 +25,7 @@ #include <asm/arch/pch.h> #include <asm/arch/rcb.h> -int arch_cpu_init_dm(void) +static int broadwell_init_cpu(void *ctx, struct event *event) { struct udevice *dev; int ret; @@ -41,6 +42,7 @@ int arch_cpu_init_dm(void) return 0; } +EVENT_SPY(EVT_DM_POST_INIT, broadwell_init_cpu); void set_max_freq(void) { diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index a02f4f9600..cffc5d5b1d 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -14,6 +14,7 @@ #include <cpu_func.h> #include <dm.h> #include <errno.h> +#include <event.h> #include <fdtdec.h> #include <init.h> #include <log.h> @@ -53,7 +54,7 @@ int arch_cpu_init(void) return x86_cpu_init_f(); } -int arch_cpu_init_dm(void) +static int ivybridge_cpu_init(void *ctx, struct event *ev) { struct pci_controller *hose; struct udevice *bus, *dev; @@ -85,6 +86,7 @@ int arch_cpu_init_dm(void) return 0; } +EVENT_SPY(EVT_DM_POST_INIT, ivybridge_cpu_init); #define PCH_EHCI0_TEMP_BAR0 0xe8000000 #define PCH_EHCI1_TEMP_BAR0 0xe8000400 diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c index 30b4711b9a..e016fae04f 100644 --- a/arch/x86/cpu/quark/quark.c +++ b/arch/x86/cpu/quark/quark.c @@ -5,6 +5,7 @@ #include <common.h> #include <cpu_func.h> +#include <event.h> #include <init.h> #include <mmc.h> #include <asm/cache.h> @@ -247,7 +248,7 @@ int arch_cpu_init(void) return 0; } -int arch_cpu_init_dm(void) +static int quark_init_pcie(void *ctx, struct event *event) { /* * Initialize PCIe controller @@ -262,6 +263,7 @@ int arch_cpu_init_dm(void) return 0; } +EVENT_SPY(EVT_DM_POST_INIT, quark_init_pcie); int checkcpu(void) { diff --git a/arch/x86/include/asm/fsp2/fsp_api.h b/arch/x86/include/asm/fsp2/fsp_api.h index dccbfa45a1..ca3f6848b6 100644 --- a/arch/x86/include/asm/fsp2/fsp_api.h +++ b/arch/x86/include/asm/fsp2/fsp_api.h @@ -60,4 +60,12 @@ int fsp_silicon_init(bool s3wake, bool use_spi_flash); typedef asmlinkage int (*fsp_silicon_init_func)(struct fsps_upd *params); +/** + * fsp_setup_pinctrl() - Set up the pinctrl for FSP + * + * @ctx: Event context (not used) + * @event: Event information (not used) + */ +int fsp_setup_pinctrl(void *ctx, struct event *event); + #endif diff --git a/arch/x86/lib/fsp2/fsp_init.c b/arch/x86/lib/fsp2/fsp_init.c index 5afdce1e0d..b15926e824 100644 --- a/arch/x86/lib/fsp2/fsp_init.c +++ b/arch/x86/lib/fsp2/fsp_init.c @@ -9,6 +9,7 @@ #include <bootstage.h> #include <cbfs.h> #include <dm.h> +#include <event.h> #include <init.h> #include <log.h> #include <spi.h> @@ -18,7 +19,7 @@ #include <dm/uclass-internal.h> #include <asm/fsp2/fsp_internal.h> -int arch_cpu_init_dm(void) +int fsp_setup_pinctrl(void *ctx, struct event *event) { struct udevice *dev; ofnode node; @@ -41,6 +42,7 @@ int arch_cpu_init_dm(void) return ret; } +EVENT_SPY(EVT_DM_POST_INIT, fsp_setup_pinctrl); #if !defined(CONFIG_TPL_BUILD) binman_sym_declare(ulong, intel_fsp_m, image_pos); diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index b18c1cd609..2d50c62964 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -17,6 +17,7 @@ #include <syscon.h> #include <asm/cpu.h> #include <asm/cpu_common.h> +#include <asm/fsp2/fsp_api.h> #include <asm/global_data.h> #include <asm/mrccache.h> #include <asm/mtrr.h> @@ -27,7 +28,7 @@ DECLARE_GLOBAL_DATA_PTR; -__weak int arch_cpu_init_dm(void) +__weak int fsp_setup_pinctrl(void *ctx, struct event *event) { return 0; } @@ -89,7 +90,7 @@ static int x86_spl_init(void) return ret; } #ifndef CONFIG_TPL - ret = arch_cpu_init_dm(); + ret = fsp_setup_pinctrl(NULL, NULL); if (ret) { debug("%s: arch_cpu_init_dm() failed\n", __func__); return ret; diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c index 5b57e53c2d..18b05b2f67 100644 --- a/arch/x86/lib/tpl.c +++ b/arch/x86/lib/tpl.c @@ -19,11 +19,6 @@ DECLARE_GLOBAL_DATA_PTR; -__weak int arch_cpu_init_dm(void) -{ - return 0; -} - static int x86_tpl_init(void) { int ret; @@ -44,11 +39,6 @@ static int x86_tpl_init(void) debug("%s: arch_cpu_init() failed\n", __func__); return ret; } - ret = arch_cpu_init_dm(); - if (ret) { - debug("%s: arch_cpu_init_dm() failed\n", __func__); - return ret; - } preloader_console_init(); return 0; |