2 files changed, 7 insertions, 1 deletions
diff --git a/arch/riscv/cpu/jh7110/Makefile b/arch/riscv/cpu/jh7110/Makefile
index 57a76f06b5..74ce2d8fbc 100644
--- a/arch/riscv/cpu/jh7110/Makefile
+++ b/arch/riscv/cpu/jh7110/Makefile
@@ -5,8 +5,8 @@
 ifeq ($(CONFIG_SPL_BUILD),y)
 obj-y += spl.o
 else
-obj-y += dram.o
 obj-y += cpu.o
 obj-$(CONFIG_STARFIVE_JH7110_L2CC_FLUSH) += cache.o
 endif
+obj-y += dram.o
 obj-y += pll.o
diff --git a/arch/riscv/cpu/jh7110/spl.c b/arch/riscv/cpu/jh7110/spl.c
index 2a49fbee10..cba9874459 100644
--- a/arch/riscv/cpu/jh7110/spl.c
+++ b/arch/riscv/cpu/jh7110/spl.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <log.h>
 #include <asm/csr.h>
+#include <init.h>
 
 #define CSR_U74_FEATURE_DISABLE	0x7c1
 
@@ -16,6 +17,11 @@ int spl_soc_init(void)
 	int ret;
 	struct udevice *dev;
 
+	/*read memory size info from eeprom and
+	 *init gd->ram_size variable
+	 */
+	dram_init();
+
 	/* DDR init */
 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 	if (ret) {