diff options
Diffstat (limited to 'board/freescale/ls1043ardb/ls1043ardb.c')
| -rw-r--r-- | board/freescale/ls1043ardb/ls1043ardb.c | 98 |
1 files changed, 49 insertions, 49 deletions
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c index 799900e9c9..741a4d64ea 100644 --- a/board/freescale/ls1043ardb/ls1043ardb.c +++ b/board/freescale/ls1043ardb/ls1043ardb.c @@ -33,42 +33,42 @@ DECLARE_GLOBAL_DATA_PTR; struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = { { "nor", - CONFIG_SYS_NOR_CSPR, - CONFIG_SYS_NOR_CSPR_EXT, - CONFIG_SYS_NOR_AMASK, - CONFIG_SYS_NOR_CSOR, + CFG_SYS_NOR_CSPR, + CFG_SYS_NOR_CSPR_EXT, + CFG_SYS_NOR_AMASK, + CFG_SYS_NOR_CSOR, { - CONFIG_SYS_NOR_FTIM0, - CONFIG_SYS_NOR_FTIM1, - CONFIG_SYS_NOR_FTIM2, - CONFIG_SYS_NOR_FTIM3 + CFG_SYS_NOR_FTIM0, + CFG_SYS_NOR_FTIM1, + CFG_SYS_NOR_FTIM2, + CFG_SYS_NOR_FTIM3 }, }, { "nand", - CONFIG_SYS_NAND_CSPR, - CONFIG_SYS_NAND_CSPR_EXT, - CONFIG_SYS_NAND_AMASK, - CONFIG_SYS_NAND_CSOR, + CFG_SYS_NAND_CSPR, + CFG_SYS_NAND_CSPR_EXT, + CFG_SYS_NAND_AMASK, + CFG_SYS_NAND_CSOR, { - CONFIG_SYS_NAND_FTIM0, - CONFIG_SYS_NAND_FTIM1, - CONFIG_SYS_NAND_FTIM2, - CONFIG_SYS_NAND_FTIM3 + CFG_SYS_NAND_FTIM0, + CFG_SYS_NAND_FTIM1, + CFG_SYS_NAND_FTIM2, + CFG_SYS_NAND_FTIM3 }, }, { "cpld", - CONFIG_SYS_CPLD_CSPR, - CONFIG_SYS_CPLD_CSPR_EXT, - CONFIG_SYS_CPLD_AMASK, - CONFIG_SYS_CPLD_CSOR, + CFG_SYS_CPLD_CSPR, + CFG_SYS_CPLD_CSPR_EXT, + CFG_SYS_CPLD_AMASK, + CFG_SYS_CPLD_CSOR, { - CONFIG_SYS_CPLD_FTIM0, - CONFIG_SYS_CPLD_FTIM1, - CONFIG_SYS_CPLD_FTIM2, - CONFIG_SYS_CPLD_FTIM3 + CFG_SYS_CPLD_FTIM0, + CFG_SYS_CPLD_FTIM1, + CFG_SYS_CPLD_FTIM2, + CFG_SYS_CPLD_FTIM3 }, } }; @@ -76,41 +76,41 @@ struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = { struct ifc_regs ifc_cfg_nand_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = { { "nand", - CONFIG_SYS_NAND_CSPR, - CONFIG_SYS_NAND_CSPR_EXT, - CONFIG_SYS_NAND_AMASK, - CONFIG_SYS_NAND_CSOR, + CFG_SYS_NAND_CSPR, + CFG_SYS_NAND_CSPR_EXT, + CFG_SYS_NAND_AMASK, + CFG_SYS_NAND_CSOR, { - CONFIG_SYS_NAND_FTIM0, - CONFIG_SYS_NAND_FTIM1, - CONFIG_SYS_NAND_FTIM2, - CONFIG_SYS_NAND_FTIM3 + CFG_SYS_NAND_FTIM0, + CFG_SYS_NAND_FTIM1, + CFG_SYS_NAND_FTIM2, + CFG_SYS_NAND_FTIM3 }, }, { "nor", - CONFIG_SYS_NOR_CSPR, - CONFIG_SYS_NOR_CSPR_EXT, - CONFIG_SYS_NOR_AMASK, - CONFIG_SYS_NOR_CSOR, + CFG_SYS_NOR_CSPR, + CFG_SYS_NOR_CSPR_EXT, + CFG_SYS_NOR_AMASK, + CFG_SYS_NOR_CSOR, { - CONFIG_SYS_NOR_FTIM0, - CONFIG_SYS_NOR_FTIM1, - CONFIG_SYS_NOR_FTIM2, - CONFIG_SYS_NOR_FTIM3 + CFG_SYS_NOR_FTIM0, + CFG_SYS_NOR_FTIM1, + CFG_SYS_NOR_FTIM2, + CFG_SYS_NOR_FTIM3 }, }, { "cpld", - CONFIG_SYS_CPLD_CSPR, - CONFIG_SYS_CPLD_CSPR_EXT, - CONFIG_SYS_CPLD_AMASK, - CONFIG_SYS_CPLD_CSOR, + CFG_SYS_CPLD_CSPR, + CFG_SYS_CPLD_CSPR_EXT, + CFG_SYS_CPLD_AMASK, + CFG_SYS_CPLD_CSOR, { - CONFIG_SYS_CPLD_FTIM0, - CONFIG_SYS_CPLD_FTIM1, - CONFIG_SYS_CPLD_FTIM2, - CONFIG_SYS_CPLD_FTIM3 + CFG_SYS_CPLD_FTIM0, + CFG_SYS_CPLD_FTIM1, + CFG_SYS_CPLD_FTIM2, + CFG_SYS_CPLD_FTIM3 }, } }; @@ -355,7 +355,7 @@ void nand_fixup(void) return; /* Change NAND Flash PGS/SPRZ configuration */ - csor = CONFIG_SYS_NAND_CSOR; + csor = CFG_SYS_NAND_CSOR; if ((csor & CSOR_NAND_PGS_MASK) == CSOR_NAND_PGS_2K) csor = (csor & ~(CSOR_NAND_PGS_MASK)) | CSOR_NAND_PGS_4K; |