diff options
Diffstat (limited to 'board/freescale/ls2080ardb')
-rw-r--r-- | board/freescale/ls2080ardb/MAINTAINERS | 2 | ||||
-rw-r--r-- | board/freescale/ls2080ardb/ddr.c | 12 | ||||
-rw-r--r-- | board/freescale/ls2080ardb/ls2080ardb.c | 37 |
3 files changed, 51 insertions, 0 deletions
diff --git a/board/freescale/ls2080ardb/MAINTAINERS b/board/freescale/ls2080ardb/MAINTAINERS index bbe56e2052..1f6014deed 100644 --- a/board/freescale/ls2080ardb/MAINTAINERS +++ b/board/freescale/ls2080ardb/MAINTAINERS @@ -9,8 +9,10 @@ F: configs/ls2080ardb_nand_defconfig LS2088A_QSPI-boot BOARD M: Priyanka Jain <priyanka.jain@nxp.com> +M: Rajesh Bhagat <rajesh.bhagat@nxp.com> S: Maintained F: configs/ls2088ardb_qspi_defconfig +F: configs/ls2088ardb_tfa_defconfig LS2081ARDB BOARD M: Priyanka Jain <priyanka.jain@nxp.com> diff --git a/board/freescale/ls2080ardb/ddr.c b/board/freescale/ls2080ardb/ddr.c index 26eb14b812..72ce872c75 100644 --- a/board/freescale/ls2080ardb/ddr.c +++ b/board/freescale/ls2080ardb/ddr.c @@ -160,6 +160,17 @@ found: } } +#ifdef CONFIG_TFABOOT +int fsl_initdram(void) +{ + gd->ram_size = tfa_get_dram_size(); + + if (!gd->ram_size) + gd->ram_size = fsl_ddr_sdram_size(); + + return 0; +} +#else int fsl_initdram(void) { #if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) @@ -172,3 +183,4 @@ int fsl_initdram(void) return 0; } +#endif /* CONFIG_TFABOOT */ diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index cf91bc30fb..20e1fce0fc 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -346,12 +346,47 @@ void board_quiesce_devices(void) void fsl_fdt_fixup_flash(void *fdt) { int offset; +#ifdef CONFIG_TFABOOT + u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE; + u32 val; +#endif /* * IFC and QSPI are muxed on board. * So disable IFC node in dts if QSPI is enabled or * disable QSPI node in dts in case QSPI is not enabled. */ +#ifdef CONFIG_TFABOOT + enum boot_src src = get_boot_src(); + bool disable_ifc = false; + + switch (src) { + case BOOT_SOURCE_IFC_NOR: + disable_ifc = false; + break; + case BOOT_SOURCE_QSPI_NOR: + disable_ifc = true; + break; + default: + val = in_le32(dcfg_ccsr + DCFG_RCWSR15 / 4); + if (DCFG_RCWSR15_IFCGRPABASE_QSPI == (val & (u32)0x3)) + disable_ifc = true; + break; + } + + if (disable_ifc) { + offset = fdt_path_offset(fdt, "/soc/ifc"); + + if (offset < 0) + offset = fdt_path_offset(fdt, "/ifc"); + } else { + offset = fdt_path_offset(fdt, "/soc/quadspi"); + + if (offset < 0) + offset = fdt_path_offset(fdt, "/quadspi"); + } + +#else #ifdef CONFIG_FSL_QSPI offset = fdt_path_offset(fdt, "/soc/ifc"); @@ -363,6 +398,8 @@ void fsl_fdt_fixup_flash(void *fdt) if (offset < 0) offset = fdt_path_offset(fdt, "/quadspi"); #endif +#endif + if (offset < 0) return; |