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-rw-r--r--board/sifive/unleashed/Kconfig52
-rw-r--r--board/sifive/unleashed/MAINTAINERS10
-rw-r--r--board/sifive/unleashed/Makefile9
-rw-r--r--board/sifive/unleashed/spl.c88
-rw-r--r--board/sifive/unleashed/unleashed.c128
5 files changed, 287 insertions, 0 deletions
diff --git a/board/sifive/unleashed/Kconfig b/board/sifive/unleashed/Kconfig
new file mode 100644
index 0000000000..dbffd59c98
--- /dev/null
+++ b/board/sifive/unleashed/Kconfig
@@ -0,0 +1,52 @@
+if TARGET_SIFIVE_UNLEASHED
+
+config SYS_BOARD
+ default "unleashed"
+
+config SYS_VENDOR
+ default "sifive"
+
+config SYS_CPU
+ default "fu540"
+
+config SYS_CONFIG_NAME
+ default "sifive-unleashed"
+
+config SYS_TEXT_BASE
+ default 0x80200000 if SPL
+ default 0x80000000 if !RISCV_SMODE
+ default 0x80200000 if RISCV_SMODE
+
+config SPL_TEXT_BASE
+ default 0x08000000
+
+config SPL_OPENSBI_LOAD_ADDR
+ default 0x80000000
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+ select SIFIVE_FU540
+ select ENV_IS_IN_SPI_FLASH
+ imply CMD_DHCP
+ imply CMD_EXT2
+ imply CMD_EXT4
+ imply CMD_FAT
+ imply CMD_FS_GENERIC
+ imply CMD_GPT
+ imply PARTITION_TYPE_GUID
+ imply CMD_NET
+ imply CMD_PING
+ imply CMD_SF
+ imply DOS_PARTITION
+ imply EFI_PARTITION
+ imply IP_DYN
+ imply ISO_PARTITION
+ imply PHY_LIB
+ imply PHY_MSCC
+ imply SPI_FLASH
+ imply SPI_FLASH_ISSI
+ imply SYSRESET
+ imply SYSRESET_GPIO
+ imply CMD_I2C
+
+endif
diff --git a/board/sifive/unleashed/MAINTAINERS b/board/sifive/unleashed/MAINTAINERS
new file mode 100644
index 0000000000..2ea00749cb
--- /dev/null
+++ b/board/sifive/unleashed/MAINTAINERS
@@ -0,0 +1,10 @@
+SiFive HiFive Unleashed BOARD
+M: Paul Walmsley <paul.walmsley@sifive.com>
+M: Palmer Dabbelt <palmer@dabbelt.com>
+M: Anup Patel <anup.patel@wdc.com>
+M: Atish Patra <atish.patra@wdc.com>
+S: Maintained
+F: board/sifive/unleashed/
+F: doc/board/sifive/unleashed.rst
+F: include/configs/sifive-unleashed.h
+F: configs/sifive_unleashed_defconfig
diff --git a/board/sifive/unleashed/Makefile b/board/sifive/unleashed/Makefile
new file mode 100644
index 0000000000..5821679dd9
--- /dev/null
+++ b/board/sifive/unleashed/Makefile
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
+
+obj-y += unleashed.o
+
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+endif
diff --git a/board/sifive/unleashed/spl.c b/board/sifive/unleashed/spl.c
new file mode 100644
index 0000000000..fe27316b2d
--- /dev/null
+++ b/board/sifive/unleashed/spl.c
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2019 SiFive, Inc
+ *
+ * Authors:
+ * Pragnesh Patel <pragnesh.patel@sifive.com>
+ */
+
+#include <init.h>
+#include <spl.h>
+#include <misc.h>
+#include <log.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <asm/gpio.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/spl.h>
+
+#define GEM_PHY_RESET SIFIVE_GENERIC_GPIO_NR(0, 12)
+
+#define MODE_SELECT_REG 0x1000
+#define MODE_SELECT_QSPI 0x6
+#define MODE_SELECT_SD 0xb
+#define MODE_SELECT_MASK GENMASK(3, 0)
+
+int spl_board_init_f(void)
+{
+ int ret;
+
+ ret = spl_soc_init();
+ if (ret) {
+ debug("FU540 SPL init failed: %d\n", ret);
+ return ret;
+ }
+
+ /*
+ * GEMGXL init VSC8541 PHY reset sequence;
+ * leave pull-down active for 2ms
+ */
+ udelay(2000);
+ ret = gpio_request(GEM_PHY_RESET, "gem_phy_reset");
+ if (ret) {
+ debug("gem_phy_reset gpio request failed: %d\n", ret);
+ return ret;
+ }
+
+ /* Set GPIO 12 (PHY NRESET) */
+ ret = gpio_direction_output(GEM_PHY_RESET, 1);
+ if (ret) {
+ debug("gem_phy_reset gpio direction set failed: %d\n", ret);
+ return ret;
+ }
+
+ udelay(1);
+
+ /* Reset PHY again to enter unmanaged mode */
+ gpio_set_value(GEM_PHY_RESET, 0);
+ udelay(1);
+ gpio_set_value(GEM_PHY_RESET, 1);
+ mdelay(15);
+
+ return 0;
+}
+
+u32 spl_boot_device(void)
+{
+ u32 mode_select = readl((void *)MODE_SELECT_REG);
+ u32 boot_device = mode_select & MODE_SELECT_MASK;
+
+ switch (boot_device) {
+ case MODE_SELECT_QSPI:
+ return BOOT_DEVICE_SPI;
+ case MODE_SELECT_SD:
+ return BOOT_DEVICE_MMC1;
+ default:
+ debug("Unsupported boot device 0x%x but trying MMC1\n",
+ boot_device);
+ return BOOT_DEVICE_MMC1;
+ }
+}
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+ /* boot using first FIT config */
+ return 0;
+}
+#endif
diff --git a/board/sifive/unleashed/unleashed.c b/board/sifive/unleashed/unleashed.c
new file mode 100644
index 0000000000..a4e78220cb
--- /dev/null
+++ b/board/sifive/unleashed/unleashed.c
@@ -0,0 +1,128 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ * Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <dm.h>
+#include <env.h>
+#include <init.h>
+#include <log.h>
+#include <linux/bitops.h>
+#include <linux/bug.h>
+#include <linux/delay.h>
+#include <misc.h>
+#include <spl.h>
+#include <asm/arch/cache.h>
+
+/*
+ * This define is a value used for error/unknown serial.
+ * If we really care about distinguishing errors and 0 is
+ * valid, we'll need a different one.
+ */
+#define ERROR_READING_SERIAL_NUMBER 0
+
+#ifdef CONFIG_MISC_INIT_R
+
+#if CONFIG_IS_ENABLED(SIFIVE_OTP)
+static u32 otp_read_serialnum(struct udevice *dev)
+{
+ int ret;
+ u32 serial[2] = {0};
+
+ for (int i = 0xfe * 4; i > 0; i -= 8) {
+ ret = misc_read(dev, i, serial, sizeof(serial));
+
+ if (ret != sizeof(serial)) {
+ printf("%s: error reading serial from OTP\n", __func__);
+ break;
+ }
+
+ if (serial[0] == ~serial[1])
+ return serial[0];
+ }
+
+ return ERROR_READING_SERIAL_NUMBER;
+}
+#endif
+
+static u32 fu540_read_serialnum(void)
+{
+ u32 serial = ERROR_READING_SERIAL_NUMBER;
+
+#if CONFIG_IS_ENABLED(SIFIVE_OTP)
+ struct udevice *dev;
+ int ret;
+
+ /* init OTP */
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
+ DM_DRIVER_GET(sifive_otp), &dev);
+
+ if (ret) {
+ debug("%s: could not find otp device\n", __func__);
+ return serial;
+ }
+
+ /* read serial from OTP and set env var */
+ serial = otp_read_serialnum(dev);
+#endif
+
+ return serial;
+}
+
+static void fu540_setup_macaddr(u32 serialnum)
+{
+ /* Default MAC address */
+ unsigned char mac[6] = { 0x70, 0xb3, 0xd5, 0x92, 0xf0, 0x00 };
+
+ /*
+ * We derive our board MAC address by ORing last three bytes
+ * of board serial number to above default MAC address.
+ *
+ * This logic of deriving board MAC address is taken from
+ * SiFive FSBL and is kept unchanged.
+ */
+ mac[5] |= (serialnum >> 0) & 0xff;
+ mac[4] |= (serialnum >> 8) & 0xff;
+ mac[3] |= (serialnum >> 16) & 0xff;
+
+ /* Update environment variable */
+ eth_env_set_enetaddr("ethaddr", mac);
+}
+
+int misc_init_r(void)
+{
+ u32 serial_num;
+ char buf[9] = {0};
+
+ /* Set ethaddr environment variable from board serial number */
+ if (!env_get("serial#")) {
+ serial_num = fu540_read_serialnum();
+ if (!serial_num) {
+ WARN(true, "Board serial number should not be 0 !!\n");
+ return 0;
+ }
+ snprintf(buf, sizeof(buf), "%08x", serial_num);
+ env_set("serial#", buf);
+ fu540_setup_macaddr(serial_num);
+ }
+ return 0;
+}
+
+#endif
+
+int board_init(void)
+{
+ int ret;
+
+ /* enable all cache ways */
+ ret = cache_enable_ways();
+ if (ret) {
+ debug("%s: could not enable cache ways\n", __func__);
+ return ret;
+ }
+
+ return 0;
+}