diff options
Diffstat (limited to 'board')
32 files changed, 1 insertions, 994 deletions
diff --git a/board/cavium/thunderx/thunderx.c b/board/cavium/thunderx/thunderx.c index a7dc5c6aeb..a8f8c78558 100644 --- a/board/cavium/thunderx/thunderx.c +++ b/board/cavium/thunderx/thunderx.c @@ -123,10 +123,3 @@ int board_eth_init(struct bd_info *bis) return rc; } - -#ifdef CONFIG_PCI -void pci_init_board(void) -{ - printf("DEBUG: PCI Init TODO *****\n"); -} -#endif diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 116c1e71cc..3a171688c3 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -63,7 +63,6 @@ obj-$(CONFIG_TARGET_P3041DS) += ics307_clk.o obj-$(CONFIG_TARGET_P4080DS) += ics307_clk.o obj-$(CONFIG_TARGET_P5040DS) += ics307_clk.o obj-$(CONFIG_VSC_CROSSBAR) += vsc3316_3308.o -obj-$(CONFIG_IDT8T49N222A) += idt8t49n222a_serdes_clk.o obj-$(CONFIG_ZM7300) += zm7300.o obj-$(CONFIG_POWER_PFUZE100) += pfuze.o obj-$(CONFIG_DM_PMIC_PFUZE100) += pfuze.o diff --git a/board/freescale/common/cds_pci_ft.c b/board/freescale/common/cds_pci_ft.c index be97a28ed2..dc2d62850d 100644 --- a/board/freescale/common/cds_pci_ft.c +++ b/board/freescale/common/cds_pci_ft.c @@ -9,68 +9,9 @@ #include "cadmus.h" #if defined(CONFIG_OF_BOARD_SETUP) -#if defined(CONFIG_PCI) && !defined(CONFIG_DM_PCI) -static void cds_pci_fixup(void *blob) -{ - int node; - const char *path; - int len, slot, i; - u32 *map = NULL, *piccells = NULL; - int off, cells; - - node = fdt_path_offset(blob, "/aliases"); - if (node >= 0) { - path = fdt_getprop(blob, node, "pci0", NULL); - if (path) { - node = fdt_path_offset(blob, path); - if (node >= 0) { - map = fdt_getprop_w(blob, node, "interrupt-map", &len); - } - /* Each item in "interrupt-map" property is translated with - * following cells: - * PCI #address-cells, PCI #interrupt-cells, - * PIC address, PIC #address-cells, PIC #interrupt-cells. - */ - cells = fdt_getprop_u32_default(blob, path, "#address-cells", 1); - cells += fdt_getprop_u32_default(blob, path, "#interrupt-cells", 1); - off = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*(map+cells))); - if (off <= 0) - return; - cells += 1; - piccells = (u32 *)fdt_getprop(blob, off, "#address-cells", NULL); - if (piccells == NULL) - return; - cells += *piccells; - piccells = (u32 *)fdt_getprop(blob, off, "#interrupt-cells", NULL); - if (piccells == NULL) - return; - cells += *piccells; - } - } - - if (map) { - len /= sizeof(u32); - - slot = get_pci_slot(); - - for (i=0;i<len;i+=cells) { - /* We rotate the interrupt pins so that the mapping - * changes depending on the slot the carrier card is in. - */ - map[3] = ((map[3] + slot - 2) % 4) + 1; - map+=cells; - } - } -} -#endif - int ft_board_setup(void *blob, struct bd_info *bd) { ft_cpu_setup(blob, bd); -#if defined(CONFIG_PCI) && !defined(CONFIG_DM_PCI) - ft_pci_setup(blob, bd); - cds_pci_fixup(blob); -#endif return 0; } diff --git a/board/freescale/common/idt8t49n222a_serdes_clk.c b/board/freescale/common/idt8t49n222a_serdes_clk.c deleted file mode 100644 index bb3cdac841..0000000000 --- a/board/freescale/common/idt8t49n222a_serdes_clk.c +++ /dev/null @@ -1,208 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2013 Freescale Semiconductor, Inc. - * Author: Shaveta Leekha <shaveta@freescale.com> - */ - -#include "idt8t49n222a_serdes_clk.h" -#include <log.h> -#include <linux/delay.h> - -#define DEVICE_ID_REG 0x00 - -static int check_pll_status(u8 idt_addr) -{ - u8 val = 0; - int ret; - - ret = i2c_read(idt_addr, 0x17, 1, &val, 1); - if (ret < 0) { - printf("IDT:0x%x could not read status register from device.\n", - idt_addr); - return ret; - } - - if (val & 0x04) { - debug("idt8t49n222a PLL is LOCKED: %x\n", val); - } else { - printf("idt8t49n222a PLL is not LOCKED: %x\n", val); - return -1; - } - - return 0; -} - -int set_serdes_refclk(u8 idt_addr, u8 serdes_num, - enum serdes_refclk refclk1, - enum serdes_refclk refclk2, u8 feedback) -{ - u8 dev_id = 0; - int i, ret; - - debug("IDT:Configuring idt8t49n222a device at I2C address: 0x%2x\n", - idt_addr); - - ret = i2c_read(idt_addr, DEVICE_ID_REG, 1, &dev_id, 1); - if (ret < 0) { - debug("IDT:0x%x could not read DEV_ID from device.\n", - idt_addr); - return ret; - } - - if ((dev_id != 0x00) && (dev_id != 0x24) && (dev_id != 0x2a)) { - debug("IDT: device at address 0x%x is not idt8t49n222a.\n", - idt_addr); - } - - if (serdes_num != 1 && serdes_num != 2) { - debug("serdes_num should be 1 for SerDes1 and" - " 2 for SerDes2.\n"); - return -1; - } - - if ((refclk1 == SERDES_REFCLK_122_88 && refclk2 != SERDES_REFCLK_122_88) - || (refclk1 != SERDES_REFCLK_122_88 - && refclk2 == SERDES_REFCLK_122_88)) { - debug("Only one refclk at 122.88MHz is not supported." - " Please set both refclk1 & refclk2 to 122.88MHz" - " or both not to 122.88MHz.\n"); - return -1; - } - - if (refclk1 != SERDES_REFCLK_100 && refclk1 != SERDES_REFCLK_122_88 - && refclk1 != SERDES_REFCLK_125 - && refclk1 != SERDES_REFCLK_156_25) { - debug("refclk1 should be 100MHZ, 122.88MHz, 125MHz" - " or 156.25MHz.\n"); - return -1; - } - - if (refclk2 != SERDES_REFCLK_100 && refclk2 != SERDES_REFCLK_122_88 - && refclk2 != SERDES_REFCLK_125 - && refclk2 != SERDES_REFCLK_156_25) { - debug("refclk2 should be 100MHZ, 122.88MHz, 125MHz" - " or 156.25MHz.\n"); - return -1; - } - - if (feedback != 0 && feedback != 1) { - debug("valid values for feedback are 0(default) or 1.\n"); - return -1; - } - - /* Configuring IDT for output refclks as - * Refclk1 = 122.88MHz Refclk2 = 122.88MHz - */ - if (refclk1 == SERDES_REFCLK_122_88 && - refclk2 == SERDES_REFCLK_122_88) { - printf("Setting refclk1:122.88 and refclk2:122.88\n"); - for (i = 0; i < NUM_IDT_REGS; i++) - i2c_reg_write(idt_addr, idt_conf_122_88[i][0], - idt_conf_122_88[i][1]); - - if (feedback) { - for (i = 0; i < NUM_IDT_REGS_FEEDBACK; i++) - i2c_reg_write(idt_addr, - idt_conf_122_88_feedback[i][0], - idt_conf_122_88_feedback[i][1]); - } - } - - if (refclk1 != SERDES_REFCLK_122_88 && - refclk2 != SERDES_REFCLK_122_88) { - for (i = 0; i < NUM_IDT_REGS; i++) - i2c_reg_write(idt_addr, idt_conf_not_122_88[i][0], - idt_conf_not_122_88[i][1]); - } - - /* Configuring IDT for output refclks as - * Refclk1 = 100MHz Refclk2 = 125MHz - */ - if (refclk1 == SERDES_REFCLK_100 && refclk2 == SERDES_REFCLK_125) { - printf("Setting refclk1:100 and refclk2:125\n"); - i2c_reg_write(idt_addr, 0x11, 0x10); - } - - /* Configuring IDT for output refclks as - * Refclk1 = 125MHz Refclk2 = 125MHz - */ - if (refclk1 == SERDES_REFCLK_125 && refclk2 == SERDES_REFCLK_125) { - printf("Setting refclk1:125 and refclk2:125\n"); - i2c_reg_write(idt_addr, 0x10, 0x10); - i2c_reg_write(idt_addr, 0x11, 0x10); - } - - /* Configuring IDT for output refclks as - * Refclk1 = 125MHz Refclk2 = 100MHz - */ - if (refclk1 == SERDES_REFCLK_125 && refclk2 == SERDES_REFCLK_100) { - printf("Setting refclk1:125 and refclk2:100\n"); - i2c_reg_write(idt_addr, 0x10, 0x10); - } - - /* Configuring IDT for output refclks as - * Refclk1 = 156.25MHz Refclk2 = 156.25MHz - */ - if (refclk1 == SERDES_REFCLK_156_25 && - refclk2 == SERDES_REFCLK_156_25) { - printf("Setting refclk1:156.25 and refclk2:156.25\n"); - for (i = 0; i < NUM_IDT_REGS_156_25; i++) - i2c_reg_write(idt_addr, idt_conf_156_25[i][0], - idt_conf_156_25[i][1]); - } - - /* Configuring IDT for output refclks as - * Refclk1 = 100MHz Refclk2 = 156.25MHz - */ - if (refclk1 == SERDES_REFCLK_100 && - refclk2 == SERDES_REFCLK_156_25) { - printf("Setting refclk1:100 and refclk2:156.25\n"); - for (i = 0; i < NUM_IDT_REGS_156_25; i++) - i2c_reg_write(idt_addr, idt_conf_100_156_25[i][0], - idt_conf_100_156_25[i][1]); - } - - /* Configuring IDT for output refclks as - * Refclk1 = 125MHz Refclk2 = 156.25MHz - */ - if (refclk1 == SERDES_REFCLK_125 && - refclk2 == SERDES_REFCLK_156_25) { - printf("Setting refclk1:125 and refclk2:156.25\n"); - for (i = 0; i < NUM_IDT_REGS_156_25; i++) - i2c_reg_write(idt_addr, idt_conf_125_156_25[i][0], - idt_conf_125_156_25[i][1]); - } - - /* Configuring IDT for output refclks as - * Refclk1 = 156.25MHz Refclk2 = 100MHz - */ - if (refclk1 == SERDES_REFCLK_156_25 && - refclk2 == SERDES_REFCLK_100) { - printf("Setting refclk1:156.25 and refclk2:100\n"); - for (i = 0; i < NUM_IDT_REGS_156_25; i++) - i2c_reg_write(idt_addr, idt_conf_156_25_100[i][0], - idt_conf_156_25_100[i][1]); - } - - /* Configuring IDT for output refclks as - * Refclk1 = 156.25MHz Refclk2 = 125MHz - */ - if (refclk1 == SERDES_REFCLK_156_25 && - refclk2 == SERDES_REFCLK_125) { - printf("Setting refclk1:156.25 and refclk2:125\n"); - for (i = 0; i < NUM_IDT_REGS_156_25; i++) - i2c_reg_write(idt_addr, idt_conf_156_25_125[i][0], - idt_conf_156_25_125[i][1]); - } - - /* waiting for maximum of 1 second if PLL doesn'r get locked - * initially. then check the status again. - */ - if (check_pll_status(idt_addr)) { - mdelay(1000); - if (check_pll_status(idt_addr)) - return -1; - } - - return 0; -} diff --git a/board/freescale/common/idt8t49n222a_serdes_clk.h b/board/freescale/common/idt8t49n222a_serdes_clk.h deleted file mode 100644 index b1528e3266..0000000000 --- a/board/freescale/common/idt8t49n222a_serdes_clk.h +++ /dev/null @@ -1,106 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2013 Freescale Semiconductor, Inc. - * Author: Shaveta Leekha <shaveta@freescale.com> - */ - -#ifndef __IDT8T49N222A_SERDES_CLK_H_ -#define __IDT8T49N222A_SERDES_CLK_H_ 1 - -#include <common.h> -#include <i2c.h> -#include "qixis.h" -#include "../b4860qds/b4860qds_qixis.h" -#include <errno.h> - -#define NUM_IDT_REGS 23 -#define NUM_IDT_REGS_FEEDBACK 12 -#define NUM_IDT_REGS_156_25 11 - -/* CLK */ -enum serdes_refclk { - SERDES_REFCLK_100, /* refclk 100Mhz */ - SERDES_REFCLK_122_88, /* refclk 122.88Mhz */ - SERDES_REFCLK_125, /* refclk 125Mhz */ - SERDES_REFCLK_156_25, /* refclk 156.25Mhz */ - SERDES_REFCLK_NONE = -1, -}; - -/* configuration values for IDT registers for Output Refclks: - * Refclk1 = 122.88MHz Refclk2 = 122.88MHz - */ -static const u8 idt_conf_122_88[23][2] = { {0x00, 0x3C}, {0x01, 0x00}, - {0x02, 0x9F}, {0x03, 0x00}, {0x04, 0x0B}, {0x05, 0x00}, - {0x06, 0x00}, {0x07, 0x00}, {0x08, 0x7D}, {0x09, 0x00}, - {0x0A, 0x08}, {0x0B, 0x00}, {0x0C, 0xDC}, {0x0D, 0x00}, - {0x0E, 0x00}, {0x0F, 0x00}, {0x10, 0x12}, {0x11, 0x12}, - {0x12, 0xB9}, {0x13, 0xBC}, {0x14, 0x40}, {0x15, 0x08}, - {0x16, 0xA0} }; - - -/* configuration values for IDT registers for Output Refclks: - * Refclk1 not equal to 122.88MHz Refclk2 not equal to 122.88MHz - */ -static const u8 idt_conf_not_122_88[23][2] = { {0x00, 0x00}, {0x01, 0x00}, - {0x02, 0x00}, {0x03, 0x00}, {0x04, 0x0A}, {0x05, 0x00}, - {0x06, 0x00}, {0x07, 0x00}, {0x08, 0x7D}, {0x09, 0x00}, - {0x0A, 0x08}, {0x0B, 0x00}, {0x0C, 0xDC}, {0x0D, 0x00}, - {0x0E, 0x00}, {0x0F, 0x00}, {0x10, 0x14}, {0x11, 0x14}, - {0x12, 0x35}, {0x13, 0xBC}, {0x14, 0x40}, {0x15, 0x08}, - {0x16, 0xA0} }; - -/* Reconfiguration values for some of IDT registers for - * Output Refclks: - * Refclk1 = 122.88MHz Refclk2 = 122.88MHz - * and with feedback as 1 - */ -static const u8 idt_conf_122_88_feedback[12][2] = { {0x00, 0x50}, {0x02, 0xD7}, - {0x04, 0x89}, {0x06, 0xC3}, {0x08, 0xC0}, {0x0A, 0x07}, - {0x0C, 0x80}, {0x10, 0x10}, {0x11, 0x10}, {0x12, 0x1B}, - {0x14, 0x00}, {0x15, 0xE8} }; - -/* configuration values for IDT registers for Output Refclks: - * Refclk1 : 156.25MHz Refclk2 : 156.25MHz - */ -static const u8 idt_conf_156_25[11][2] = { {0x04, 0x19}, {0x06, 0x03}, - {0x08, 0xC0}, {0x0A, 0x07}, {0x0C, 0xA1}, {0x0E, 0x20}, - {0x10, 0x10}, {0x11, 0x10}, {0x12, 0xB5}, {0x13, 0x3C}, - {0x15, 0xE8} }; - -/* configuration values for IDT registers for Output Refclks: - * Refclk1 : 100MHz Refclk2 : 156.25MHz - */ -static const u8 idt_conf_100_156_25[11][2] = { {0x04, 0x19}, {0x06, 0x03}, - {0x08, 0xC0}, {0x0A, 0x07}, {0x0C, 0xA1}, {0x0E, 0x20}, - {0x10, 0x19}, {0x11, 0x10}, {0x12, 0xB5}, {0x13, 0x3C}, - {0x15, 0xE8} }; - -/* configuration values for IDT registers for Output Refclks: - * Refclk1 : 125MHz Refclk2 : 156.25MHz - */ -static const u8 idt_conf_125_156_25[11][2] = { {0x04, 0x19}, {0x06, 0x03}, - {0x08, 0xC0}, {0x0A, 0x07}, {0x0C, 0xA1}, {0x0E, 0x20}, - {0x10, 0x14}, {0x11, 0x10}, {0x12, 0xB5}, {0x13, 0x3C}, - {0x15, 0xE8} }; - -/* configuration values for IDT registers for Output Refclks: - * Refclk1 : 156.25MHz Refclk2 : 100MHz - */ -static const u8 idt_conf_156_25_100[11][2] = { {0x04, 0x19}, {0x06, 0x03}, - {0x08, 0xC0}, {0x0A, 0x07}, {0x0C, 0xA1}, {0x0E, 0x20}, - {0x10, 0x10}, {0x11, 0x19}, {0x12, 0xB5}, {0x13, 0x3C}, - {0x15, 0xE8} }; - -/* configuration values for IDT registers for Output Refclks: - * Refclk1 : 156.25MHz Refclk2 : 125MHz - */ -static const u8 idt_conf_156_25_125[11][2] = { {0x04, 0x19}, {0x06, 0x03}, - {0x08, 0xC0}, {0x0A, 0x07}, {0x0C, 0xA1}, {0x0E, 0x20}, - {0x10, 0x10}, {0x11, 0x14}, {0x12, 0xB5}, {0x13, 0x3C}, - {0x15, 0xE8} }; - -int set_serdes_refclk(u8 idt_addr, u8 serdes_num, - enum serdes_refclk refclk1, - enum serdes_refclk refclk2, u8 feedback); - -#endif /*__IDT8T49N222A_SERDES_CLK_H_ */ diff --git a/board/freescale/common/p_corenet/Makefile b/board/freescale/common/p_corenet/Makefile index 29c9d544ae..ce156018a0 100644 --- a/board/freescale/common/p_corenet/Makefile +++ b/board/freescale/common/p_corenet/Makefile @@ -4,5 +4,4 @@ # Wolfgang Denk, DENX Software Engineering, wd@denx.de. obj-y += law.o -obj-$(CONFIG_PCI) += pci.o obj-y += tlb.o diff --git a/board/freescale/common/p_corenet/pci.c b/board/freescale/common/p_corenet/pci.c deleted file mode 100644 index 636334863e..0000000000 --- a/board/freescale/common/p_corenet/pci.c +++ /dev/null @@ -1,25 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2007-2011 Freescale Semiconductor, Inc. - */ - -#include <common.h> -#include <command.h> -#include <init.h> -#include <pci.h> -#include <asm/fsl_pci.h> -#include <linux/libfdt.h> -#include <fdt_support.h> -#include <asm/fsl_serdes.h> - -#if !defined(CONFIG_DM_PCI) -void pci_init_board(void) -{ - fsl_pcie_init_board(0); -} - -void pci_of_setup(void *blob, struct bd_info *bd) -{ - FT_FSL_PCI_SETUP; -} -#endif diff --git a/board/freescale/mpc8349emds/pci.c b/board/freescale/mpc8349emds/pci.c index 3ddbe71775..8c76c46d42 100644 --- a/board/freescale/mpc8349emds/pci.c +++ b/board/freescale/mpc8349emds/pci.c @@ -115,77 +115,4 @@ void pib_init(void) i2c_set_bus_num(orig_i2c_bus); } -void pci_init_board(void) -{ - volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR; - volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; - volatile law83xx_t *pci_law = immr->sysconf.pcilaw; -#ifndef CONFIG_MPC83XX_PCI2 - struct pci_region *reg[] = { pci1_regions }; -#else - struct pci_region *reg[] = { pci1_regions, pci2_regions }; -#endif - - /* initialize the PCA9555PW IO expander on the PIB board */ - pib_init(); - - /* Enable all 8 PCI_CLK_OUTPUTS */ - clk->occr = 0xff000000; - udelay(2000); - - /* Configure PCI Local Access Windows */ - pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; - pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G; - - pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; - pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M; - - udelay(2000); - -#ifndef CONFIG_MPC83XX_PCI2 - mpc83xx_pci_init(1, reg); -#else - mpc83xx_pci_init(2, reg); -#endif -} - -#else -void pci_init_board(void) -{ - volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR; - volatile law83xx_t *pci_law = immr->sysconf.pcilaw; - volatile pcictrl83xx_t *pci_ctrl = &immr->pci_ctrl[0]; - struct pci_region *reg[] = { pci1_regions }; - - /* Configure PCI Local Access Windows */ - pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; - pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G; - - pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; - pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M; - - mpc83xx_pci_init(1, reg); - - /* Configure PCI Inbound Translation Windows (3 1MB windows) */ - pci_ctrl->pitar0 = 0x0; - pci_ctrl->pibar0 = 0x0; - pci_ctrl->piwar0 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | - PIWAR_WTT_SNOOP | PIWAR_IWS_1M; - - pci_ctrl->pitar1 = 0x0; - pci_ctrl->pibar1 = 0x0; - pci_ctrl->piebar1 = 0x0; - pci_ctrl->piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | - PIWAR_WTT_SNOOP | PIWAR_IWS_1M; - - pci_ctrl->pitar2 = 0x0; - pci_ctrl->pibar2 = 0x0; - pci_ctrl->piebar2 = 0x0; - pci_ctrl->piwar2 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | - PIWAR_WTT_SNOOP | PIWAR_IWS_1M; - - /* Unlock the configuration bit */ - mpc83xx_pcislave_unlock(0); - printf("PCI: Agent mode enabled\n"); -} #endif /* CONFIG_PCISLAVE */ diff --git a/board/freescale/mpc837xerdb/Makefile b/board/freescale/mpc837xerdb/Makefile index c683b017b5..4661e4cf23 100644 --- a/board/freescale/mpc837xerdb/Makefile +++ b/board/freescale/mpc837xerdb/Makefile @@ -4,4 +4,3 @@ # Wolfgang Denk, DENX Software Engineering, wd@denx.de. obj-y += mpc837xerdb.o -obj-$(CONFIG_PCI) += pci.o diff --git a/board/freescale/mpc837xerdb/pci.c b/board/freescale/mpc837xerdb/pci.c deleted file mode 100644 index dccf8c5551..0000000000 --- a/board/freescale/mpc837xerdb/pci.c +++ /dev/null @@ -1,109 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2006-2009 Freescale Semiconductor, Inc. - */ - -#include <common.h> -#include <init.h> -#include <mpc83xx.h> -#include <pci.h> -#include <asm/io.h> -#include <linux/delay.h> - -static struct pci_region pci_regions[] = { - { - bus_start: CONFIG_SYS_PCI_MEM_BASE, - phys_start: CONFIG_SYS_PCI_MEM_PHYS, - size: CONFIG_SYS_PCI_MEM_SIZE, - flags: PCI_REGION_MEM | PCI_REGION_PREFETCH - }, - { - bus_start: CONFIG_SYS_PCI_MMIO_BASE, - phys_start: CONFIG_SYS_PCI_MMIO_PHYS, - size: CONFIG_SYS_PCI_MMIO_SIZE, - flags: PCI_REGION_MEM - }, - { - bus_start: CONFIG_SYS_PCI_IO_BASE, - phys_start: CONFIG_SYS_PCI_IO_PHYS, - size: CONFIG_SYS_PCI_IO_SIZE, - flags: PCI_REGION_IO - } -}; - -static struct pci_region pcie_regions_0[] = { - { - .bus_start = CONFIG_SYS_PCIE1_MEM_BASE, - .phys_start = CONFIG_SYS_PCIE1_MEM_PHYS, - .size = CONFIG_SYS_PCIE1_MEM_SIZE, - .flags = PCI_REGION_MEM, - }, - { - .bus_start = CONFIG_SYS_PCIE1_IO_BASE, - .phys_start = CONFIG_SYS_PCIE1_IO_PHYS, - .size = CONFIG_SYS_PCIE1_IO_SIZE, - .flags = PCI_REGION_IO, - }, -}; - -static struct pci_region pcie_regions_1[] = { - { - .bus_start = CONFIG_SYS_PCIE2_MEM_BASE, - .phys_start = CONFIG_SYS_PCIE2_MEM_PHYS, - .size = CONFIG_SYS_PCIE2_MEM_SIZE, - .flags = PCI_REGION_MEM, - }, - { - .bus_start = CONFIG_SYS_PCIE2_IO_BASE, - .phys_start = CONFIG_SYS_PCIE2_IO_PHYS, - .size = CONFIG_SYS_PCIE2_IO_SIZE, - .flags = PCI_REGION_IO, - }, -}; - -void pci_init_board(void) -{ - volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR; - volatile sysconf83xx_t *sysconf = &immr->sysconf; - volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; - volatile law83xx_t *pci_law = immr->sysconf.pcilaw; - volatile law83xx_t *pcie_law = sysconf->pcielaw; - struct pci_region *reg[] = { pci_regions }; - struct pci_region *pcie_reg[] = { pcie_regions_0, pcie_regions_1, }; - u32 spridr = in_be32(&immr->sysconf.spridr); - - /* Enable all 5 PCI_CLK_OUTPUTS */ - clk->occr |= 0xf8000000; - udelay(2000); - - /* Configure PCI Local Access Windows */ - pci_law[0].bar = CONFIG_SYS_PCI_MEM_PHYS & LAWBAR_BAR; - pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB; - - pci_law[1].bar = CONFIG_SYS_PCI_IO_PHYS & LAWBAR_BAR; - pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB; - - mpc83xx_pci_init(1, reg); - - /* There is no PEX in MPC8379 parts. */ - if (PARTID_NO_E(spridr) == SPR_8379) - return; - - /* Configure the clock for PCIE controller */ - clrsetbits_be32(&clk->sccr, SCCR_PCIEXP1CM | SCCR_PCIEXP2CM, - SCCR_PCIEXP1CM_1 | SCCR_PCIEXP2CM_1); - - /* Deassert the resets in the control register */ - out_be32(&sysconf->pecr1, 0xE0008000); - out_be32(&sysconf->pecr2, 0xE0008000); - udelay(2000); - - /* Configure PCI Express Local Access Windows */ - out_be32(&pcie_law[0].bar, CONFIG_SYS_PCIE1_BASE & LAWBAR_BAR); - out_be32(&pcie_law[0].ar, LBLAWAR_EN | LBLAWAR_512MB); - - out_be32(&pcie_law[1].bar, CONFIG_SYS_PCIE2_BASE & LAWBAR_BAR); - out_be32(&pcie_law[1].ar, LBLAWAR_EN | LBLAWAR_512MB); - - mpc83xx_pcie_init(2, pcie_reg); -} diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c index a1a9742bfa..cfb5b0b38b 100644 --- a/board/freescale/mpc8548cds/mpc8548cds.c +++ b/board/freescale/mpc8548cds/mpc8548cds.c @@ -168,113 +168,6 @@ void lbc_sdram_init(void) #endif /* enable SDRAM init */ } -#if (defined(CONFIG_PCI) || defined(CONFIG_PCI1)) && !defined(CONFIG_DM_PCI) -/* For some reason the Tundra PCI bridge shows up on itself as a - * different device. Work around that by refusing to configure it. - */ -void dummy_func(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab) { } - -static struct pci_config_table pci_mpc85xxcds_config_table[] = { - {0x10e3, 0x0513, PCI_ANY_ID, 1, 3, PCI_ANY_ID, dummy_func, {0,0,0}}, - {0x1106, 0x0686, PCI_ANY_ID, 1, VIA_ID, 0, mpc85xx_config_via, {0,0,0}}, - {0x1106, 0x0571, PCI_ANY_ID, 1, VIA_ID, 1, - mpc85xx_config_via_usbide, {0,0,0}}, - {0x1105, 0x3038, PCI_ANY_ID, 1, VIA_ID, 2, - mpc85xx_config_via_usb, {0,0,0}}, - {0x1106, 0x3038, PCI_ANY_ID, 1, VIA_ID, 3, - mpc85xx_config_via_usb2, {0,0,0}}, - {0x1106, 0x3058, PCI_ANY_ID, 1, VIA_ID, 5, - mpc85xx_config_via_power, {0,0,0}}, - {0x1106, 0x3068, PCI_ANY_ID, 1, VIA_ID, 6, - mpc85xx_config_via_ac97, {0,0,0}}, - {}, -}; - -static struct pci_controller pci1_hose; -#endif /* CONFIG_PCI */ - -#if !defined(CONFIG_DM_PCI) -void pci_init_board(void) -{ - volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); - struct fsl_pci_info pci_info; - u32 devdisr, pordevsr, io_sel; - u32 porpllsr, pci_agent, pci_speed, pci_32, pci_arb, pci_clk_sel; - int first_free_busno = 0; - char buf[32]; - - devdisr = in_be32(&gur->devdisr); - pordevsr = in_be32(&gur->pordevsr); - porpllsr = in_be32(&gur->porpllsr); - io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19; - - debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel); - -#ifdef CONFIG_PCI1 - pci_speed = get_clock_freq (); /* PCI PSPEED in [4:5] */ - pci_32 = pordevsr & MPC85xx_PORDEVSR_PCI1_PCI32; /* PORDEVSR[15] */ - pci_arb = pordevsr & MPC85xx_PORDEVSR_PCI1_ARB; - pci_clk_sel = porpllsr & MPC85xx_PORDEVSR_PCI1_SPD; - - if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { - SET_STD_PCI_INFO(pci_info, 1); - set_next_law(pci_info.mem_phys, - law_size_bits(pci_info.mem_size), pci_info.law); - set_next_law(pci_info.io_phys, - law_size_bits(pci_info.io_size), pci_info.law); - - pci_agent = fsl_setup_hose(&pci1_hose, pci_info.regs); - printf("PCI1: %d bit, %s MHz, %s, %s, %s (base address %lx)\n", - (pci_32) ? 32 : 64, - strmhz(buf, pci_speed), - pci_clk_sel ? "sync" : "async", - pci_agent ? "agent" : "host", - pci_arb ? "arbiter" : "external-arbiter", - pci_info.regs); - - pci1_hose.config_table = pci_mpc85xxcds_config_table; - first_free_busno = fsl_pci_init_port(&pci_info, - &pci1_hose, first_free_busno); - -#ifdef CONFIG_PCIX_CHECK - if (!(pordevsr & MPC85xx_PORDEVSR_PCI1)) { - /* PCI-X init */ - if (CONFIG_SYS_CLK_FREQ < 66000000) - printf("PCI-X will only work at 66 MHz\n"); - - reg16 = PCI_X_CMD_MAX_SPLIT | PCI_X_CMD_MAX_READ - | PCI_X_CMD_ERO | PCI_X_CMD_DPERR_E; - pci_hose_write_config_word(hose, bus, PCIX_COMMAND, reg16); - } -#endif - } else { - printf("PCI1: disabled\n"); - } - - puts("\n"); -#else - setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); /* disable */ -#endif - -#ifdef CONFIG_PCI2 -{ - uint pci2_clk_sel = porpllsr & 0x4000; /* PORPLLSR[17] */ - uint pci_dual = get_pci_dual (); /* PCI DUAL in CM_PCI[3] */ - if (pci_dual) { - printf("PCI2: 32 bit, 66 MHz, %s\n", - pci2_clk_sel ? "sync" : "async"); - } else { - printf("PCI2: disabled\n"); - } -} -#else - setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI2); /* disable */ -#endif /* CONFIG_PCI2 */ - - fsl_pcie_init_board(first_free_busno); -} -#endif - void configure_rgmii(void) { unsigned short temp; @@ -354,10 +247,3 @@ int board_eth_init(struct bd_info *bis) return pci_eth_init(bis); } - -#if defined(CONFIG_OF_BOARD_SETUP) && !defined(CONFIG_DM_PCI) -void ft_pci_setup(void *blob, struct bd_info *bd) -{ - FT_FSL_PCI_SETUP; -} -#endif diff --git a/board/freescale/p1010rdb/p1010rdb.c b/board/freescale/p1010rdb/p1010rdb.c index 90436337df..84fc891b67 100644 --- a/board/freescale/p1010rdb/p1010rdb.c +++ b/board/freescale/p1010rdb/p1010rdb.c @@ -129,13 +129,6 @@ int board_early_init_r(void) return 0; } -#if defined(CONFIG_PCI) && !defined(CONFIG_DM_PCI) -void pci_init_board(void) -{ - fsl_pcie_init_board(0); -} -#endif /* ifdef CONFIG_PCI */ - int config_board_mux(int ctrl_type) { ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); @@ -617,10 +610,6 @@ int ft_board_setup(void *blob, struct bd_info *bd) base = env_get_bootm_low(); size = env_get_bootm_size(); -#if defined(CONFIG_PCI) && !defined(CONFIG_DM_PCI) - FT_FSL_PCI_SETUP; -#endif - fdt_fixup_memory(blob, (u64)base, (u64)size); #if defined(CONFIG_HAS_FSL_DR_USB) diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c index cf4d9c11b8..19ece12296 100644 --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c @@ -239,13 +239,6 @@ int checkboard(void) return 0; } -#if defined(CONFIG_PCI) && !defined(CONFIG_DM_PCI) -void pci_init_board(void) -{ - fsl_pcie_init_board(0); -} -#endif - int board_early_init_r(void) { const unsigned int flashbase = CONFIG_SYS_FLASH_BASE; @@ -363,10 +356,6 @@ int ft_board_setup(void *blob, struct bd_info *bd) fdt_fixup_memory(blob, (u64)base, (u64)size); -#if !defined(CONFIG_DM_PCI) - FT_FSL_PCI_SETUP; -#endif - #ifdef CONFIG_QE do_fixup_by_compat(blob, "fsl,qe", "status", "okay", sizeof("okay"), 0); diff --git a/board/freescale/t102xrdb/Makefile b/board/freescale/t102xrdb/Makefile index ddeb44f36e..e597486c94 100644 --- a/board/freescale/t102xrdb/Makefile +++ b/board/freescale/t102xrdb/Makefile @@ -10,7 +10,6 @@ else obj-y += t102xrdb.o obj-$(CONFIG_TARGET_T1024RDB) += cpld.o obj-y += eth_t102xrdb.o -obj-$(CONFIG_PCI) += pci.o endif obj-y += ddr.o obj-y += law.o diff --git a/board/freescale/t102xrdb/pci.c b/board/freescale/t102xrdb/pci.c deleted file mode 100644 index 45ab9223ae..0000000000 --- a/board/freescale/t102xrdb/pci.c +++ /dev/null @@ -1,25 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2007-2014 Freescale Semiconductor, Inc. - */ - -#include <common.h> -#include <command.h> -#include <init.h> -#include <pci.h> -#include <asm/fsl_pci.h> -#include <linux/libfdt.h> -#include <fdt_support.h> -#include <asm/fsl_serdes.h> - -#if !defined(CONFIG_DM_PCI) -void pci_init_board(void) -{ - fsl_pcie_init_board(0); -} - -void pci_of_setup(void *blob, struct bd_info *bd) -{ - FT_FSL_PCI_SETUP; -} -#endif diff --git a/board/freescale/t104xrdb/Makefile b/board/freescale/t104xrdb/Makefile index 31abbd9aca..d67e9412ec 100644 --- a/board/freescale/t104xrdb/Makefile +++ b/board/freescale/t104xrdb/Makefile @@ -8,7 +8,6 @@ else obj-y += t104xrdb.o obj-y += cpld.o obj-y += eth.o -obj-$(CONFIG_PCI) += pci.o obj-$(CONFIG_FSL_DIU_FB)+= diu.o endif obj-y += ddr.o diff --git a/board/freescale/t104xrdb/pci.c b/board/freescale/t104xrdb/pci.c deleted file mode 100644 index 1fd2402700..0000000000 --- a/board/freescale/t104xrdb/pci.c +++ /dev/null @@ -1,25 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2013 Freescale Semiconductor, Inc. - */ - -#include <common.h> -#include <command.h> -#include <init.h> -#include <pci.h> -#include <asm/fsl_pci.h> -#include <linux/libfdt.h> -#include <fdt_support.h> -#include <asm/fsl_serdes.h> - -#if !defined(CONFIG_DM_PCI) -void pci_init_board(void) -{ - fsl_pcie_init_board(0); -} - -void pci_of_setup(void *blob, struct bd_info *bd) -{ - FT_FSL_PCI_SETUP; -} -#endif diff --git a/board/freescale/t208xqds/Makefile b/board/freescale/t208xqds/Makefile index 55b1e7390a..de8613058d 100644 --- a/board/freescale/t208xqds/Makefile +++ b/board/freescale/t208xqds/Makefile @@ -8,7 +8,6 @@ ifdef CONFIG_SPL_BUILD obj-y += spl.o else obj-$(CONFIG_TARGET_T2080QDS) += t208xqds.o eth_t208xqds.o -obj-$(CONFIG_PCI) += pci.o endif obj-y += ddr.o diff --git a/board/freescale/t208xqds/pci.c b/board/freescale/t208xqds/pci.c deleted file mode 100644 index a03b11ccb5..0000000000 --- a/board/freescale/t208xqds/pci.c +++ /dev/null @@ -1,25 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2007-2013 Freescale Semiconductor, Inc. - */ - -#include <common.h> -#include <command.h> -#include <init.h> -#include <pci.h> -#include <asm/fsl_pci.h> -#include <linux/libfdt.h> -#include <fdt_support.h> -#include <asm/fsl_serdes.h> - -#if !defined(CONFIG_DM_PCI) -void pci_init_board(void) -{ - fsl_pcie_init_board(0); -} - -void pci_of_setup(void *blob, struct bd_info *bd) -{ - FT_FSL_PCI_SETUP; -} -#endif diff --git a/board/freescale/t208xrdb/Makefile b/board/freescale/t208xrdb/Makefile index 25ea66a024..7af3cd0ac4 100644 --- a/board/freescale/t208xrdb/Makefile +++ b/board/freescale/t208xrdb/Makefile @@ -8,7 +8,6 @@ ifdef CONFIG_SPL_BUILD obj-y += spl.o else obj-$(CONFIG_TARGET_T2080RDB) += t208xrdb.o eth_t208xrdb.o cpld.o -obj-$(CONFIG_PCI) += pci.o endif obj-y += ddr.o diff --git a/board/freescale/t208xrdb/pci.c b/board/freescale/t208xrdb/pci.c deleted file mode 100644 index 45ab9223ae..0000000000 --- a/board/freescale/t208xrdb/pci.c +++ /dev/null @@ -1,25 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2007-2014 Freescale Semiconductor, Inc. - */ - -#include <common.h> -#include <command.h> -#include <init.h> -#include <pci.h> -#include <asm/fsl_pci.h> -#include <linux/libfdt.h> -#include <fdt_support.h> -#include <asm/fsl_serdes.h> - -#if !defined(CONFIG_DM_PCI) -void pci_init_board(void) -{ - fsl_pcie_init_board(0); -} - -void pci_of_setup(void *blob, struct bd_info *bd) -{ - FT_FSL_PCI_SETUP; -} -#endif diff --git a/board/freescale/t4rdb/Makefile b/board/freescale/t4rdb/Makefile index f1fd623339..3106848639 100644 --- a/board/freescale/t4rdb/Makefile +++ b/board/freescale/t4rdb/Makefile @@ -10,7 +10,6 @@ else obj-$(CONFIG_TARGET_T4240RDB) += t4240rdb.o obj-y += cpld.o obj-y += eth.o -obj-$(CONFIG_PCI) += pci.o endif obj-y += ddr.o diff --git a/board/freescale/t4rdb/pci.c b/board/freescale/t4rdb/pci.c deleted file mode 100644 index c2bc05164d..0000000000 --- a/board/freescale/t4rdb/pci.c +++ /dev/null @@ -1,25 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2014 Freescale Semiconductor, Inc. - */ - -#include <common.h> -#include <command.h> -#include <init.h> -#include <pci.h> -#include <asm/fsl_pci.h> -#include <linux/libfdt.h> -#include <fdt_support.h> -#include <asm/fsl_serdes.h> - -#if !defined(CONFIG_DM_PCI) -void pci_init_board(void) -{ - fsl_pcie_init_board(0); -} - -void pci_of_setup(void *blob, struct bd_info *bd) -{ - FT_FSL_PCI_SETUP; -} -#endif diff --git a/board/imgtec/malta/malta.c b/board/imgtec/malta/malta.c index 9af1f92e5d..d2e2e4ae20 100644 --- a/board/imgtec/malta/malta.c +++ b/board/imgtec/malta/malta.c @@ -196,7 +196,6 @@ int board_fix_fdt(void *rw_fdt_blob) } #endif -#if IS_ENABLED(CONFIG_DM_PCI) int board_early_init_r(void) { struct udevice *dev; @@ -243,69 +242,3 @@ int board_early_init_r(void) return 0; } -#else -void pci_init_board(void) -{ - pci_dev_t bdf; - u32 val32; - u8 val8; - - switch (malta_sys_con()) { - case SYSCON_GT64120: - gt64120_pci_init((void *)CKSEG1ADDR(MALTA_GT_BASE), - 0x00000000, 0x00000000, CONFIG_SYS_MEM_SIZE, - 0x10000000, 0x10000000, 128 * 1024 * 1024, - 0x00000000, 0x00000000, 0x20000); - break; - - default: - case SYSCON_MSC01: - msc01_pci_init((void *)CKSEG1ADDR(MALTA_MSC01_PCI_BASE), - 0x00000000, 0x00000000, CONFIG_SYS_MEM_SIZE, - MALTA_MSC01_PCIMEM_MAP, - CKSEG1ADDR(MALTA_MSC01_PCIMEM_BASE), - MALTA_MSC01_PCIMEM_SIZE, MALTA_MSC01_PCIIO_MAP, - 0x00000000, MALTA_MSC01_PCIIO_SIZE); - break; - } - - bdf = pci_find_device(PCI_VENDOR_ID_INTEL, - PCI_DEVICE_ID_INTEL_82371AB_0, 0); - if (bdf == -1) - panic("Failed to find PIIX4 PCI bridge\n"); - - /* setup PCI interrupt routing */ - pci_write_config_byte(bdf, PCI_CFG_PIIX4_PIRQRCA, 10); - pci_write_config_byte(bdf, PCI_CFG_PIIX4_PIRQRCB, 10); - pci_write_config_byte(bdf, PCI_CFG_PIIX4_PIRQRCC, 11); - pci_write_config_byte(bdf, PCI_CFG_PIIX4_PIRQRCD, 11); - - /* mux SERIRQ onto SERIRQ pin */ - pci_read_config_dword(bdf, PCI_CFG_PIIX4_GENCFG, &val32); - val32 |= PCI_CFG_PIIX4_GENCFG_SERIRQ; - pci_write_config_dword(bdf, PCI_CFG_PIIX4_GENCFG, val32); - - /* enable SERIRQ - Linux currently depends upon this */ - pci_read_config_byte(bdf, PCI_CFG_PIIX4_SERIRQC, &val8); - val8 |= PCI_CFG_PIIX4_SERIRQC_EN | PCI_CFG_PIIX4_SERIRQC_CONT; - pci_write_config_byte(bdf, PCI_CFG_PIIX4_SERIRQC, val8); - - bdf = pci_find_device(PCI_VENDOR_ID_INTEL, - PCI_DEVICE_ID_INTEL_82371AB, 0); - if (bdf == -1) - panic("Failed to find PIIX4 IDE controller\n"); - - /* enable bus master & IO access */ - val32 |= PCI_COMMAND_MASTER | PCI_COMMAND_IO; - pci_write_config_dword(bdf, PCI_COMMAND, val32); - - /* set latency */ - pci_write_config_byte(bdf, PCI_LATENCY_TIMER, 0x40); - - /* enable IDE/ATA */ - pci_write_config_dword(bdf, PCI_CFG_PIIX4_IDETIM_PRI, - PCI_CFG_PIIX4_IDETIM_IDE); - pci_write_config_dword(bdf, PCI_CFG_PIIX4_IDETIM_SEC, - PCI_CFG_PIIX4_IDETIM_IDE); -} -#endif diff --git a/board/renesas/condor/condor.c b/board/renesas/condor/condor.c index e930de31b2..2dd2c1534c 100644 --- a/board/renesas/condor/condor.c +++ b/board/renesas/condor/condor.c @@ -21,9 +21,6 @@ DECLARE_GLOBAL_DATA_PTR; int board_init(void) { - /* adress of boot parameters */ - gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; - return 0; } diff --git a/board/renesas/draak/draak.c b/board/renesas/draak/draak.c index 0aaae815c0..3d00652a8d 100644 --- a/board/renesas/draak/draak.c +++ b/board/renesas/draak/draak.c @@ -54,9 +54,6 @@ int board_early_init_f(void) int board_init(void) { - /* adress of boot parameters */ - gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; - /* USB1 pull-up */ setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN); diff --git a/board/renesas/eagle/eagle.c b/board/renesas/eagle/eagle.c index bb32e3d2c5..3417b50f3b 100644 --- a/board/renesas/eagle/eagle.c +++ b/board/renesas/eagle/eagle.c @@ -65,9 +65,6 @@ int board_early_init_f(void) int board_init(void) { - /* adress of boot parameters */ - gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; - return 0; } diff --git a/board/renesas/ebisu/ebisu.c b/board/renesas/ebisu/ebisu.c index 9d4af8d3a6..9a70192596 100644 --- a/board/renesas/ebisu/ebisu.c +++ b/board/renesas/ebisu/ebisu.c @@ -32,9 +32,6 @@ DECLARE_GLOBAL_DATA_PTR; int board_init(void) { - /* adress of boot parameters */ - gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; - return 0; } diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c index 1802547bbf..d4752e5798 100644 --- a/board/renesas/salvator-x/salvator-x.c +++ b/board/renesas/salvator-x/salvator-x.c @@ -53,9 +53,6 @@ int board_early_init_f(void) int board_init(void) { - /* adress of boot parameters */ - gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; - /* USB1 pull-up */ setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN); diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c index ffc4eb9ff3..4626d223b0 100644 --- a/board/renesas/ulcb/ulcb.c +++ b/board/renesas/ulcb/ulcb.c @@ -51,9 +51,6 @@ int board_early_init_f(void) int board_init(void) { - /* adress of boot parameters */ - gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; - /* USB1 pull-up */ setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN); diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c index 3444af6a8c..3ba2fbbd56 100644 --- a/board/socrates/socrates.c +++ b/board/socrates/socrates.c @@ -53,7 +53,7 @@ int checkboard (void) } putc('\n'); -#if defined(CONFIG_PCI) || defined(CONFIG_DM_PCI) +#if defined(CONFIG_PCI) /* Check the PCI_clk sel bit */ if (in_be32(&gur->porpllsr) & (1<<15)) { src = "SYSCLK"; @@ -130,9 +130,7 @@ int misc_init_r (void) &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]); } -#if defined(CONFIG_DM_PCI) pci_init(); -#endif return 0; } diff --git a/board/xes/common/fsl_8xxx_pci.c b/board/xes/common/fsl_8xxx_pci.c index 157aa32826..c1fce7d331 100644 --- a/board/xes/common/fsl_8xxx_pci.c +++ b/board/xes/common/fsl_8xxx_pci.c @@ -14,56 +14,6 @@ #include <linux/libfdt.h> #include <fdt_support.h> - -#ifdef CONFIG_PCI1 -static struct pci_controller pci1_hose; -#endif - -void pci_init_board(void) -{ - int first_free_busno = 0; - -#ifdef CONFIG_PCI1 - int pcie_ep; - struct fsl_pci_info pci_info; - volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); - u32 devdisr = in_be32(&gur->devdisr); - uint pci_spd_norm = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_SPD; - uint pci_32 = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_PCI32; - uint pci_arb = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_ARB; - uint pcix = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1; - uint freq = CONFIG_SYS_CLK_FREQ / 1000 / 1000; - - if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { - SET_STD_PCI_INFO(pci_info, 1); - set_next_law(pci_info.mem_phys, - law_size_bits(pci_info.mem_size), pci_info.law); - set_next_law(pci_info.io_phys, - law_size_bits(pci_info.io_size), pci_info.law); - - pcie_ep = fsl_setup_hose(&pci1_hose, pci_info.regs); - printf("PCI1: %d bit %s, %s %d MHz, %s, %s\n", - pci_32 ? 32 : 64, - pcix ? "PCIX" : "PCI", - pci_spd_norm ? ">=" : "<=", - pcix ? freq * 2 : freq, - pcie_ep ? "agent" : "host", - pci_arb ? "arbiter" : "external-arbiter"); - - first_free_busno = fsl_pci_init_port(&pci_info, - &pci1_hose, first_free_busno); - } else { - printf("PCI1: disabled\n"); - } -#elif defined CONFIG_ARCH_MPC8548 - volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); - /* PCI1 not present on MPC8572 */ - setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); -#endif - - fsl_pcie_init_board(first_free_busno); -} - #if defined(CONFIG_OF_BOARD_SETUP) void ft_board_pci_setup(void *blob, struct bd_info *bd) { |