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-rw-r--r--board/Arcturus/ucp1020/tlb.c2
-rw-r--r--board/freescale/b4860qds/tlb.c2
-rw-r--r--board/freescale/bsc9131rdb/tlb.c2
-rw-r--r--board/freescale/bsc9132qds/tlb.c2
-rw-r--r--board/freescale/c29xpcie/tlb.c4
-rw-r--r--board/freescale/ls1088a/Kconfig2
-rw-r--r--board/freescale/ls1088a/MAINTAINERS12
-rw-r--r--board/freescale/ls1088a/ls1088a.c35
-rw-r--r--board/freescale/mpc8541cds/tlb.c2
-rw-r--r--board/freescale/mpc8548cds/tlb.c2
-rw-r--r--board/freescale/mpc8568mds/tlb.c2
-rw-r--r--board/freescale/p1010rdb/tlb.c2
-rw-r--r--board/freescale/p1022ds/tlb.c4
-rw-r--r--board/freescale/p1023rdb/tlb.c4
-rw-r--r--board/freescale/p1_p2_rdb_pc/tlb.c2
-rw-r--r--board/freescale/p1_twr/tlb.c2
-rw-r--r--board/freescale/t102xqds/tlb.c4
-rw-r--r--board/freescale/t102xrdb/tlb.c4
-rw-r--r--board/freescale/t104xrdb/tlb.c4
-rw-r--r--board/freescale/t208xqds/tlb.c2
-rw-r--r--board/freescale/t208xrdb/tlb.c2
-rw-r--r--board/freescale/t4qds/tlb.c2
-rw-r--r--board/freescale/t4rdb/tlb.c2
-rw-r--r--board/gdsys/p1022/tlb.c2
-rw-r--r--board/logicpd/omap3som/README43
-rw-r--r--board/logicpd/omap3som/omap3logic.c55
-rw-r--r--board/sbc8548/tlb.c4
-rw-r--r--board/synopsys/hsdk/hsdk.c12
-rw-r--r--board/theobroma-systems/puma_rk3399/puma-rk3399.c2
29 files changed, 185 insertions, 34 deletions
diff --git a/board/Arcturus/ucp1020/tlb.c b/board/Arcturus/ucp1020/tlb.c
index fd7134f5cf..95d58af0e5 100644
--- a/board/Arcturus/ucp1020/tlb.c
+++ b/board/Arcturus/ucp1020/tlb.c
@@ -79,7 +79,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
(defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR))
/* *I*G - eSDHC/eSPI/NAND boot */
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
- MAS3_SX | MAS3_SW | MAS3_SR, 0,
+ MAS3_SX | MAS3_SW | MAS3_SR, MAS2_M,
0, 8, BOOKE_PAGESZ_1G, 1),
#endif /* RAMBOOT/SPL */
diff --git a/board/freescale/b4860qds/tlb.c b/board/freescale/b4860qds/tlb.c
index 7b55b860d0..88910d6cd1 100644
--- a/board/freescale/b4860qds/tlb.c
+++ b/board/freescale/b4860qds/tlb.c
@@ -147,7 +147,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
#if defined(CONFIG_RAMBOOT_PBL) && !defined(CONFIG_SPL_BUILD)
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 17, BOOKE_PAGESZ_2G, 1)
#endif
};
diff --git a/board/freescale/bsc9131rdb/tlb.c b/board/freescale/bsc9131rdb/tlb.c
index c8ecf5de59..e5dab9ea30 100644
--- a/board/freescale/bsc9131rdb/tlb.c
+++ b/board/freescale/bsc9131rdb/tlb.c
@@ -49,7 +49,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_SPL)
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 8, BOOKE_PAGESZ_1G, 1),
#endif
diff --git a/board/freescale/bsc9132qds/tlb.c b/board/freescale/bsc9132qds/tlb.c
index 07febc2b37..56199e5244 100644
--- a/board/freescale/bsc9132qds/tlb.c
+++ b/board/freescale/bsc9132qds/tlb.c
@@ -71,7 +71,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_SPL)
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 8, BOOKE_PAGESZ_1G, 1),
#endif
diff --git a/board/freescale/c29xpcie/tlb.c b/board/freescale/c29xpcie/tlb.c
index c5abed0504..85d58c8cd4 100644
--- a/board/freescale/c29xpcie/tlb.c
+++ b/board/freescale/c29xpcie/tlb.c
@@ -67,11 +67,11 @@ struct fsl_e_tlb_entry tlb_table[] = {
(defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD))
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE,
CONFIG_SYS_DDR_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 8, BOOKE_PAGESZ_256M, 1),
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000,
CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 9, BOOKE_PAGESZ_256M, 1),
#endif
diff --git a/board/freescale/ls1088a/Kconfig b/board/freescale/ls1088a/Kconfig
index 1ada661743..4479dd0758 100644
--- a/board/freescale/ls1088a/Kconfig
+++ b/board/freescale/ls1088a/Kconfig
@@ -12,6 +12,7 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "ls1088aqds"
+source "board/freescale/common/Kconfig"
endif
if TARGET_LS1088ARDB
@@ -28,4 +29,5 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "ls1088ardb"
+source "board/freescale/common/Kconfig"
endif
diff --git a/board/freescale/ls1088a/MAINTAINERS b/board/freescale/ls1088a/MAINTAINERS
index b3d5c388eb..de3961d510 100644
--- a/board/freescale/ls1088a/MAINTAINERS
+++ b/board/freescale/ls1088a/MAINTAINERS
@@ -15,3 +15,15 @@ F: board/freescale/ls1088a/
F: include/configs/ls1088aqds.h
F: configs/ls1088aqds_qspi_defconfig
F: configs/ls1088aqds_sdcard_qspi_defconfig
+
+LS1088AQDS_QSPI_SECURE_BOOT BOARD
+M: Udit Agarwal <udit.agarwal@nxp.com>
+M: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
+S: Maintained
+F: configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
+
+LS1088ARDB_QSPI_SECURE_BOOT BOARD
+M: Udit Agarwal <udit.agarwal@nxp.com>
+M: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
+S: Maintained
+F: configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c
index 96d9ae7f1d..9daa007590 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -315,6 +315,9 @@ int board_init(void)
out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR105_IRQ_MASK);
#endif
+#ifdef CONFIG_FSL_CAAM
+ sec_init();
+#endif
#ifdef CONFIG_FSL_LS_PPA
ppa_init();
#endif
@@ -337,9 +340,6 @@ void detail_board_ddr_info(void)
#if defined(CONFIG_ARCH_MISC_INIT)
int arch_misc_init(void)
{
-#ifdef CONFIG_FSL_CAAM
- sec_init();
-#endif
return 0;
}
#endif
@@ -368,6 +368,33 @@ void fdt_fixup_board_enet(void *fdt)
#endif
#ifdef CONFIG_OF_BOARD_SETUP
+void fsl_fdt_fixup_flash(void *fdt)
+{
+ int offset;
+
+/*
+ * IFC-NOR and QSPI are muxed on SoC.
+ * So disable IFC node in dts if QSPI is enabled or
+ * disable QSPI node in dts in case QSPI is not enabled.
+ */
+
+#ifdef CONFIG_FSL_QSPI
+ offset = fdt_path_offset(fdt, "/soc/ifc/nor");
+
+ if (offset < 0)
+ offset = fdt_path_offset(fdt, "/ifc/nor");
+#else
+ offset = fdt_path_offset(fdt, "/soc/quadspi");
+
+ if (offset < 0)
+ offset = fdt_path_offset(fdt, "/quadspi");
+#endif
+ if (offset < 0)
+ return;
+
+ fdt_status_disabled(fdt, offset);
+}
+
int ft_board_setup(void *blob, bd_t *bd)
{
int err, i;
@@ -394,6 +421,8 @@ int ft_board_setup(void *blob, bd_t *bd)
fdt_fixup_memory_banks(blob, base, size, CONFIG_NR_DRAM_BANKS);
+ fsl_fdt_fixup_flash(blob);
+
#ifdef CONFIG_FSL_MC_ENET
fdt_fixup_board_enet(blob);
err = fsl_mc_ldpaa_exit(bd);
diff --git a/board/freescale/mpc8541cds/tlb.c b/board/freescale/mpc8541cds/tlb.c
index fff3b4a7c2..6664f2755d 100644
--- a/board/freescale/mpc8541cds/tlb.c
+++ b/board/freescale/mpc8541cds/tlb.c
@@ -81,7 +81,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xf000_0000 64M LBC SDRAM
*/
SET_TLB_ENTRY(1, CONFIG_SYS_LBC_SDRAM_BASE, CONFIG_SYS_LBC_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 6, BOOKE_PAGESZ_64M, 1),
/*
diff --git a/board/freescale/mpc8548cds/tlb.c b/board/freescale/mpc8548cds/tlb.c
index 363e043d06..571341ff68 100644
--- a/board/freescale/mpc8548cds/tlb.c
+++ b/board/freescale/mpc8548cds/tlb.c
@@ -48,7 +48,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
*/
SET_TLB_ENTRY(1, CONFIG_SYS_LBC_SDRAM_BASE,
CONFIG_SYS_LBC_SDRAM_BASE_PHYS,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 2, BOOKE_PAGESZ_64M, 1),
/*
diff --git a/board/freescale/mpc8568mds/tlb.c b/board/freescale/mpc8568mds/tlb.c
index b5e2fec1f9..03d0fa1cd9 100644
--- a/board/freescale/mpc8568mds/tlb.c
+++ b/board/freescale/mpc8568mds/tlb.c
@@ -67,7 +67,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xf000_0000 64M LBC SDRAM
*/
SET_TLB_ENTRY(1, CONFIG_SYS_LBC_SDRAM_BASE, CONFIG_SYS_LBC_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 4, BOOKE_PAGESZ_64M, 1),
/*
diff --git a/board/freescale/p1010rdb/tlb.c b/board/freescale/p1010rdb/tlb.c
index af40f979d3..7d151f9e5f 100644
--- a/board/freescale/p1010rdb/tlb.c
+++ b/board/freescale/p1010rdb/tlb.c
@@ -76,7 +76,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
#if defined(CONFIG_SYS_RAMBOOT) || \
(defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR))
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 8, BOOKE_PAGESZ_1G, 1),
#endif
diff --git a/board/freescale/p1022ds/tlb.c b/board/freescale/p1022ds/tlb.c
index e7ae2e25b2..69d5e449e0 100644
--- a/board/freescale/p1022ds/tlb.c
+++ b/board/freescale/p1022ds/tlb.c
@@ -75,12 +75,12 @@ struct fsl_e_tlb_entry tlb_table[] = {
(defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR))
/* **** - eSDHC/eSPI/NAND boot */
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 8, BOOKE_PAGESZ_1G, 1),
/* **** - eSDHC/eSPI/NAND boot - second 1GB of memory */
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 9, BOOKE_PAGESZ_1G, 1),
#endif
diff --git a/board/freescale/p1023rdb/tlb.c b/board/freescale/p1023rdb/tlb.c
index 8fd178e211..35a63fe026 100644
--- a/board/freescale/p1023rdb/tlb.c
+++ b/board/freescale/p1023rdb/tlb.c
@@ -86,12 +86,12 @@ struct fsl_e_tlb_entry tlb_table[] = {
#ifdef CONFIG_SYS_RAMBOOT
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE,
CONFIG_SYS_DDR_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 12, BOOKE_PAGESZ_256M, 1),
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000,
CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 13, BOOKE_PAGESZ_256M, 1),
#endif
};
diff --git a/board/freescale/p1_p2_rdb_pc/tlb.c b/board/freescale/p1_p2_rdb_pc/tlb.c
index 7cba411007..6324ebfa32 100644
--- a/board/freescale/p1_p2_rdb_pc/tlb.c
+++ b/board/freescale/p1_p2_rdb_pc/tlb.c
@@ -82,7 +82,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
(defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR))
/* *I*G - eSDHC/eSPI/NAND boot */
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 8, BOOKE_PAGESZ_1G, 1),
#if defined(CONFIG_TARGET_P1020MBG) || defined(CONFIG_TARGET_P1020RDB_PD)
diff --git a/board/freescale/p1_twr/tlb.c b/board/freescale/p1_twr/tlb.c
index 308335c974..0f365f9163 100644
--- a/board/freescale/p1_twr/tlb.c
+++ b/board/freescale/p1_twr/tlb.c
@@ -67,7 +67,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
#ifdef CONFIG_SYS_RAMBOOT
/* *I*G - eSDHC boot */
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 8, BOOKE_PAGESZ_1G, 1),
#endif
diff --git a/board/freescale/t102xqds/tlb.c b/board/freescale/t102xqds/tlb.c
index 409e173999..0d27a998c5 100644
--- a/board/freescale/t102xqds/tlb.c
+++ b/board/freescale/t102xqds/tlb.c
@@ -102,11 +102,11 @@ struct fsl_e_tlb_entry tlb_table[] = {
#if defined(CONFIG_RAMBOOT_PBL) && !defined(CONFIG_SPL_BUILD)
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 12, BOOKE_PAGESZ_1G, 1),
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 13, BOOKE_PAGESZ_1G, 1)
#endif
/* entry 14 and 15 has been used hard coded, they will be disabled
diff --git a/board/freescale/t102xrdb/tlb.c b/board/freescale/t102xrdb/tlb.c
index 8269b3d725..d77ce25784 100644
--- a/board/freescale/t102xrdb/tlb.c
+++ b/board/freescale/t102xrdb/tlb.c
@@ -102,11 +102,11 @@ struct fsl_e_tlb_entry tlb_table[] = {
#if defined(CONFIG_RAMBOOT_PBL) && !defined(CONFIG_SPL_BUILD)
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 12, BOOKE_PAGESZ_1G, 1),
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 13, BOOKE_PAGESZ_1G, 1)
#endif
/* entry 14 and 15 has been used hard coded, they will be disabled
diff --git a/board/freescale/t104xrdb/tlb.c b/board/freescale/t104xrdb/tlb.c
index 7c0511e268..078947902f 100644
--- a/board/freescale/t104xrdb/tlb.c
+++ b/board/freescale/t104xrdb/tlb.c
@@ -120,11 +120,11 @@ struct fsl_e_tlb_entry tlb_table[] = {
#if defined(CONFIG_RAMBOOT_PBL) && !defined(CONFIG_SPL_BUILD)
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 12, BOOKE_PAGESZ_1G, 1),
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 13, BOOKE_PAGESZ_1G, 1)
#endif
};
diff --git a/board/freescale/t208xqds/tlb.c b/board/freescale/t208xqds/tlb.c
index 8d602989b2..b0b3b4d48a 100644
--- a/board/freescale/t208xqds/tlb.c
+++ b/board/freescale/t208xqds/tlb.c
@@ -145,7 +145,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
#if defined(CONFIG_RAMBOOT_PBL) && !defined(CONFIG_SPL_BUILD)
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 19, BOOKE_PAGESZ_2G, 1)
#endif
};
diff --git a/board/freescale/t208xrdb/tlb.c b/board/freescale/t208xrdb/tlb.c
index 2ebea36a5c..2cae4d02b3 100644
--- a/board/freescale/t208xrdb/tlb.c
+++ b/board/freescale/t208xrdb/tlb.c
@@ -144,7 +144,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
#endif
#if defined(CONFIG_RAMBOOT_PBL) && !defined(CONFIG_SPL_BUILD)
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 19, BOOKE_PAGESZ_2G, 1)
#endif
diff --git a/board/freescale/t4qds/tlb.c b/board/freescale/t4qds/tlb.c
index 1e4d096f5f..a6d8bb3603 100644
--- a/board/freescale/t4qds/tlb.c
+++ b/board/freescale/t4qds/tlb.c
@@ -139,7 +139,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
#if defined(CONFIG_RAMBOOT_PBL) && !defined(CONFIG_SPL_BUILD)
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 19, BOOKE_PAGESZ_2G, 1)
#endif
};
diff --git a/board/freescale/t4rdb/tlb.c b/board/freescale/t4rdb/tlb.c
index 6a6b4b5cc1..648cfabeea 100644
--- a/board/freescale/t4rdb/tlb.c
+++ b/board/freescale/t4rdb/tlb.c
@@ -116,7 +116,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
#endif
#if defined(CONFIG_RAMBOOT_PBL) && !defined(CONFIG_SPL_BUILD)
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 18, BOOKE_PAGESZ_2G, 1)
#endif
};
diff --git a/board/gdsys/p1022/tlb.c b/board/gdsys/p1022/tlb.c
index aee86a4356..58b438fc14 100644
--- a/board/gdsys/p1022/tlb.c
+++ b/board/gdsys/p1022/tlb.c
@@ -65,7 +65,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
#ifdef CONFIG_SYS_RAMBOOT
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 6, BOOKE_PAGESZ_1G, 1),
#endif
#endif
diff --git a/board/logicpd/omap3som/README b/board/logicpd/omap3som/README
index 06b3998ac0..b77b3d63db 100644
--- a/board/logicpd/omap3som/README
+++ b/board/logicpd/omap3som/README
@@ -17,3 +17,46 @@ This step is optional, but should you want to change the default to the SOM-LV,
make distclean
make omap3_logic_defconfig
+Falcon Mode: FAT SD cards
+=========================
+
+In this case the additional file is written to the filesystem. In this
+example we assume that the uImage and device tree to be used are already on
+the FAT filesystem (only the uImage MUST be for this to function
+afterwards) along with a Falcon Mode aware MLO and the FAT partition has
+already been created and marked bootable:
+
+U-Boot # mmc rescan
+# Load kernel and device tree into memory, perform export
+U-Boot # fatload mmc 0 ${loadaddr} uImage
+U-Boot # run loadfdt
+U-Boot # setenv optargs quiet
+U-Boot # run mmcargs
+U-Boot # run common_bootargs
+U-Boot # spl export fdt ${loadaddr} - ${fdtaddr}
+
+This will print a number of lines and then end with something like:
+ Loading Device Tree to 8dec9000, end 8dee0295 ... OK
+
+So then note the starting address and write the args to mmc/sd:
+
+U-Boot # fatwrite mmc 0:1 0x8dec9000 args 0x20000
+
+The size of 0x20000 matches the CMD_SPL_WRITE_SIZE.
+
+Falcon Mode: NAND
+=================
+
+In this case the additional data is written to another partition of the
+NAND. In this example we assume that the uImage and device tree to be are
+already located on the NAND somewhere (such as filesystem or mtd partition)
+along with a Falcon Mode aware MLO written to the correct locations for
+booting and mtdparts have been configured correctly for the board:
+
+U-Boot # nand read ${loadaddr} kernel
+U-Boot # load nand rootfs ${fdtaddr} /boot/am335x-evm.dtb
+U-Boot # run nandargs
+U-Boot # run common_bootargs
+U-Boot # spl export fdt ${loadaddr} - ${fdtaddr}
+U-Boot # nand erase.part u-boot-spl-os
+U-Boot # nand write ${fdtaddr} u-boot-spl-os
diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c
index a55a520e63..b30fa24a32 100644
--- a/board/logicpd/omap3som/omap3logic.c
+++ b/board/logicpd/omap3som/omap3logic.c
@@ -114,6 +114,47 @@ void get_board_mem_timings(struct board_sdrc_timings *timings)
timings->ctrlb = MICRON_V_ACTIMB_200;
timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
}
+
+#define GPMC_NAND_COMMAND_0 (OMAP34XX_GPMC_BASE + 0x7c)
+#define GPMC_NAND_DATA_0 (OMAP34XX_GPMC_BASE + 0x84)
+#define GPMC_NAND_ADDRESS_0 (OMAP34XX_GPMC_BASE + 0x80)
+
+void spl_board_prepare_for_linux(void)
+{
+ /* The Micron NAND starts locked which
+ * prohibits mounting the NAND as RW
+ * The following commands are what unlocks
+ * the NAND to become RW Falcon Mode does not
+ * have as many smarts as U-Boot, but Logic PD
+ * only makes NAND with 512MB so these hard coded
+ * values should work for all current models
+ */
+
+ writeb(0x70, GPMC_NAND_COMMAND_0);
+ writeb(-1, GPMC_NAND_DATA_0);
+ writeb(0x7a, GPMC_NAND_COMMAND_0);
+ writeb(0x00, GPMC_NAND_ADDRESS_0);
+ writeb(0x00, GPMC_NAND_ADDRESS_0);
+ writeb(0x00, GPMC_NAND_ADDRESS_0);
+ writeb(-1, GPMC_NAND_COMMAND_0);
+
+ /* Begin address 0 */
+ writeb(NAND_CMD_UNLOCK1, 0x6e00007c);
+ writeb(0x00, GPMC_NAND_ADDRESS_0);
+ writeb(0x00, GPMC_NAND_ADDRESS_0);
+ writeb(0x00, GPMC_NAND_ADDRESS_0);
+ writeb(-1, GPMC_NAND_DATA_0);
+
+ /* Ending address at the end of Flash */
+ writeb(NAND_CMD_UNLOCK2, GPMC_NAND_COMMAND_0);
+ writeb(0xc0, GPMC_NAND_ADDRESS_0);
+ writeb(0xff, GPMC_NAND_ADDRESS_0);
+ writeb(0x03, GPMC_NAND_ADDRESS_0);
+ writeb(-1, GPMC_NAND_DATA_0);
+ writeb(0x79, GPMC_NAND_COMMAND_0);
+ writeb(-1, GPMC_NAND_DATA_0);
+ writeb(-1, GPMC_NAND_DATA_0);
+}
#endif
#ifdef CONFIG_USB_MUSB_OMAP2PLUS
@@ -207,6 +248,16 @@ int board_init(void)
}
#ifdef CONFIG_BOARD_LATE_INIT
+
+static void unlock_nand(void)
+{
+ int dev = nand_curr_device;
+ struct mtd_info *mtd;
+
+ mtd = get_nand_dev_by_index(dev);
+ nand_unlock(mtd, 0, mtd->size, 0);
+}
+
int board_late_init(void)
{
struct board_id *board;
@@ -256,6 +307,10 @@ int board_late_init(void)
/* restore hsusb0_data5 pin as hsusb0_data5 */
MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0));
+
+#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK
+ unlock_nand();
+#endif
return 0;
}
#endif
diff --git a/board/sbc8548/tlb.c b/board/sbc8548/tlb.c
index 2f7e4c5364..d2bf3049f1 100644
--- a/board/sbc8548/tlb.c
+++ b/board/sbc8548/tlb.c
@@ -66,7 +66,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xf0000000 64M LBC SDRAM First half
*/
SET_TLB_ENTRY(1, CONFIG_SYS_LBC_SDRAM_BASE, CONFIG_SYS_LBC_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 3, BOOKE_PAGESZ_64M, 1),
/*
@@ -75,7 +75,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
*/
SET_TLB_ENTRY(1, CONFIG_SYS_LBC_SDRAM_BASE + 0x4000000,
CONFIG_SYS_LBC_SDRAM_BASE + 0x4000000,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 4, BOOKE_PAGESZ_64M, 1),
#endif
diff --git a/board/synopsys/hsdk/hsdk.c b/board/synopsys/hsdk/hsdk.c
index 7b562556e6..7641978a7b 100644
--- a/board/synopsys/hsdk/hsdk.c
+++ b/board/synopsys/hsdk/hsdk.c
@@ -26,6 +26,10 @@ int board_early_init_f(void)
return 0;
}
+#define SDIO_BASE (ARC_PERIPHERAL_BASE + 0xA000)
+#define SDIO_UHS_REG_EXT (SDIO_BASE + 0x108)
+#define SDIO_UHS_REG_EXT_DIV_2 (2 << 30)
+
int board_mmc_init(bd_t *bis)
{
struct dwmci_host *host = NULL;
@@ -36,12 +40,18 @@ int board_mmc_init(bd_t *bis)
return 1;
}
+ /*
+ * Switch SDIO external ciu clock divider from default div-by-8 to
+ * minimum possible div-by-2.
+ */
+ writel(SDIO_UHS_REG_EXT_DIV_2, (void __iomem *) SDIO_UHS_REG_EXT);
+
memset(host, 0, sizeof(struct dwmci_host));
host->name = "Synopsys Mobile storage";
host->ioaddr = (void *)ARC_DWMMC_BASE;
host->buswidth = 4;
host->dev_index = 0;
- host->bus_hz = 100000000;
+ host->bus_hz = 50000000;
add_dwmci(host, host->bus_hz / 2, 400000);
diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 0ad267cdd0..27e3823d52 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -173,7 +173,7 @@ static void setup_serial(void)
serialno = crc32_no_comp(0, low, 8);
serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;
- snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno);
+ snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno);
env_set("cpuid#", cpuid_str);
env_set("serial#", serialno_str);