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Diffstat (limited to 'doc/board')
| -rw-r--r-- | doc/board/AndesTech/ae350.rst (renamed from doc/board/AndesTech/ax25-ae350.rst) | 16 | ||||
| -rw-r--r-- | doc/board/AndesTech/index.rst | 2 | ||||
| -rw-r--r-- | doc/board/broadcom/bcm7xxx.rst | 183 | ||||
| -rw-r--r-- | doc/board/broadcom/index.rst | 1 | ||||
| -rw-r--r-- | doc/board/gateworks/imx8mm_venice.rst | 50 | ||||
| -rw-r--r-- | doc/board/gateworks/imx8mn_venice.rst | 50 | ||||
| -rw-r--r-- | doc/board/gateworks/imx8mp_venice.rst | 50 | ||||
| -rw-r--r-- | doc/board/gateworks/index.rst | 11 | ||||
| -rw-r--r-- | doc/board/index.rst | 1 |
9 files changed, 355 insertions, 9 deletions
diff --git a/doc/board/AndesTech/ax25-ae350.rst b/doc/board/AndesTech/ae350.rst index b46f427f4b..42a2b4d0b5 100644 --- a/doc/board/AndesTech/ax25-ae350.rst +++ b/doc/board/AndesTech/ae350.rst @@ -1,20 +1,20 @@ .. SPDX-License-Identifier: GPL-2.0+ -AX25-AE350 -========== +AE350 +====== -AE350 is the mainline SoC produced by Andes Technology using AX25 CPU core -base on RISC-V architecture. +AE350 is the mainline SoC produced by Andes Technology using AndesV5 CPU core +based on RISC-V architecture. AE350 has integrated both AHB and APB bus and many periphals for application and product development. -AX25-AE350 is the SoC with AE350 hardcore CPU. +AndesV5 is Andes CPU IP family that adopts RISC-V architecture. -AX25 is Andes CPU IP to adopt RISC-V architecture. +AndesV5 family includes 25, 27, 45 series. -AX25 Features -------------- +25-Series Features +------------------ CPU Core - 5-stage in-order execution pipeline diff --git a/doc/board/AndesTech/index.rst b/doc/board/AndesTech/index.rst index d8f7d155fc..cacc5791a9 100644 --- a/doc/board/AndesTech/index.rst +++ b/doc/board/AndesTech/index.rst @@ -7,4 +7,4 @@ Andes Tech :maxdepth: 2 adp-ag101p - ax25-ae350 + ae350 diff --git a/doc/board/broadcom/bcm7xxx.rst b/doc/board/broadcom/bcm7xxx.rst new file mode 100644 index 0000000000..f1994d9f97 --- /dev/null +++ b/doc/board/broadcom/bcm7xxx.rst @@ -0,0 +1,183 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright (C) 2018, 2023 Thomas Fitzsimmons <fitzsim@fitzsim.org> + +BCM7445 and BCM7260 +=================== + +This document describes how to use U-Boot on the Broadcom 7445 and +Broadcom 7260 SoC, as a third stage bootloader loaded by Broadcom's +BOLT bootloader. + +BOLT loads U-Boot as a generic ELF binary. Some U-Boot features such +as networking are not implemented but other important features are, +including: + +* ext4 file system traversal +* support for loading FIT images +* advanced scripting +* support for FIT-provided DTBs instead of relying on the BOLT-provided DTB + +A customized version of this port has been used in production. The +same approach may work on other BCM7xxx boards, with some +configuration adjustments and memory layout experimentation. + +Configure +--------- + +BCM7445 +^^^^^^^ + +.. code-block:: console + + $ make bcm7445_defconfig + +BCM7260 +^^^^^^^ + +.. code-block:: console + + $ make bcm7260_defconfig + +Build +----- + +.. code-block:: console + + $ make + $ ${CROSS_COMPILE}strip u-boot + +Run +--- + +To tell U-Boot which serial port to use for its console, set the +``stdout-path`` property in the ``/chosen`` node of the BOLT-generated +device tree. For example: + +:: + + BOLT> dt add prop chosen stdout-path s serial0:115200n8 + +Flash the ``u-boot`` binary into board storage, then invoke it from +BOLT. For example: + +:: + + BOLT> boot -bsu -elf flash0.u-boot1 + +This port assumes that I-cache and D-cache are already enabled when +U-Boot is entered. + +Flattened Image Tree Support +---------------------------- + +What follows is an example FIT image source file. Build it with: + +.. code-block:: console + + $ mkimage -f image.its image.itb + +Booting the resulting ``image.itb`` was tested on BOLT v1.20, with the +following kernels: + +* https://github.com/Broadcom/stblinux-3.14 +* https://github.com/Broadcom/stblinux-4.1 +* https://github.com/Broadcom/stblinux-4.9 + +and with a generic ARMv7 root file system. + +**image.its** + +:: + + /dts-v1/; + / { + description = "BCM7445 FIT"; + images { + kernel@1 { + description = "Linux kernel"; + /* + * This kernel image output format can be + * generated with: + * + * make vmlinux + * ${CROSS_COMPILE}objcopy -O binary -S vmlinux vmlinux.bin + * gzip -9 vmlinux.bin + * + * For stblinux-3.14, the specific Broadcom + * board type should be configured in the + * kernel, for example CONFIG_BCM7445D0=y. + */ + data = /incbin/("<vmlinux.bin.gz>"); + type = "kernel"; + arch = "arm"; + os = "linux"; + compression = "gzip"; + load = <0x8000>; + entry = <0x8000>; + hash@1 { + algo = "sha256"; + }; + }; + ramdisk@1 { + description = "Initramfs root file system"; + data = /incbin/("<initramfs.cpio.gz>"); + type = "ramdisk"; + arch = "arm"; + os = "linux"; + compression = "gzip"; + /* + * Set the environment variable initrd_high to + * 0xffffffff, and set "load" and "entry" here + * to 0x0 to keep initramfs in-place and to + * accommodate stblinux bmem/CMA reservations. + */ + load = <0x0>; + entry = <0x0>; + hash@1 { + algo = "sha256"; + }; + }; + fdt@1 { + description = "Device tree dumped from BOLT"; + /* + * This DTB should be similar to the + * BOLT-generated device tree, after BOLT has + * done its runtime modifications to it. For + * example, it can be dumped from within + * U-Boot (at ${fdtcontroladdr}), after BOLT + * has loaded U-Boot. The result can be added + * to the Linux source tree as a .dts file. + * + * To support modifications to the device tree + * in-place in U-Boot, add to Linux's + * arch/arm/boot/dts/Makefile: + * + * DTC_FLAGS ?= -p 4096 + * + * This will leave some padding in the DTB and + * thus reserve room for node additions. + * + * Also, set the environment variable fdt_high + * to 0xffffffff to keep the DTB in-place and + * to accommodate stblinux bmem/CMA + * reservations. + */ + data = /incbin/("<bolt-<version>.dtb"); + type = "flat_dt"; + arch = "arm"; + compression = "none"; + hash@1 { + algo = "sha256"; + }; + }; + }; + configurations { + default = "conf@bcm7445"; + conf@bcm7445 { + description = "BCM7445 configuration"; + kernel = "kernel@1"; + ramdisk = "ramdisk@1"; + fdt = "fdt@1"; + }; + }; + }; diff --git a/doc/board/broadcom/index.rst b/doc/board/broadcom/index.rst index 4f0e825fef..a56bd1f069 100644 --- a/doc/board/broadcom/index.rst +++ b/doc/board/broadcom/index.rst @@ -7,4 +7,5 @@ Broadcom .. toctree:: :maxdepth: 2 + bcm7xxx raspberrypi diff --git a/doc/board/gateworks/imx8mm_venice.rst b/doc/board/gateworks/imx8mm_venice.rst new file mode 100644 index 0000000000..f1e7e49944 --- /dev/null +++ b/doc/board/gateworks/imx8mm_venice.rst @@ -0,0 +1,50 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +imx8mm_venice +============= + +U-Boot for the Gateworks i.MX8M Mini Venice Development Kit boards + +Quick Start +----------- +- Build the ARM Trusted firmware binary +- Get DDR firmware +- Build U-Boot +- Flash to eMMC +- Boot + +Get and Build the ARM Trusted firmware +-------------------------------------- + +.. code-block:: bash + + $ git clone https://github.com/nxp-imx/imx-atf.git -b lf_v2.4 + $ make PLAT=imx8mm bl31 CROSS_COMPILE=aarch64-linux-gnu- + $ cp build/imx8mm/release/bl31.bin . + +Get the DDR Firmware +-------------------- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin + $ chmod +x firmware-imx-8.9.bin + $ ./firmware-imx-8.9.bin + $ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin . + +Build U-Boot +------------ + +.. code-block:: bash + + $ make imx8mm_venice_defconfig + $ make CROSS_COMPILE=aarch64-linux-gnu- + +Update eMMC +----------- + +.. code-block:: bash + + => tftpboot $loadaddr flash.bin + => setexpr blkcnt $filesize + 0x1ff && setexpr blkcnt $blkcnt / 0x200 + => mmc dev 2 && mmc write $loadaddr 0x42 $blkcnt diff --git a/doc/board/gateworks/imx8mn_venice.rst b/doc/board/gateworks/imx8mn_venice.rst new file mode 100644 index 0000000000..7ba953a4a8 --- /dev/null +++ b/doc/board/gateworks/imx8mn_venice.rst @@ -0,0 +1,50 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +imx8mn_venice +============= + +U-Boot for the Gateworks i.MX8M Nano Venice Development Kit boards + +Quick Start +----------- +- Build the ARM Trusted firmware binary +- Get DDR firmware +- Build U-Boot +- Flash to eMMC +- Boot + +Get and Build the ARM Trusted firmware +-------------------------------------- + +.. code-block:: bash + + $ git clone https://github.com/nxp-imx/imx-atf.git -b lf_v2.4 + $ make PLAT=imx8mn bl31 CROSS_COMPILE=aarch64-linux-gnu- + $ cp build/imx8mn/release/bl31.bin . + +Get the DDR Firmware +-------------------- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin + $ chmod +x firmware-imx-8.9.bin + $ ./firmware-imx-8.9.bin + $ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin . + +Build U-Boot +------------ + +.. code-block:: bash + + $ make imx8mn_venice_defconfig + $ make CROSS_COMPILE=aarch64-linux-gnu- + +Update eMMC +----------- + +.. code-block:: bash + + => tftpboot $loadaddr flash.bin + => setexpr blkcnt $filesize + 0x1ff && setexpr blkcnt $blkcnt / 0x200 + => mmc dev 2 && mmc write $loadaddr 0x40 $blkcnt diff --git a/doc/board/gateworks/imx8mp_venice.rst b/doc/board/gateworks/imx8mp_venice.rst new file mode 100644 index 0000000000..632cd742d1 --- /dev/null +++ b/doc/board/gateworks/imx8mp_venice.rst @@ -0,0 +1,50 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +imx8mp_venice +============= + +U-Boot for the Gateworks i.MX8M Plus Venice Development Kit boards + +Quick Start +----------- +- Build the ARM Trusted firmware binary +- Get DDR firmware +- Build U-Boot +- Flash to eMMC +- Boot + +Get and Build the ARM Trusted firmware +-------------------------------------- + +.. code-block:: bash + + $ git clone https://github.com/nxp-imx/imx-atf.git -b lf_v2.4 + $ make PLAT=imx8mp bl31 CROSS_COMPILE=aarch64-linux-gnu- + $ cp build/imx8mp/release/bl31.bin . + +Get the DDR Firmware +-------------------- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin + $ chmod +x firmware-imx-8.9.bin + $ ./firmware-imx-8.9.bin + $ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin . + +Build U-Boot +------------ + +.. code-block:: bash + + $ make imx8mp_venice_defconfig + $ make CROSS_COMPILE=aarch64-linux-gnu- + +Update eMMC +----------- + +.. code-block:: bash + + => tftpboot $loadaddr flash.bin + => setexpr blkcnt $filesize + 0x1ff && setexpr blkcnt $blkcnt / 0x200 + => mmc dev 2 && mmc write $loadaddr 0x40 $blkcnt diff --git a/doc/board/gateworks/index.rst b/doc/board/gateworks/index.rst new file mode 100644 index 0000000000..6cf0839814 --- /dev/null +++ b/doc/board/gateworks/index.rst @@ -0,0 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Gateworks +========= + +.. toctree:: + :maxdepth: 2 + + imx8mm_venice + imx8mn_venice + imx8mp_venice diff --git a/doc/board/index.rst b/doc/board/index.rst index 1e628e99e6..618d22e616 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -20,6 +20,7 @@ Board-specific doc congatec/index coreboot/index emulation/index + gateworks/index google/index highbank/index intel/index |