diff options
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/README.bcm7xxx | 156 | ||||
| -rw-r--r-- | doc/arch/index.rst | 1 | ||||
| -rw-r--r-- | doc/arch/riscv.rst | 81 | ||||
| -rw-r--r-- | doc/board/AndesTech/ae350.rst (renamed from doc/board/AndesTech/ax25-ae350.rst) | 16 | ||||
| -rw-r--r-- | doc/board/AndesTech/index.rst | 2 | ||||
| -rw-r--r-- | doc/board/broadcom/bcm7xxx.rst | 183 | ||||
| -rw-r--r-- | doc/board/broadcom/index.rst | 1 | ||||
| -rw-r--r-- | doc/board/gateworks/imx8mm_venice.rst | 50 | ||||
| -rw-r--r-- | doc/board/gateworks/imx8mn_venice.rst | 50 | ||||
| -rw-r--r-- | doc/board/gateworks/imx8mp_venice.rst | 50 | ||||
| -rw-r--r-- | doc/board/gateworks/index.rst | 11 | ||||
| -rw-r--r-- | doc/board/index.rst | 1 | ||||
| -rw-r--r-- | doc/conf.py | 4 | ||||
| -rw-r--r-- | doc/develop/devicetree/dt_qemu.rst | 4 | ||||
| -rw-r--r-- | doc/develop/release_cycle.rst | 2 | ||||
| -rw-r--r-- | doc/usage/cmd/ebtupdate.rst | 69 | ||||
| -rw-r--r-- | doc/usage/index.rst | 1 |
17 files changed, 510 insertions, 172 deletions
diff --git a/doc/README.bcm7xxx b/doc/README.bcm7xxx deleted file mode 100644 index 6839da5f97..0000000000 --- a/doc/README.bcm7xxx +++ /dev/null @@ -1,156 +0,0 @@ -Summary -======= - -This document describes how to use U-Boot on the Broadcom 7445 SoC, as -a third stage bootloader loaded by Broadcom's BOLT bootloader. - -BOLT loads U-Boot as a generic ELF binary. Some U-Boot features such -as networking are not yet available but other important features are, -including: - - - ext4 file system traversal - - - support for loading FIT images - - - advanced scripting - - - support for FIT-provided DTBs instead of relying on the - BOLT-provided DTB - -A customized version of this port has been used in production. The -same approach may work on other BCM7xxx boards, with some -configuration adjustments and memory layout experimentation. - -Build -===== - -make bcm7445_defconfig -make -${CROSS_COMPILE}strip u-boot - -Run -=== - -To tell U-Boot which serial port to use for its console, set the -"stdout-path" property in the "/chosen" node of the BOLT-generated -device tree. For example: - -BOLT> dt add prop chosen stdout-path s serial0:115200n8 - -Flash the u-boot binary into board storage, then invoke it from BOLT. -For example: - -BOLT> boot -bsu -elf flash0.u-boot1 - -This port assumes that I-cache and D-cache are already enabled when -U-Boot is entered. - -Flattened Image Tree Support -============================ - -What follows is an example FIT image source file. Build it with: - -mkimage -f image.its image.itb - -Booting the resulting image.itb was tested on BOLT v1.20, with the -following kernels: - -https://github.com/Broadcom/stblinux-3.14 -https://github.com/Broadcom/stblinux-4.1 -https://github.com/Broadcom/stblinux-4.9 - -and with a generic ARMv7 root file system. - -image.its: -/dts-v1/; -/ { - description = "BCM7445 FIT"; - images { - kernel@1 { - description = "Linux kernel"; - /* - * This kernel image output format can be - * generated with: - * - * make vmlinux - * ${CROSS_COMPILE}objcopy -O binary -S vmlinux vmlinux.bin - * gzip -9 vmlinux.bin - * - * For stblinux-3.14, the specific Broadcom - * board type should be configured in the - * kernel, for example CONFIG_BCM7445D0=y. - */ - data = /incbin/("<vmlinux.bin.gz>"); - type = "kernel"; - arch = "arm"; - os = "linux"; - compression = "gzip"; - load = <0x8000>; - entry = <0x8000>; - hash@1 { - algo = "sha256"; - }; - }; - ramdisk@1 { - description = "Initramfs root file system"; - data = /incbin/("<initramfs.cpio.gz>"); - type = "ramdisk"; - arch = "arm"; - os = "linux"; - compression = "gzip"; - /* - * Set the environment variable initrd_high to - * 0xffffffff, and set "load" and "entry" here - * to 0x0 to keep initramfs in-place and to - * accommodate stblinux bmem/CMA reservations. - */ - load = <0x0>; - entry = <0x0>; - hash@1 { - algo = "sha256"; - }; - }; - fdt@1 { - description = "Device tree dumped from BOLT"; - /* - * This DTB should be similar to the - * BOLT-generated device tree, after BOLT has - * done its runtime modifications to it. For - * example, it can be dumped from within - * U-Boot (at ${fdtcontroladdr}), after BOLT - * has loaded U-Boot. The result can be added - * to the Linux source tree as a .dts file. - * - * To support modifications to the device tree - * in-place in U-Boot, add to Linux's - * arch/arm/boot/dts/Makefile: - * - * DTC_FLAGS ?= -p 4096 - * - * This will leave some padding in the DTB and - * thus reserve room for node additions. - * - * Also, set the environment variable fdt_high - * to 0xffffffff to keep the DTB in-place and - * to accommodate stblinux bmem/CMA - * reservations. - */ - data = /incbin/("<bolt-<version>.dtb"); - type = "flat_dt"; - arch = "arm"; - compression = "none"; - hash@1 { - algo = "sha256"; - }; - }; - }; - configurations { - default = "conf@bcm7445"; - conf@bcm7445 { - description = "BCM7445 configuration"; - kernel = "kernel@1"; - ramdisk = "ramdisk@1"; - fdt = "fdt@1"; - }; - }; -}; diff --git a/doc/arch/index.rst b/doc/arch/index.rst index b3e85f9bf3..b8da4b8c8e 100644 --- a/doc/arch/index.rst +++ b/doc/arch/index.rst @@ -11,6 +11,7 @@ Architecture-specific doc m68k mips nios2 + riscv sandbox/index sh x86 diff --git a/doc/arch/riscv.rst b/doc/arch/riscv.rst new file mode 100644 index 0000000000..af0c48b898 --- /dev/null +++ b/doc/arch/riscv.rst @@ -0,0 +1,81 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright (C) 2023, Yu Chien Peter Lin <peterlin@andestech.com> + +RISC-V +====== + +Overview +-------- + +This document outlines the U-Boot boot process for the RISC-V architecture. +RISC-V is an open-source instruction set architecture (ISA) based on the +principles of reduced instruction set computing (RISC). It has been designed +to be flexible and customizable, allowing it to be adapted to different use +cases, from embedded systems to high performance servers. + +Typical Boot Process +-------------------- + +U-Boot can run in either M-mode or S-mode, depending on whether it runs before +the initialization of the firmware providing SBI (Supervisor Binary Interface). +The firmware is necessary in the RISC-V boot process as it serves as a SEE +(Supervisor Execution Environment) to handle exceptions for the S-mode U-Boot +or Operating System. + +In between the boot phases, the hartid is passed through the a0 register, and +the start address of the devicetree is passed through the a1 register. + +As a reference, OpenSBI is an SBI implementation that can be used with U-Boot +in different modes, see the +`OpenSBI firmware document <https://github.com/riscv-software-src/opensbi/tree/master/docs/firmware>`_ +for more details. + +M-mode U-Boot +^^^^^^^^^^^^^ + +When running in M-mode U-Boot, it will load the payload image (e.g. +`fw_payload <https://github.com/riscv-software-src/opensbi/blob/master/docs/firmware/fw_payload.md>`_) +which contains the firmware and the S-mode Operating System; in this case, you +can use mkimage to package the payload image into an uImage format, and boot it +using the bootm command. + +The following diagram illustrates the boot process:: + + <-----------( M-mode )----------><--( S-mode )--> + +----------+ +--------------+ +------------+ + | U-Boot |-->| SBI firmware |--->| OS | + +----------+ +--------------+ +------------+ + +To examine the boot process with the QEMU virt machine, you can follow the +steps in the "Building U-Boot" section of the following document: +:doc:`../board/emulation/qemu-riscv`. + +S-mode U-Boot +^^^^^^^^^^^^^ + +RISC-V production boot images may include a U-Boot SPL for platform-specific +initialization. The U-Boot SPL then loads a FIT image (u-boot.itb), which +contains a firmware (e.g. +`fw_dynamic <https://github.com/riscv-software-src/opensbi/blob/master/docs/firmware/fw_dynamic.md>`_) +providing the SBI, as well as a regular U-Boot (or U-Boot proper) running in +S-mode. Finally, the S-mode Operating +System is loaded. + +The following diagram illustrates the boot process:: + + <-------------( M-mode )----------><----------( S-mode )-------> + +------------+ +--------------+ +----------+ +----------+ + | U-Boot SPL |-->| SBI firmware |--->| U-Boot |-->| OS | + +------------+ +--------------+ +----------+ +----------+ + +To examine the boot process with the QEMU virt machine, you can follow the +steps in the "Running U-Boot SPL" section of the following document: +:doc:`../board/emulation/qemu-riscv`. + +Toolchain +--------- + +You can build the +`RISC-V GNU toolchain <https://github.com/riscv-collab/riscv-gnu-toolchain>`_ +from scratch, or download a pre-built toolchain from the +`releases page <https://github.com/riscv-collab/riscv-gnu-toolchain/releases>`_. diff --git a/doc/board/AndesTech/ax25-ae350.rst b/doc/board/AndesTech/ae350.rst index b46f427f4b..42a2b4d0b5 100644 --- a/doc/board/AndesTech/ax25-ae350.rst +++ b/doc/board/AndesTech/ae350.rst @@ -1,20 +1,20 @@ .. SPDX-License-Identifier: GPL-2.0+ -AX25-AE350 -========== +AE350 +====== -AE350 is the mainline SoC produced by Andes Technology using AX25 CPU core -base on RISC-V architecture. +AE350 is the mainline SoC produced by Andes Technology using AndesV5 CPU core +based on RISC-V architecture. AE350 has integrated both AHB and APB bus and many periphals for application and product development. -AX25-AE350 is the SoC with AE350 hardcore CPU. +AndesV5 is Andes CPU IP family that adopts RISC-V architecture. -AX25 is Andes CPU IP to adopt RISC-V architecture. +AndesV5 family includes 25, 27, 45 series. -AX25 Features -------------- +25-Series Features +------------------ CPU Core - 5-stage in-order execution pipeline diff --git a/doc/board/AndesTech/index.rst b/doc/board/AndesTech/index.rst index d8f7d155fc..cacc5791a9 100644 --- a/doc/board/AndesTech/index.rst +++ b/doc/board/AndesTech/index.rst @@ -7,4 +7,4 @@ Andes Tech :maxdepth: 2 adp-ag101p - ax25-ae350 + ae350 diff --git a/doc/board/broadcom/bcm7xxx.rst b/doc/board/broadcom/bcm7xxx.rst new file mode 100644 index 0000000000..f1994d9f97 --- /dev/null +++ b/doc/board/broadcom/bcm7xxx.rst @@ -0,0 +1,183 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright (C) 2018, 2023 Thomas Fitzsimmons <fitzsim@fitzsim.org> + +BCM7445 and BCM7260 +=================== + +This document describes how to use U-Boot on the Broadcom 7445 and +Broadcom 7260 SoC, as a third stage bootloader loaded by Broadcom's +BOLT bootloader. + +BOLT loads U-Boot as a generic ELF binary. Some U-Boot features such +as networking are not implemented but other important features are, +including: + +* ext4 file system traversal +* support for loading FIT images +* advanced scripting +* support for FIT-provided DTBs instead of relying on the BOLT-provided DTB + +A customized version of this port has been used in production. The +same approach may work on other BCM7xxx boards, with some +configuration adjustments and memory layout experimentation. + +Configure +--------- + +BCM7445 +^^^^^^^ + +.. code-block:: console + + $ make bcm7445_defconfig + +BCM7260 +^^^^^^^ + +.. code-block:: console + + $ make bcm7260_defconfig + +Build +----- + +.. code-block:: console + + $ make + $ ${CROSS_COMPILE}strip u-boot + +Run +--- + +To tell U-Boot which serial port to use for its console, set the +``stdout-path`` property in the ``/chosen`` node of the BOLT-generated +device tree. For example: + +:: + + BOLT> dt add prop chosen stdout-path s serial0:115200n8 + +Flash the ``u-boot`` binary into board storage, then invoke it from +BOLT. For example: + +:: + + BOLT> boot -bsu -elf flash0.u-boot1 + +This port assumes that I-cache and D-cache are already enabled when +U-Boot is entered. + +Flattened Image Tree Support +---------------------------- + +What follows is an example FIT image source file. Build it with: + +.. code-block:: console + + $ mkimage -f image.its image.itb + +Booting the resulting ``image.itb`` was tested on BOLT v1.20, with the +following kernels: + +* https://github.com/Broadcom/stblinux-3.14 +* https://github.com/Broadcom/stblinux-4.1 +* https://github.com/Broadcom/stblinux-4.9 + +and with a generic ARMv7 root file system. + +**image.its** + +:: + + /dts-v1/; + / { + description = "BCM7445 FIT"; + images { + kernel@1 { + description = "Linux kernel"; + /* + * This kernel image output format can be + * generated with: + * + * make vmlinux + * ${CROSS_COMPILE}objcopy -O binary -S vmlinux vmlinux.bin + * gzip -9 vmlinux.bin + * + * For stblinux-3.14, the specific Broadcom + * board type should be configured in the + * kernel, for example CONFIG_BCM7445D0=y. + */ + data = /incbin/("<vmlinux.bin.gz>"); + type = "kernel"; + arch = "arm"; + os = "linux"; + compression = "gzip"; + load = <0x8000>; + entry = <0x8000>; + hash@1 { + algo = "sha256"; + }; + }; + ramdisk@1 { + description = "Initramfs root file system"; + data = /incbin/("<initramfs.cpio.gz>"); + type = "ramdisk"; + arch = "arm"; + os = "linux"; + compression = "gzip"; + /* + * Set the environment variable initrd_high to + * 0xffffffff, and set "load" and "entry" here + * to 0x0 to keep initramfs in-place and to + * accommodate stblinux bmem/CMA reservations. + */ + load = <0x0>; + entry = <0x0>; + hash@1 { + algo = "sha256"; + }; + }; + fdt@1 { + description = "Device tree dumped from BOLT"; + /* + * This DTB should be similar to the + * BOLT-generated device tree, after BOLT has + * done its runtime modifications to it. For + * example, it can be dumped from within + * U-Boot (at ${fdtcontroladdr}), after BOLT + * has loaded U-Boot. The result can be added + * to the Linux source tree as a .dts file. + * + * To support modifications to the device tree + * in-place in U-Boot, add to Linux's + * arch/arm/boot/dts/Makefile: + * + * DTC_FLAGS ?= -p 4096 + * + * This will leave some padding in the DTB and + * thus reserve room for node additions. + * + * Also, set the environment variable fdt_high + * to 0xffffffff to keep the DTB in-place and + * to accommodate stblinux bmem/CMA + * reservations. + */ + data = /incbin/("<bolt-<version>.dtb"); + type = "flat_dt"; + arch = "arm"; + compression = "none"; + hash@1 { + algo = "sha256"; + }; + }; + }; + configurations { + default = "conf@bcm7445"; + conf@bcm7445 { + description = "BCM7445 configuration"; + kernel = "kernel@1"; + ramdisk = "ramdisk@1"; + fdt = "fdt@1"; + }; + }; + }; diff --git a/doc/board/broadcom/index.rst b/doc/board/broadcom/index.rst index 4f0e825fef..a56bd1f069 100644 --- a/doc/board/broadcom/index.rst +++ b/doc/board/broadcom/index.rst @@ -7,4 +7,5 @@ Broadcom .. toctree:: :maxdepth: 2 + bcm7xxx raspberrypi diff --git a/doc/board/gateworks/imx8mm_venice.rst b/doc/board/gateworks/imx8mm_venice.rst new file mode 100644 index 0000000000..f1e7e49944 --- /dev/null +++ b/doc/board/gateworks/imx8mm_venice.rst @@ -0,0 +1,50 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +imx8mm_venice +============= + +U-Boot for the Gateworks i.MX8M Mini Venice Development Kit boards + +Quick Start +----------- +- Build the ARM Trusted firmware binary +- Get DDR firmware +- Build U-Boot +- Flash to eMMC +- Boot + +Get and Build the ARM Trusted firmware +-------------------------------------- + +.. code-block:: bash + + $ git clone https://github.com/nxp-imx/imx-atf.git -b lf_v2.4 + $ make PLAT=imx8mm bl31 CROSS_COMPILE=aarch64-linux-gnu- + $ cp build/imx8mm/release/bl31.bin . + +Get the DDR Firmware +-------------------- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin + $ chmod +x firmware-imx-8.9.bin + $ ./firmware-imx-8.9.bin + $ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin . + +Build U-Boot +------------ + +.. code-block:: bash + + $ make imx8mm_venice_defconfig + $ make CROSS_COMPILE=aarch64-linux-gnu- + +Update eMMC +----------- + +.. code-block:: bash + + => tftpboot $loadaddr flash.bin + => setexpr blkcnt $filesize + 0x1ff && setexpr blkcnt $blkcnt / 0x200 + => mmc dev 2 && mmc write $loadaddr 0x42 $blkcnt diff --git a/doc/board/gateworks/imx8mn_venice.rst b/doc/board/gateworks/imx8mn_venice.rst new file mode 100644 index 0000000000..7ba953a4a8 --- /dev/null +++ b/doc/board/gateworks/imx8mn_venice.rst @@ -0,0 +1,50 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +imx8mn_venice +============= + +U-Boot for the Gateworks i.MX8M Nano Venice Development Kit boards + +Quick Start +----------- +- Build the ARM Trusted firmware binary +- Get DDR firmware +- Build U-Boot +- Flash to eMMC +- Boot + +Get and Build the ARM Trusted firmware +-------------------------------------- + +.. code-block:: bash + + $ git clone https://github.com/nxp-imx/imx-atf.git -b lf_v2.4 + $ make PLAT=imx8mn bl31 CROSS_COMPILE=aarch64-linux-gnu- + $ cp build/imx8mn/release/bl31.bin . + +Get the DDR Firmware +-------------------- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin + $ chmod +x firmware-imx-8.9.bin + $ ./firmware-imx-8.9.bin + $ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin . + +Build U-Boot +------------ + +.. code-block:: bash + + $ make imx8mn_venice_defconfig + $ make CROSS_COMPILE=aarch64-linux-gnu- + +Update eMMC +----------- + +.. code-block:: bash + + => tftpboot $loadaddr flash.bin + => setexpr blkcnt $filesize + 0x1ff && setexpr blkcnt $blkcnt / 0x200 + => mmc dev 2 && mmc write $loadaddr 0x40 $blkcnt diff --git a/doc/board/gateworks/imx8mp_venice.rst b/doc/board/gateworks/imx8mp_venice.rst new file mode 100644 index 0000000000..632cd742d1 --- /dev/null +++ b/doc/board/gateworks/imx8mp_venice.rst @@ -0,0 +1,50 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +imx8mp_venice +============= + +U-Boot for the Gateworks i.MX8M Plus Venice Development Kit boards + +Quick Start +----------- +- Build the ARM Trusted firmware binary +- Get DDR firmware +- Build U-Boot +- Flash to eMMC +- Boot + +Get and Build the ARM Trusted firmware +-------------------------------------- + +.. code-block:: bash + + $ git clone https://github.com/nxp-imx/imx-atf.git -b lf_v2.4 + $ make PLAT=imx8mp bl31 CROSS_COMPILE=aarch64-linux-gnu- + $ cp build/imx8mp/release/bl31.bin . + +Get the DDR Firmware +-------------------- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin + $ chmod +x firmware-imx-8.9.bin + $ ./firmware-imx-8.9.bin + $ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin . + +Build U-Boot +------------ + +.. code-block:: bash + + $ make imx8mp_venice_defconfig + $ make CROSS_COMPILE=aarch64-linux-gnu- + +Update eMMC +----------- + +.. code-block:: bash + + => tftpboot $loadaddr flash.bin + => setexpr blkcnt $filesize + 0x1ff && setexpr blkcnt $blkcnt / 0x200 + => mmc dev 2 && mmc write $loadaddr 0x40 $blkcnt diff --git a/doc/board/gateworks/index.rst b/doc/board/gateworks/index.rst new file mode 100644 index 0000000000..6cf0839814 --- /dev/null +++ b/doc/board/gateworks/index.rst @@ -0,0 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Gateworks +========= + +.. toctree:: + :maxdepth: 2 + + imx8mm_venice + imx8mn_venice + imx8mp_venice diff --git a/doc/board/index.rst b/doc/board/index.rst index 1e628e99e6..618d22e616 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -20,6 +20,7 @@ Board-specific doc congatec/index coreboot/index emulation/index + gateworks/index google/index highbank/index intel/index diff --git a/doc/conf.py b/doc/conf.py index 3db70f80c1..00f2413664 100644 --- a/doc/conf.py +++ b/doc/conf.py @@ -47,10 +47,6 @@ extensions = ['kerneldoc', 'rstFlatTable', 'kernel_include', # the process to proceed; hopefully somebody will fix this properly soon. # if major >= 3: - sys.stderr.write('''WARNING: The kernel documentation build process - support for Sphinx v3.0 and above is brand new. Be prepared for - possible issues in the generated output. - ''') if (major > 3) or (minor > 0 or patch >= 2): # Sphinx c function parser is more pedantic with regards to type # checking. Due to that, having macros at c:function cause problems. diff --git a/doc/develop/devicetree/dt_qemu.rst b/doc/develop/devicetree/dt_qemu.rst index c25c4fb053..8ba2b22559 100644 --- a/doc/develop/devicetree/dt_qemu.rst +++ b/doc/develop/devicetree/dt_qemu.rst @@ -13,7 +13,7 @@ When `CONFIG_OF_BOARD` is enabled Obtaining the QEMU devicetree ----------------------------- -Where QEMU generates its own devicetree to pass to U-Boot tou can use +Where QEMU generates its own devicetree to pass to U-Boot you can use `-dtb u-boot.dtb` to force QEMU to use U-Boot's in-tree version. To obtain the devicetree that qemu generates, add `-machine dumpdtb=qemu.dtb`, @@ -38,7 +38,7 @@ to produce a text file. It drops the duplicate header on the qemu one. Then it joins them up and runs them through dtc to compile the output:: qemu-system-arm -machine virt -machine dumpdtb=qemu.dtb - cat <(dtc -I dtb qemu.dtb) <(dtc -I dtb u-boot.dtb |grep -v /dts-v1/) |dtc - -o merged.dtb + cat <(dtc -I dtb qemu.dtb) <(dtc -I dtb u-boot.dtb | grep -v /dts-v1/) | dtc - -o merged.dtb You can then run qemu with the merged devicetree, e.g.:: diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst index 2809d95985..80b50be90e 100644 --- a/doc/develop/release_cycle.rst +++ b/doc/develop/release_cycle.rst @@ -68,7 +68,7 @@ For the next scheduled release, release candidates were made on:: * U-Boot v2023.04-rc2 was released on Mon 13 February 2023. -.. * U-Boot v2023.04-rc3 was released on Mon 27 February 2023. +* U-Boot v2023.04-rc3 was released on Mon 27 February 2023. .. * U-Boot v2023.04-rc4 was released on Mon 13 March 2023. diff --git a/doc/usage/cmd/ebtupdate.rst b/doc/usage/cmd/ebtupdate.rst new file mode 100644 index 0000000000..d90474ccec --- /dev/null +++ b/doc/usage/cmd/ebtupdate.rst @@ -0,0 +1,69 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +ebtupdate command +================= + +Synopsis +-------- + +:: + + ebtupdate [<bct> [<ebt>] [<size>]] + +Description +----------- + +The "ebtupdate" command is used to self-update bootloader on Tegra 2 and Tegra 3 +production devices which were processed using re-cryption. + +The "ebtupdate" performs encryption of new bootloader and decryption, patching +and re-encryption of BCT "in situ". After BCT and bootloader can be written in +their respective places. + +bct + address of BCT block pre-loaded into RAM. + +ebt + address of the bootloader pre-loaded into RAM. + +size + size of the pre-loaded bootloader. + +Example +------- + +This is the boot log of a LG Optimus Vu: + +:: + + => mmc dev 0 1 + switch to partitions #1, OK + mmc0(part 1) is current device + => mmc read $kernel_addr_r 0 $boot_block_size + MMC read: dev # 0, block # 0, count 4096 ... 4096 blocks read: OK + => load mmc 0:1 $ramdisk_addr_r $bootloader_file + 684783 bytes read in 44 ms (14.8 MiB/s) + => size mmc 0:1 $bootloader_file + => ebtupdate $kernel_addr_r $ramdisk_addr_r $filesize + => mmc dev 0 1 + switch to partitions #1, OK + mmc0(part 1) is current device + => mmc write $kernel_addr_r 0 $boot_block_size + MMC write: dev # 0, block # 0, count 4096 ... 4096 blocks written: OK + => mmc dev 0 2 + switch to partitions #2, OK + mmc0(part 2) is current device + => mmc write $ramdisk_addr_r 0 $boot_block_size + MMC write: dev # 0, block # 0, count 4096 ... 4096 blocks written: OK + +Configuration +------------- + +The ebtupdate command is only available if CONFIG_CMD_EBTUPDATE=y and +only on Tegra 2 and Tegra 3 configurations. + +Return value +------------ + +The return value $? is set to 0 (true) if everything went successfully. If an +error occurs, the return value $? is set to 1 (false). diff --git a/doc/usage/index.rst b/doc/usage/index.rst index cde7dcb14a..840c20c934 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -41,6 +41,7 @@ Shell commands cmd/conitrace cmd/cyclic cmd/dm + cmd/ebtupdate cmd/echo cmd/eficonfig cmd/env |