diff options
Diffstat (limited to 'drivers/gpio/at91_gpio.c')
-rw-r--r-- | drivers/gpio/at91_gpio.c | 142 |
1 files changed, 97 insertions, 45 deletions
diff --git a/drivers/gpio/at91_gpio.c b/drivers/gpio/at91_gpio.c index 8e52e3dad0..2f9e44b620 100644 --- a/drivers/gpio/at91_gpio.c +++ b/drivers/gpio/at91_gpio.c @@ -59,11 +59,6 @@ int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup) { struct at91_port *at91_port = at91_pio_get_port(port); -#if defined(CPU_HAS_PIO3) - if (use_pullup) - at91_set_pio_pulldown(port, pin, 0); -#endif - if (at91_port && (pin < GPIO_PER_BANK)) at91_set_port_pullup(at91_port, pin, use_pullup); @@ -100,14 +95,7 @@ int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup) mask = 1 << pin; writel(mask, &at91_port->idr); at91_set_pio_pullup(port, pin, use_pullup); -#if defined(CPU_HAS_PIO3) - writel(readl(&at91_port->abcdsr1) & ~mask, - &at91_port->abcdsr1); - writel(readl(&at91_port->abcdsr2) & ~mask, - &at91_port->abcdsr2); -#else - writel(mask, &at91_port->asr); -#endif + writel(mask, &at91_port->mux.pio2.asr); writel(mask, &at91_port->pdr); } @@ -126,25 +114,62 @@ int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup) mask = 1 << pin; writel(mask, &at91_port->idr); at91_set_pio_pullup(port, pin, use_pullup); -#if defined(CPU_HAS_PIO3) - writel(readl(&at91_port->abcdsr1) | mask, - &at91_port->abcdsr1); - writel(readl(&at91_port->abcdsr2) & ~mask, - &at91_port->abcdsr2); -#else - writel(mask, &at91_port->bsr); -#endif + writel(mask, &at91_port->mux.pio2.bsr); + writel(mask, &at91_port->pdr); + } + + return 0; +} + +/* + * mux the pin to the "A" internal peripheral role. + */ +int at91_pio3_set_a_periph(unsigned port, unsigned pin, int use_pullup) +{ + struct at91_port *at91_port = at91_pio_get_port(port); + u32 mask; + + if (at91_port && (pin < GPIO_PER_BANK)) { + mask = 1 << pin; + writel(mask, &at91_port->idr); + at91_set_pio_pullup(port, pin, use_pullup); + writel(readl(&at91_port->mux.pio3.abcdsr1) & ~mask, + &at91_port->mux.pio3.abcdsr1); + writel(readl(&at91_port->mux.pio3.abcdsr2) & ~mask, + &at91_port->mux.pio3.abcdsr2); + writel(mask, &at91_port->pdr); } return 0; } -#if defined(CPU_HAS_PIO3) +/* + * mux the pin to the "B" internal peripheral role. + */ +int at91_pio3_set_b_periph(unsigned port, unsigned pin, int use_pullup) +{ + struct at91_port *at91_port = at91_pio_get_port(port); + u32 mask; + + if (at91_port && (pin < GPIO_PER_BANK)) { + mask = 1 << pin; + writel(mask, &at91_port->idr); + at91_set_pio_pullup(port, pin, use_pullup); + writel(readl(&at91_port->mux.pio3.abcdsr1) | mask, + &at91_port->mux.pio3.abcdsr1); + writel(readl(&at91_port->mux.pio3.abcdsr2) & ~mask, + &at91_port->mux.pio3.abcdsr2); + + writel(mask, &at91_port->pdr); + } + + return 0; +} /* * mux the pin to the "C" internal peripheral role. */ -int at91_set_c_periph(unsigned port, unsigned pin, int use_pullup) +int at91_pio3_set_c_periph(unsigned port, unsigned pin, int use_pullup) { struct at91_port *at91_port = at91_pio_get_port(port); u32 mask; @@ -153,10 +178,10 @@ int at91_set_c_periph(unsigned port, unsigned pin, int use_pullup) mask = 1 << pin; writel(mask, &at91_port->idr); at91_set_pio_pullup(port, pin, use_pullup); - writel(readl(&at91_port->abcdsr1) & ~mask, - &at91_port->abcdsr1); - writel(readl(&at91_port->abcdsr2) | mask, - &at91_port->abcdsr2); + writel(readl(&at91_port->mux.pio3.abcdsr1) & ~mask, + &at91_port->mux.pio3.abcdsr1); + writel(readl(&at91_port->mux.pio3.abcdsr2) | mask, + &at91_port->mux.pio3.abcdsr2); writel(mask, &at91_port->pdr); } @@ -166,7 +191,7 @@ int at91_set_c_periph(unsigned port, unsigned pin, int use_pullup) /* * mux the pin to the "D" internal peripheral role. */ -int at91_set_d_periph(unsigned port, unsigned pin, int use_pullup) +int at91_pio3_set_d_periph(unsigned port, unsigned pin, int use_pullup) { struct at91_port *at91_port = at91_pio_get_port(port); u32 mask; @@ -175,16 +200,15 @@ int at91_set_d_periph(unsigned port, unsigned pin, int use_pullup) mask = 1 << pin; writel(mask, &at91_port->idr); at91_set_pio_pullup(port, pin, use_pullup); - writel(readl(&at91_port->abcdsr1) | mask, - &at91_port->abcdsr1); - writel(readl(&at91_port->abcdsr2) | mask, - &at91_port->abcdsr2); + writel(readl(&at91_port->mux.pio3.abcdsr1) | mask, + &at91_port->mux.pio3.abcdsr1); + writel(readl(&at91_port->mux.pio3.abcdsr2) | mask, + &at91_port->mux.pio3.abcdsr2); writel(mask, &at91_port->pdr); } return 0; } -#endif #ifdef CONFIG_DM_GPIO static bool at91_get_port_output(struct at91_port *at91_port, int offset) @@ -263,10 +287,27 @@ int at91_set_pio_deglitch(unsigned port, unsigned pin, int is_on) if (at91_port && (pin < GPIO_PER_BANK)) { mask = 1 << pin; + if (is_on) + writel(mask, &at91_port->ifer); + else + writel(mask, &at91_port->ifdr); + } + + return 0; +} + +/* + * enable/disable the glitch filter. mostly used with IRQ handling. + */ +int at91_pio3_set_pio_deglitch(unsigned port, unsigned pin, int is_on) +{ + struct at91_port *at91_port = at91_pio_get_port(port); + u32 mask; + + if (at91_port && (pin < GPIO_PER_BANK)) { + mask = 1 << pin; if (is_on) { -#if defined(CPU_HAS_PIO3) - writel(mask, &at91_port->ifscdr); -#endif + writel(mask, &at91_port->mux.pio3.ifscdr); writel(mask, &at91_port->ifer); } else { writel(mask, &at91_port->ifdr); @@ -276,11 +317,10 @@ int at91_set_pio_deglitch(unsigned port, unsigned pin, int is_on) return 0; } -#if defined(CPU_HAS_PIO3) /* * enable/disable the debounce filter. */ -int at91_set_pio_debounce(unsigned port, unsigned pin, int is_on, int div) +int at91_pio3_set_pio_debounce(unsigned port, unsigned pin, int is_on, int div) { struct at91_port *at91_port = at91_pio_get_port(port); u32 mask; @@ -288,8 +328,8 @@ int at91_set_pio_debounce(unsigned port, unsigned pin, int is_on, int div) if (at91_port && (pin < GPIO_PER_BANK)) { mask = 1 << pin; if (is_on) { - writel(mask, &at91_port->ifscer); - writel(div & PIO_SCDR_DIV, &at91_port->scdr); + writel(mask, &at91_port->mux.pio3.ifscer); + writel(div & PIO_SCDR_DIV, &at91_port->mux.pio3.scdr); writel(mask, &at91_port->ifer); } else { writel(mask, &at91_port->ifdr); @@ -303,7 +343,7 @@ int at91_set_pio_debounce(unsigned port, unsigned pin, int is_on, int div) * enable/disable the pull-down. * If pull-up already enabled while calling the function, we disable it. */ -int at91_set_pio_pulldown(unsigned port, unsigned pin, int is_on) +int at91_pio3_set_pio_pulldown(unsigned port, unsigned pin, int is_on) { struct at91_port *at91_port = at91_pio_get_port(port); u32 mask; @@ -312,18 +352,31 @@ int at91_set_pio_pulldown(unsigned port, unsigned pin, int is_on) mask = 1 << pin; if (is_on) { at91_set_pio_pullup(port, pin, 0); - writel(mask, &at91_port->ppder); + writel(mask, &at91_port->mux.pio3.ppder); } else - writel(mask, &at91_port->ppddr); + writel(mask, &at91_port->mux.pio3.ppddr); } return 0; } +int at91_pio3_set_pio_pullup(unsigned port, unsigned pin, int use_pullup) +{ + struct at91_port *at91_port = at91_pio_get_port(port); + + if (use_pullup) + at91_pio3_set_pio_pulldown(port, pin, 0); + + if (at91_port && (pin < GPIO_PER_BANK)) + at91_set_port_pullup(at91_port, pin, use_pullup); + + return 0; +} + /* * disable Schmitt trigger */ -int at91_set_pio_disable_schmitt_trig(unsigned port, unsigned pin) +int at91_pio3_set_pio_disable_schmitt_trig(unsigned port, unsigned pin) { struct at91_port *at91_port = at91_pio_get_port(port); u32 mask; @@ -336,7 +389,6 @@ int at91_set_pio_disable_schmitt_trig(unsigned port, unsigned pin) return 0; } -#endif /* * enable/disable the multi-driver. This is only valid for output and |