summaryrefslogtreecommitdiff
path: root/drivers/qe/uccf.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/qe/uccf.h')
-rw-r--r--drivers/qe/uccf.h90
1 files changed, 46 insertions, 44 deletions
diff --git a/drivers/qe/uccf.h b/drivers/qe/uccf.h
index 4098c66317..99f8458edf 100644
--- a/drivers/qe/uccf.h
+++ b/drivers/qe/uccf.h
@@ -13,25 +13,23 @@
#include "linux/immap_qe.h"
#include <fsl_qe.h>
-/* Fast or Giga ethernet
-*/
-typedef enum enet_type {
+/* Fast or Giga ethernet */
+enum enet_type {
FAST_ETH,
GIGA_ETH,
-} enet_type_e;
+};
-/* General UCC Extended Mode Register
-*/
+/* General UCC Extended Mode Register */
#define UCC_GUEMR_MODE_MASK_RX 0x02
#define UCC_GUEMR_MODE_MASK_TX 0x01
#define UCC_GUEMR_MODE_FAST_RX 0x02
#define UCC_GUEMR_MODE_FAST_TX 0x01
#define UCC_GUEMR_MODE_SLOW_RX 0x00
#define UCC_GUEMR_MODE_SLOW_TX 0x00
-#define UCC_GUEMR_SET_RESERVED3 0x10 /* Bit 3 must be set 1 */
+/* Bit 3 must be set 1 */
+#define UCC_GUEMR_SET_RESERVED3 0x10
-/* General UCC FAST Mode Register
-*/
+/* General UCC FAST Mode Register */
#define UCC_FAST_GUMR_TCI 0x20000000
#define UCC_FAST_GUMR_TRX 0x10000000
#define UCC_FAST_GUMR_TTX 0x08000000
@@ -46,8 +44,7 @@ typedef enum enet_type {
#define UCC_FAST_GUMR_ENR 0x00000020
#define UCC_FAST_GUMR_ENT 0x00000010
-/* GUMR [MODE] bit maps
-*/
+/* GUMR [MODE] bit maps */
#define UCC_FAST_GUMR_HDLC 0x00000000
#define UCC_FAST_GUMR_QMC 0x00000002
#define UCC_FAST_GUMR_UART 0x00000004
@@ -55,50 +52,54 @@ typedef enum enet_type {
#define UCC_FAST_GUMR_ATM 0x0000000a
#define UCC_FAST_GUMR_ETH 0x0000000c
-/* Transmit On Demand (UTORD)
-*/
+/* Transmit On Demand (UTORD) */
#define UCC_SLOW_TOD 0x8000
#define UCC_FAST_TOD 0x8000
-/* Fast Ethernet (10/100 Mbps)
-*/
-#define UCC_GETH_URFS_INIT 512 /* Rx virtual FIFO size */
-#define UCC_GETH_URFET_INIT 256 /* 1/2 urfs */
-#define UCC_GETH_URFSET_INIT 384 /* 3/4 urfs */
-#define UCC_GETH_UTFS_INIT 512 /* Tx virtual FIFO size */
-#define UCC_GETH_UTFET_INIT 256 /* 1/2 utfs */
+/* Fast Ethernet (10/100 Mbps) */
+/* Rx virtual FIFO size */
+#define UCC_GETH_URFS_INIT 512
+/* 1/2 urfs */
+#define UCC_GETH_URFET_INIT 256
+/* 3/4 urfs */
+#define UCC_GETH_URFSET_INIT 384
+/* Tx virtual FIFO size */
+#define UCC_GETH_UTFS_INIT 512
+/* 1/2 utfs */
+#define UCC_GETH_UTFET_INIT 256
#define UCC_GETH_UTFTT_INIT 128
-/* Gigabit Ethernet (1000 Mbps)
-*/
-#define UCC_GETH_URFS_GIGA_INIT 4096/*2048*/ /* Rx virtual FIFO size */
-#define UCC_GETH_URFET_GIGA_INIT 2048/*1024*/ /* 1/2 urfs */
-#define UCC_GETH_URFSET_GIGA_INIT 3072/*1536*/ /* 3/4 urfs */
-#define UCC_GETH_UTFS_GIGA_INIT 8192/*2048*/ /* Tx virtual FIFO size */
-#define UCC_GETH_UTFET_GIGA_INIT 4096/*1024*/ /* 1/2 utfs */
-#define UCC_GETH_UTFTT_GIGA_INIT 0x400/*0x40*/ /* */
+/* Gigabit Ethernet (1000 Mbps) */
+/* Rx virtual FIFO size */
+#define UCC_GETH_URFS_GIGA_INIT 4096/*2048*/
+/* 1/2 urfs */
+#define UCC_GETH_URFET_GIGA_INIT 2048/*1024*/
+/* 3/4 urfs */
+#define UCC_GETH_URFSET_GIGA_INIT 3072/*1536*/
+/* Tx virtual FIFO size */
+#define UCC_GETH_UTFS_GIGA_INIT 8192/*2048*/
+/* 1/2 utfs */
+#define UCC_GETH_UTFET_GIGA_INIT 4096/*1024*/
+#define UCC_GETH_UTFTT_GIGA_INIT 0x400/*0x40*/
-/* UCC fast alignment
-*/
+/* UCC fast alignment */
#define UCC_FAST_RX_ALIGN 4
#define UCC_FAST_MRBLR_ALIGNMENT 4
#define UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT 8
-/* Sizes
-*/
+/* Sizes */
#define UCC_FAST_RX_VIRTUAL_FIFO_SIZE_PAD 8
-/* UCC fast structure.
-*/
-typedef struct ucc_fast_info {
+/* UCC fast structure. */
+struct ucc_fast_inf {
int ucc_num;
qe_clock_e rx_clock;
qe_clock_e tx_clock;
- enet_type_e eth_type;
-} ucc_fast_info_t;
+ enum enet_type eth_type;
+};
-typedef struct ucc_fast_private {
- ucc_fast_info_t *uf_info;
+struct ucc_fast_priv {
+ struct ucc_fast_inf *uf_info;
ucc_fast_t *uf_regs; /* a pointer to memory map of UCC regs */
u32 *p_ucce; /* a pointer to the event register */
u32 *p_uccm; /* a pointer to the mask register */
@@ -106,12 +107,13 @@ typedef struct ucc_fast_private {
int enabled_rx; /* whether UCC is enabled for Rx (ENR) */
u32 ucc_fast_tx_virtual_fifo_base_offset;
u32 ucc_fast_rx_virtual_fifo_base_offset;
-} ucc_fast_private_t;
+};
-void ucc_fast_transmit_on_demand(ucc_fast_private_t *uccf);
+void ucc_fast_transmit_on_demand(struct ucc_fast_priv *uccf);
u32 ucc_fast_get_qe_cr_subblock(int ucc_num);
-void ucc_fast_enable(ucc_fast_private_t *uccf, comm_dir_e mode);
-void ucc_fast_disable(ucc_fast_private_t *uccf, comm_dir_e mode);
-int ucc_fast_init(ucc_fast_info_t *uf_info, ucc_fast_private_t **uccf_ret);
+void ucc_fast_enable(struct ucc_fast_priv *uccf, comm_dir_e mode);
+void ucc_fast_disable(struct ucc_fast_priv *uccf, comm_dir_e mode);
+int ucc_fast_init(struct ucc_fast_inf *uf_info,
+ struct ucc_fast_priv **uccf_ret);
#endif /* __UCCF_H__ */