diff options
Diffstat (limited to 'drivers/ram/rockchip/sdram-rv1126-ddr3-detect-328.inc')
| -rw-r--r-- | drivers/ram/rockchip/sdram-rv1126-ddr3-detect-328.inc | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/drivers/ram/rockchip/sdram-rv1126-ddr3-detect-328.inc b/drivers/ram/rockchip/sdram-rv1126-ddr3-detect-328.inc new file mode 100644 index 0000000000..eef61ab500 --- /dev/null +++ b/drivers/ram/rockchip/sdram-rv1126-ddr3-detect-328.inc @@ -0,0 +1,72 @@ +{ + { + { + .rank = 0x1, + .col = 0xC, + .bk = 0x3, + .bw = 0x0, + .dbw = 0x0, + .row_3_4 = 0x0, + .cs0_row = 0x10, + .cs1_row = 0x10, + .cs0_high16bit_row = 0x10, + .cs1_high16bit_row = 0x10, + .ddrconfig = 0 + }, + { + {0x270a0509}, + {0x08020401}, + {0x00000002}, + {0x00001111}, + {0x0000000c}, + {0x00000000}, + 0x000000ff + } + }, + { + .ddr_freq = 328, /* clock rate(MHz) */ + .dramtype = DDR3, + .num_channels = 1, + .stride = 0, + .odt = 0 + }, + { + { + {0x00000000, 0x43042001}, /* MSTR */ + {0x00000064, 0x0027003a}, /* RFSHTMG */ + {0x000000d0, 0x00020052}, /* INIT0 */ + {0x000000d4, 0x00220000}, /* INIT1 */ + {0x000000d8, 0x00000100}, /* INIT2 */ + {0x000000dc, 0x03100000}, /* INIT3 */ + {0x000000e0, 0x00000000}, /* INIT4 */ + {0x000000e4, 0x00090000}, /* INIT5 */ + {0x000000f4, 0x000f011f}, /* RANKCTL */ + {0x00000100, 0x07090b06}, /* DRAMTMG0 */ + {0x00000104, 0x00050209}, /* DRAMTMG1 */ + {0x00000108, 0x03030307}, /* DRAMTMG2 */ + {0x0000010c, 0x00202006}, /* DRAMTMG3 */ + {0x00000110, 0x03020203}, /* DRAMTMG4 */ + {0x00000114, 0x03030202}, /* DRAMTMG5 */ + {0x00000120, 0x00000903}, /* DRAMTMG8 */ + {0x00000180, 0x00800020}, /* ZQCTL0 */ + {0x00000184, 0x00000000}, /* ZQCTL1 */ + {0x00000190, 0x07010001}, /* DFITMG0 */ + {0x00000198, 0x07000101}, /* DFILPCFG0 */ + {0x000001a0, 0xc0400003}, /* DFIUPD0 */ + {0x00000240, 0x06000600}, /* ODTCFG */ + {0x00000244, 0x00000201}, /* ODTMAP */ + {0x00000250, 0x00001f00}, /* SCHED */ + {0x00000490, 0x00000001}, /* PCTRL_0 */ + {0xffffffff, 0xffffffff} + } + }, + { + { + {0x00000004, 0x0000008a}, /* PHYREG01 */ + {0x00000014, 0x00000005}, /* PHYREG05 */ + {0x00000018, 0x00000000}, /* PHYREG06 */ + {0x0000001c, 0x00000005}, /* PHYREG07 */ + {0xffffffff, 0xffffffff} + } + } +}, |