diff options
Diffstat (limited to 'drivers')
26 files changed, 1956 insertions, 229 deletions
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index ff60fc5c45..96969b9e30 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -101,6 +101,7 @@ config CLK_STM32MP1 source "drivers/clk/at91/Kconfig" source "drivers/clk/exynos/Kconfig" source "drivers/clk/imx/Kconfig" +source "drivers/clk/meson/Kconfig" source "drivers/clk/mvebu/Kconfig" source "drivers/clk/owl/Kconfig" source "drivers/clk/renesas/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 1d9d725cae..719b9b8e02 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -12,7 +12,7 @@ obj-y += imx/ obj-y += tegra/ obj-$(CONFIG_ARCH_ASPEED) += aspeed/ obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/ -obj-$(CONFIG_ARCH_MESON) += clk_meson.o clk_meson_axg.o +obj-$(CONFIG_ARCH_MESON) += meson/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_ARCH_SOCFPGA) += altera/ obj-$(CONFIG_CLK_AT91) += at91/ diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig new file mode 100644 index 0000000000..994b44ad7a --- /dev/null +++ b/drivers/clk/meson/Kconfig @@ -0,0 +1,23 @@ +config CLK_MESON_GX + bool "Enable clock support for Amlogic GX" + depends on CLK && ARCH_MESON + default MESON_GX + help + Enable clock support for the Amlogic GX SoC family, such as + the S905, S905X/D and S912. + +config CLK_MESON_AXG + bool "Enable clock support for Amlogic AXG" + depends on CLK && ARCH_MESON + default MESON_AXG + help + Enable clock support for the Amlogic AXG SoC family, such as + the A113X/D + +config CLK_MESON_G12A + bool "Enable clock support for Amlogic G12A" + depends on CLK && ARCH_MESON + default MESON_G12A + help + Enable clock support for the Amlogic G12A SoC family, such as + the S905X/D2 diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile new file mode 100644 index 0000000000..c873d6976f --- /dev/null +++ b/drivers/clk/meson/Makefile @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (c) 2019 Baylibre, SAS +# Jerome Brunet <jbrunet@baylibre.com> + +obj-$(CONFIG_CLK_MESON_GX) += gxbb.o +obj-$(CONFIG_CLK_MESON_AXG) += axg.o +obj-$(CONFIG_CLK_MESON_G12A) += g12a.o + diff --git a/drivers/clk/clk_meson_axg.c b/drivers/clk/meson/axg.c index 32cbf752ae..32cbf752ae 100644 --- a/drivers/clk/clk_meson_axg.c +++ b/drivers/clk/meson/axg.c diff --git a/drivers/clk/clk_meson.h b/drivers/clk/meson/clk_meson.h index 7adc55a980..7adc55a980 100644 --- a/drivers/clk/clk_meson.h +++ b/drivers/clk/meson/clk_meson.h diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c new file mode 100644 index 0000000000..fedc9eb7dd --- /dev/null +++ b/drivers/clk/meson/g12a.c @@ -0,0 +1,315 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2018 - Beniamino Galvani <b.galvani@gmail.com> + * (C) Copyright 2018 - BayLibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +#include <common.h> +#include <asm/arch/clock-g12a.h> +#include <asm/io.h> +#include <clk-uclass.h> +#include <dm.h> +#include <regmap.h> +#include <syscon.h> +#include <div64.h> +#include <dt-bindings/clock/g12a-clkc.h> +#include "clk_meson.h" + +#define XTAL_RATE 24000000 + +struct meson_clk { + struct regmap *map; +}; + +static ulong meson_clk_get_rate_by_id(struct clk *clk, unsigned long id); + +#define NUM_CLKS 178 + +static struct meson_gate gates[NUM_CLKS] = { + /* Everything Else (EE) domain gates */ + MESON_GATE(CLKID_SPICC0, HHI_GCLK_MPEG0, 8), + MESON_GATE(CLKID_I2C, HHI_GCLK_MPEG0, 9), + MESON_GATE(CLKID_UART0, HHI_GCLK_MPEG0, 13), + MESON_GATE(CLKID_SPICC1, HHI_GCLK_MPEG0, 14), + MESON_GATE(CLKID_SD_EMMC_B, HHI_GCLK_MPEG0, 25), + MESON_GATE(CLKID_SD_EMMC_C, HHI_GCLK_MPEG0, 26), + MESON_GATE(CLKID_ETH, HHI_GCLK_MPEG1, 3), + MESON_GATE(CLKID_UART1, HHI_GCLK_MPEG1, 16), + + /* Peripheral Gates */ + MESON_GATE(CLKID_SD_EMMC_B_CLK0, HHI_SD_EMMC_CLK_CNTL, 23), + MESON_GATE(CLKID_SD_EMMC_C_CLK0, HHI_NAND_CLK_CNTL, 7), +}; + +static int meson_set_gate(struct clk *clk, bool on) +{ + struct meson_clk *priv = dev_get_priv(clk->dev); + struct meson_gate *gate; + + if (clk->id >= ARRAY_SIZE(gates)) + return -ENOENT; + + gate = &gates[clk->id]; + + if (gate->reg == 0) + return 0; + + regmap_update_bits(priv->map, gate->reg, + BIT(gate->bit), on ? BIT(gate->bit) : 0); + + return 0; +} + +static int meson_clk_enable(struct clk *clk) +{ + return meson_set_gate(clk, true); +} + +static int meson_clk_disable(struct clk *clk) +{ + return meson_set_gate(clk, false); +} + +static unsigned long meson_clk81_get_rate(struct clk *clk) +{ + struct meson_clk *priv = dev_get_priv(clk->dev); + unsigned long parent_rate; + uint reg; + int parents[] = { + -1, + -1, + CLKID_FCLK_DIV7, + CLKID_MPLL1, + CLKID_MPLL2, + CLKID_FCLK_DIV4, + CLKID_FCLK_DIV3, + CLKID_FCLK_DIV5 + }; + + /* mux */ + regmap_read(priv->map, HHI_MPEG_CLK_CNTL, ®); + reg = (reg >> 12) & 7; + + switch (reg) { + case 0: + parent_rate = XTAL_RATE; + break; + case 1: + return -ENOENT; + default: + parent_rate = meson_clk_get_rate_by_id(clk, parents[reg]); + } + + /* divider */ + regmap_read(priv->map, HHI_MPEG_CLK_CNTL, ®); + reg = reg & ((1 << 7) - 1); + + return parent_rate / reg; +} + +static long mpll_rate_from_params(unsigned long parent_rate, + unsigned long sdm, + unsigned long n2) +{ + unsigned long divisor = (SDM_DEN * n2) + sdm; + + if (n2 < N2_MIN) + return -EINVAL; + + return DIV_ROUND_UP_ULL((u64)parent_rate * SDM_DEN, divisor); +} + +static struct parm meson_mpll0_parm[2] = { + {HHI_MPLL_CNTL1, 0, 14}, /* psdm */ + {HHI_MPLL_CNTL1, 20, 9}, /* pn2 */ +}; + +static struct parm meson_mpll1_parm[2] = { + {HHI_MPLL_CNTL3, 0, 14}, /* psdm */ + {HHI_MPLL_CNTL3, 20, 9}, /* pn2 */ +}; + +static struct parm meson_mpll2_parm[2] = { + {HHI_MPLL_CNTL5, 0, 14}, /* psdm */ + {HHI_MPLL_CNTL5, 20, 9}, /* pn2 */ +}; + +/* + * MultiPhase Locked Loops are outputs from a PLL with additional frequency + * scaling capabilities. MPLL rates are calculated as: + * + * f(N2_integer, SDM_IN ) = 2.0G/(N2_integer + SDM_IN/16384) + */ +static ulong meson_mpll_get_rate(struct clk *clk, unsigned long id) +{ + struct meson_clk *priv = dev_get_priv(clk->dev); + struct parm *psdm, *pn2; + unsigned long sdm, n2; + unsigned long parent_rate; + uint reg; + + switch (id) { + case CLKID_MPLL0: + psdm = &meson_mpll0_parm[0]; + pn2 = &meson_mpll0_parm[1]; + break; + case CLKID_MPLL1: + psdm = &meson_mpll1_parm[0]; + pn2 = &meson_mpll1_parm[1]; + break; + case CLKID_MPLL2: + psdm = &meson_mpll2_parm[0]; + pn2 = &meson_mpll2_parm[1]; + break; + default: + return -ENOENT; + } + + parent_rate = meson_clk_get_rate_by_id(clk, CLKID_FIXED_PLL); + if (IS_ERR_VALUE(parent_rate)) + return parent_rate; + + regmap_read(priv->map, psdm->reg_off, ®); + sdm = PARM_GET(psdm->width, psdm->shift, reg); + + regmap_read(priv->map, pn2->reg_off, ®); + n2 = PARM_GET(pn2->width, pn2->shift, reg); + + return mpll_rate_from_params(parent_rate, sdm, n2); +} + +static struct parm meson_fixed_pll_parm[3] = { + {HHI_FIX_PLL_CNTL0, 0, 8}, /* pm */ + {HHI_FIX_PLL_CNTL0, 10, 5}, /* pn */ + {HHI_FIX_PLL_CNTL0, 16, 2}, /* pod */ +}; + +static struct parm meson_sys_pll_parm[3] = { + {HHI_SYS_PLL_CNTL0, 0, 8}, /* pm */ + {HHI_SYS_PLL_CNTL0, 10, 5}, /* pn */ + {HHI_SYS_PLL_CNTL0, 16, 2}, /* pod */ +}; + +static ulong meson_pll_get_rate(struct clk *clk, unsigned long id) +{ + struct meson_clk *priv = dev_get_priv(clk->dev); + struct parm *pm, *pn, *pod; + unsigned long parent_rate_mhz = XTAL_RATE / 1000000; + u16 n, m, od; + uint reg; + + /* + * FIXME: Between the unit conversion and the missing frac, we know + * rate will be slightly off ... + */ + + switch (id) { + case CLKID_FIXED_PLL: + pm = &meson_fixed_pll_parm[0]; + pn = &meson_fixed_pll_parm[1]; + pod = &meson_fixed_pll_parm[2]; + break; + case CLKID_SYS_PLL: + pm = &meson_sys_pll_parm[0]; + pn = &meson_sys_pll_parm[1]; + pod = &meson_sys_pll_parm[2]; + break; + default: + return -ENOENT; + } + + regmap_read(priv->map, pn->reg_off, ®); + n = PARM_GET(pn->width, pn->shift, reg); + + regmap_read(priv->map, pm->reg_off, ®); + m = PARM_GET(pm->width, pm->shift, reg); + + regmap_read(priv->map, pod->reg_off, ®); + od = PARM_GET(pod->width, pod->shift, reg); + + return ((parent_rate_mhz * m / n) >> od) * 1000000; +} + +static ulong meson_clk_get_rate_by_id(struct clk *clk, unsigned long id) +{ + ulong rate; + + switch (id) { + case CLKID_FIXED_PLL: + case CLKID_SYS_PLL: + rate = meson_pll_get_rate(clk, id); + break; + case CLKID_FCLK_DIV2: + rate = meson_pll_get_rate(clk, CLKID_FIXED_PLL) / 2; + break; + case CLKID_FCLK_DIV3: + rate = meson_pll_get_rate(clk, CLKID_FIXED_PLL) / 3; + break; + case CLKID_FCLK_DIV4: + rate = meson_pll_get_rate(clk, CLKID_FIXED_PLL) / 4; + break; + case CLKID_FCLK_DIV5: + rate = meson_pll_get_rate(clk, CLKID_FIXED_PLL) / 5; + break; + case CLKID_FCLK_DIV7: + rate = meson_pll_get_rate(clk, CLKID_FIXED_PLL) / 7; + break; + case CLKID_MPLL0: + case CLKID_MPLL1: + case CLKID_MPLL2: + rate = meson_mpll_get_rate(clk, id); + break; + case CLKID_CLK81: + rate = meson_clk81_get_rate(clk); + break; + default: + if (gates[id].reg != 0) { + /* a clock gate */ + rate = meson_clk81_get_rate(clk); + break; + } + return -ENOENT; + } + + debug("clock %lu has rate %lu\n", id, rate); + return rate; +} + +static ulong meson_clk_get_rate(struct clk *clk) +{ + return meson_clk_get_rate_by_id(clk, clk->id); +} + +static int meson_clk_probe(struct udevice *dev) +{ + struct meson_clk *priv = dev_get_priv(dev); + + priv->map = syscon_node_to_regmap(dev_get_parent(dev)->node); + if (IS_ERR(priv->map)) + return PTR_ERR(priv->map); + + debug("meson-clk-g12a: probed\n"); + + return 0; +} + +static struct clk_ops meson_clk_ops = { + .disable = meson_clk_disable, + .enable = meson_clk_enable, + .get_rate = meson_clk_get_rate, +}; + +static const struct udevice_id meson_clk_ids[] = { + { .compatible = "amlogic,g12a-clkc" }, + { } +}; + +U_BOOT_DRIVER(meson_clk_g12a) = { + .name = "meson_clk_g12a", + .id = UCLASS_CLK, + .of_match = meson_clk_ids, + .priv_auto_alloc_size = sizeof(struct meson_clk), + .ops = &meson_clk_ops, + .probe = meson_clk_probe, +}; diff --git a/drivers/clk/clk_meson.c b/drivers/clk/meson/gxbb.c index 2cb53fb92d..2cb53fb92d 100644 --- a/drivers/clk/clk_meson.c +++ b/drivers/clk/meson/gxbb.c diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index ddf2fb3fb8..2d195ae35e 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -225,6 +225,15 @@ config SPL_OF_TRANSLATE used for the address translation. This function is faster and smaller in size than fdt_translate_address(). +config TRANSLATION_OFFSET + bool "Platforms specific translation offset" + depends on DM && OF_CONTROL + help + Some platforms need a special address translation. Those + platforms (e.g. mvebu in SPL) can configure a translation + offset by enabling this option and setting the translation_offset + variable in the GD in their platform- / board-specific code. + config OF_ISA_BUS bool depends on OF_TRANSLATE diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c index e113f1dd39..c2873861da 100644 --- a/drivers/core/fdtaddr.c +++ b/drivers/core/fdtaddr.c @@ -74,13 +74,16 @@ fdt_addr_t devfdt_get_addr_index(struct udevice *dev, int index) } } +#if defined(CONFIG_TRANSLATION_OFFSET) /* * Some platforms need a special address translation. Those * platforms (e.g. mvebu in SPL) can configure a translation - * offset in the DM by calling dm_set_translation_offset() that - * will get added to all addresses returned by devfdt_get_addr(). + * offset by setting this value in the GD and enaling this + * feature via CONFIG_TRANSLATION_OFFSET. This value will + * get added to all addresses returned by devfdt_get_addr(). */ - addr += dm_get_translation_offset(); + addr += gd->translation_offset; +#endif return addr; #else diff --git a/drivers/core/root.c b/drivers/core/root.c index e6ec7faf37..8fa096648e 100644 --- a/drivers/core/root.c +++ b/drivers/core/root.c @@ -25,10 +25,6 @@ DECLARE_GLOBAL_DATA_PTR; -struct root_priv { - fdt_addr_t translation_offset; /* optional translation offset */ -}; - static const struct driver_info root_info = { .name = "root_driver", }; @@ -52,22 +48,6 @@ void dm_fixup_for_gd_move(struct global_data *new_gd) } } -fdt_addr_t dm_get_translation_offset(void) -{ - struct udevice *root = dm_root(); - struct root_priv *priv = dev_get_priv(root); - - return priv->translation_offset; -} - -void dm_set_translation_offset(fdt_addr_t offs) -{ - struct udevice *root = dm_root(); - struct root_priv *priv = dev_get_priv(root); - - priv->translation_offset = offs; -} - #if defined(CONFIG_NEEDS_MANUAL_RELOC) void fix_drivers(void) { @@ -420,7 +400,6 @@ int dm_init_and_scan(bool pre_reloc_only) U_BOOT_DRIVER(root_driver) = { .name = "root_driver", .id = UCLASS_ROOT, - .priv_auto_alloc_size = sizeof(struct root_priv), }; /* This is the root uclass */ diff --git a/drivers/core/simple-bus.c b/drivers/core/simple-bus.c index e16d8a9ff4..7fc23ef82d 100644 --- a/drivers/core/simple-bus.c +++ b/drivers/core/simple-bus.c @@ -60,4 +60,5 @@ U_BOOT_DRIVER(simple_bus_drv) = { .name = "generic_simple_bus", .id = UCLASS_SIMPLE_BUS, .of_match = generic_simple_bus_ids, + .flags = DM_FLAG_PRE_RELOC, }; diff --git a/drivers/i2c/meson_i2c.c b/drivers/i2c/meson_i2c.c index 7d06d95cf3..ee59bac123 100644 --- a/drivers/i2c/meson_i2c.c +++ b/drivers/i2c/meson_i2c.c @@ -41,7 +41,12 @@ struct i2c_regs { u32 tok_rdata1; }; +struct meson_i2c_data { + unsigned char div_factor; +}; + struct meson_i2c { + const struct meson_i2c_data *data; struct clk clk; struct i2c_regs *regs; struct i2c_msg *msg; /* Current I2C message */ @@ -229,7 +234,7 @@ static int meson_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) if (IS_ERR_VALUE(clk_rate)) return -EINVAL; - div = DIV_ROUND_UP(clk_rate, speed * 4); + div = DIV_ROUND_UP(clk_rate, speed * i2c->data->div_factor); /* clock divider has 12 bits */ if (div >= (1 << 12)) { @@ -253,6 +258,8 @@ static int meson_i2c_probe(struct udevice *bus) struct meson_i2c *i2c = dev_get_priv(bus); int ret; + i2c->data = (const struct meson_i2c_data *)dev_get_driver_data(bus); + ret = clk_get_by_index(bus, 0, &i2c->clk); if (ret < 0) return ret; @@ -272,11 +279,24 @@ static const struct dm_i2c_ops meson_i2c_ops = { .set_bus_speed = meson_i2c_set_bus_speed, }; +static const struct meson_i2c_data i2c_meson6_data = { + .div_factor = 4, +}; + +static const struct meson_i2c_data i2c_gxbb_data = { + .div_factor = 4, +}; + +static const struct meson_i2c_data i2c_axg_data = { + .div_factor = 3, +}; + static const struct udevice_id meson_i2c_ids[] = { - { .compatible = "amlogic,meson6-i2c" }, - { .compatible = "amlogic,meson-gx-i2c" }, - { .compatible = "amlogic,meson-gxbb-i2c" }, - { } + {.compatible = "amlogic,meson6-i2c", .data = (ulong)&i2c_meson6_data}, + {.compatible = "amlogic,meson-gx-i2c", .data = (ulong)&i2c_gxbb_data}, + {.compatible = "amlogic,meson-gxbb-i2c", .data = (ulong)&i2c_gxbb_data}, + {.compatible = "amlogic,meson-axg-i2c", .data = (ulong)&i2c_axg_data}, + {} }; U_BOOT_DRIVER(i2c_meson) = { diff --git a/drivers/mmc/arm_pl180_mmci.c b/drivers/mmc/arm_pl180_mmci.c index f71d79ecd6..ea8eb0d509 100644 --- a/drivers/mmc/arm_pl180_mmci.c +++ b/drivers/mmc/arm_pl180_mmci.c @@ -422,6 +422,7 @@ static int arm_pl180_mmc_probe(struct udevice *dev) struct mmc_config *cfg = &pdata->cfg; struct clk clk; u32 bus_width; + u32 periphid; int ret; ret = clk_get_by_index(dev, 0, &clk); @@ -439,7 +440,15 @@ static int arm_pl180_mmc_probe(struct udevice *dev) host->clkdiv_init = SDI_CLKCR_CLKDIV_INIT_V1 | SDI_CLKCR_CLKEN | SDI_CLKCR_HWFC_EN; host->clock_in = clk_get_rate(&clk); - host->version2 = dev_get_driver_data(dev); + + periphid = dev_read_u32_default(dev, "arm,primecell-periphid", 0); + switch (periphid) { + case STM32_MMCI_ID: /* stm32 variant */ + host->version2 = false; + break; + default: + host->version2 = true; + } cfg->name = dev->name; cfg->voltages = VOLTAGE_WINDOW_SD; @@ -526,7 +535,8 @@ static int arm_pl180_mmc_ofdata_to_platdata(struct udevice *dev) } static const struct udevice_id arm_pl180_mmc_match[] = { - { .compatible = "st,stm32f4xx-sdio", .data = VERSION1 }, + { .compatible = "arm,pl180" }, + { .compatible = "arm,primecell" }, { /* sentinel */ } }; diff --git a/drivers/mmc/arm_pl180_mmci.h b/drivers/mmc/arm_pl180_mmci.h index 36487be288..61ee96a112 100644 --- a/drivers/mmc/arm_pl180_mmci.h +++ b/drivers/mmc/arm_pl180_mmci.h @@ -141,8 +141,7 @@ #define SDI_FIFO_BURST_SIZE 8 -#define VERSION1 false -#define VERSION2 true +#define STM32_MMCI_ID 0x00880180 struct sdi_registers { u32 power; /* 0x00*/ diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c index a36612dd93..ed31ca126e 100644 --- a/drivers/mmc/stm32_sdmmc2.c +++ b/drivers/mmc/stm32_sdmmc2.c @@ -190,6 +190,7 @@ struct stm32_sdmmc2_ctx { #define SDMMC_IDMACTRL_IDMAEN BIT(0) #define SDMMC_CMD_TIMEOUT 0xFFFFFFFF +#define SDMMC_BUSYD0END_TIMEOUT_US 1000000 static void stm32_sdmmc2_start_data(struct stm32_sdmmc2_priv *priv, struct mmc_data *data, @@ -209,9 +210,6 @@ static void stm32_sdmmc2_start_data(struct stm32_sdmmc2_priv *priv, idmabase0 = (u32)data->src; } - /* Set the SDMMC Data TimeOut value */ - writel(SDMMC_CMD_TIMEOUT, priv->base + SDMMC_DTIMER); - /* Set the SDMMC DataLength value */ writel(ctx->data_length, priv->base + SDMMC_DLEN); @@ -236,8 +234,11 @@ static void stm32_sdmmc2_start_data(struct stm32_sdmmc2_priv *priv, } static void stm32_sdmmc2_start_cmd(struct stm32_sdmmc2_priv *priv, - struct mmc_cmd *cmd, u32 cmd_param) + struct mmc_cmd *cmd, u32 cmd_param, + struct stm32_sdmmc2_ctx *ctx) { + u32 timeout = 0; + if (readl(priv->base + SDMMC_CMD) & SDMMC_CMD_CPSMEN) writel(0, priv->base + SDMMC_CMD); @@ -251,6 +252,26 @@ static void stm32_sdmmc2_start_cmd(struct stm32_sdmmc2_priv *priv, cmd_param |= SDMMC_CMD_WAITRESP_1; } + /* + * SDMMC_DTIME must be set in two case: + * - on data transfert. + * - on busy request. + * If not done or too short, the dtimeout flag occurs and DPSM stays + * enabled/busy and waits for abort (stop transmission cmd). + * Next data command is not possible whereas DPSM is activated. + */ + if (ctx->data_length) { + timeout = SDMMC_CMD_TIMEOUT; + } else { + writel(0, priv->base + SDMMC_DCTRL); + + if (cmd->resp_type & MMC_RSP_BUSY) + timeout = SDMMC_CMD_TIMEOUT; + } + + /* Set the SDMMC Data TimeOut value */ + writel(timeout, priv->base + SDMMC_DTIMER); + /* Clear flags */ writel(SDMMC_ICR_STATIC_FLAGS, priv->base + SDMMC_ICR); @@ -309,6 +330,31 @@ static int stm32_sdmmc2_end_cmd(struct stm32_sdmmc2_priv *priv, cmd->response[2] = readl(priv->base + SDMMC_RESP3); cmd->response[3] = readl(priv->base + SDMMC_RESP4); } + + /* Wait for BUSYD0END flag if busy status is detected */ + if (cmd->resp_type & MMC_RSP_BUSY && + status & SDMMC_STA_BUSYD0) { + mask = SDMMC_STA_DTIMEOUT | SDMMC_STA_BUSYD0END; + + /* Polling status register */ + ret = readl_poll_timeout(priv->base + SDMMC_STA, + status, status & mask, + SDMMC_BUSYD0END_TIMEOUT_US); + + if (ret < 0) { + debug("%s: timeout reading SDMMC_STA\n", + __func__); + ctx->dpsm_abort = true; + return ret; + } + + if (status & SDMMC_STA_DTIMEOUT) { + debug("%s: error SDMMC_STA_DTIMEOUT (0x%x)\n", + __func__, status); + ctx->dpsm_abort = true; + return -ETIMEDOUT; + } + } } return 0; @@ -395,7 +441,7 @@ retry_cmd: stm32_sdmmc2_start_data(priv, data, &ctx); } - stm32_sdmmc2_start_cmd(priv, cmd, cmdat); + stm32_sdmmc2_start_cmd(priv, cmd, cmdat, &ctx); debug("%s: send cmd %d data: 0x%x @ 0x%x\n", __func__, cmd->cmdidx, @@ -425,7 +471,10 @@ retry_cmd: debug("%s: send STOP command to abort dpsm treatments\n", __func__); - stm32_sdmmc2_start_cmd(priv, &stop_cmd, SDMMC_CMD_CMDSTOP); + ctx.data_length = 0; + + stm32_sdmmc2_start_cmd(priv, &stop_cmd, + SDMMC_CMD_CMDSTOP, &ctx); stm32_sdmmc2_end_cmd(priv, &stop_cmd, &ctx); writel(SDMMC_ICR_STATIC_FLAGS, priv->base + SDMMC_ICR); @@ -585,11 +634,11 @@ static int stm32_sdmmc2_probe(struct udevice *dev) if (priv->base == FDT_ADDR_T_NONE) return -EINVAL; - if (dev_read_bool(dev, "st,negedge")) + if (dev_read_bool(dev, "st,neg-edge")) priv->clk_reg_msk |= SDMMC_CLKCR_NEGEDGE; - if (dev_read_bool(dev, "st,dirpol")) + if (dev_read_bool(dev, "st,sig-dir")) priv->pwr_reg_msk |= SDMMC_POWER_DIRPOL; - if (dev_read_bool(dev, "st,pin-ckin")) + if (dev_read_bool(dev, "st,use-ckin")) priv->clk_reg_msk |= SDMMC_CLKCR_SELCLKRX_CKIN; ret = clk_get_by_index(dev, 0, &priv->clk); diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c index decce2fa59..c136392350 100644 --- a/drivers/net/sandbox.c +++ b/drivers/net/sandbox.c @@ -350,7 +350,7 @@ static int sb_eth_recv(struct udevice *dev, int flags, uchar **packetp) struct eth_sandbox_priv *priv = dev_get_priv(dev); if (skip_timeout) { - sandbox_timer_add_offset(11000UL); + timer_test_add_offset(11000UL); skip_timeout = false; } diff --git a/drivers/pinctrl/meson/Kconfig b/drivers/pinctrl/meson/Kconfig index 162642d728..ef02087ed2 100644 --- a/drivers/pinctrl/meson/Kconfig +++ b/drivers/pinctrl/meson/Kconfig @@ -25,4 +25,8 @@ config PINCTRL_MESON_AXG bool "Amlogic Meson AXG SoC pinctrl driver" select PINCTRL_MESON_AXG_PMX +config PINCTRL_MESON_G12A + bool "Amlogic Meson G12a SoC pinctrl driver" + select PINCTRL_MESON_AXG_PMX + endif diff --git a/drivers/pinctrl/meson/Makefile b/drivers/pinctrl/meson/Makefile index 707287cd1d..80dba65e1b 100644 --- a/drivers/pinctrl/meson/Makefile +++ b/drivers/pinctrl/meson/Makefile @@ -6,3 +6,4 @@ obj-$(CONFIG_PINCTRL_MESON_AXG_PMX) += pinctrl-meson-axg-pmx.o obj-$(CONFIG_PINCTRL_MESON_GXBB) += pinctrl-meson-gxbb.o obj-$(CONFIG_PINCTRL_MESON_GXL) += pinctrl-meson-gxl.o obj-$(CONFIG_PINCTRL_MESON_AXG) += pinctrl-meson-axg.o +obj-$(CONFIG_PINCTRL_MESON_G12A) += pinctrl-meson-g12a.o diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg.c b/drivers/pinctrl/meson/pinctrl-meson-axg.c index 3bbbe817b4..8f23c8cef1 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-axg.c +++ b/drivers/pinctrl/meson/pinctrl-meson-axg.c @@ -17,239 +17,239 @@ #define EE_OFF 15 /* emmc */ -static const unsigned int emmc_nand_d0_pins[] = {BOOT_0}; -static const unsigned int emmc_nand_d1_pins[] = {BOOT_1}; -static const unsigned int emmc_nand_d2_pins[] = {BOOT_2}; -static const unsigned int emmc_nand_d3_pins[] = {BOOT_3}; -static const unsigned int emmc_nand_d4_pins[] = {BOOT_4}; -static const unsigned int emmc_nand_d5_pins[] = {BOOT_5}; -static const unsigned int emmc_nand_d6_pins[] = {BOOT_6}; -static const unsigned int emmc_nand_d7_pins[] = {BOOT_7}; - -static const unsigned int emmc_clk_pins[] = {BOOT_8}; -static const unsigned int emmc_cmd_pins[] = {BOOT_10}; -static const unsigned int emmc_ds_pins[] = {BOOT_13}; +static const unsigned int emmc_nand_d0_pins[] = { PIN(BOOT_0, EE_OFF) }; +static const unsigned int emmc_nand_d1_pins[] = { PIN(BOOT_1, EE_OFF) }; +static const unsigned int emmc_nand_d2_pins[] = { PIN(BOOT_2, EE_OFF) }; +static const unsigned int emmc_nand_d3_pins[] = { PIN(BOOT_3, EE_OFF) }; +static const unsigned int emmc_nand_d4_pins[] = { PIN(BOOT_4, EE_OFF) }; +static const unsigned int emmc_nand_d5_pins[] = { PIN(BOOT_5, EE_OFF) }; +static const unsigned int emmc_nand_d6_pins[] = { PIN(BOOT_6, EE_OFF) }; +static const unsigned int emmc_nand_d7_pins[] = { PIN(BOOT_7, EE_OFF) }; + +static const unsigned int emmc_clk_pins[] = { PIN(BOOT_8, EE_OFF) }; +static const unsigned int emmc_cmd_pins[] = { PIN(BOOT_10, EE_OFF) }; +static const unsigned int emmc_ds_pins[] = { PIN(BOOT_13, EE_OFF) }; /* nand */ -static const unsigned int nand_ce0_pins[] = {BOOT_8}; -static const unsigned int nand_ale_pins[] = {BOOT_9}; -static const unsigned int nand_cle_pins[] = {BOOT_10}; -static const unsigned int nand_wen_clk_pins[] = {BOOT_11}; -static const unsigned int nand_ren_wr_pins[] = {BOOT_12}; -static const unsigned int nand_rb0_pins[] = {BOOT_13}; +static const unsigned int nand_ce0_pins[] = { PIN(BOOT_8, EE_OFF) }; +static const unsigned int nand_ale_pins[] = { PIN(BOOT_9, EE_OFF) }; +static const unsigned int nand_cle_pins[] = { PIN(BOOT_10, EE_OFF) }; +static const unsigned int nand_wen_clk_pins[] = { PIN(BOOT_11, EE_OFF) }; +static const unsigned int nand_ren_wr_pins[] = { PIN(BOOT_12, EE_OFF) }; +static const unsigned int nand_rb0_pins[] = { PIN(BOOT_13, EE_OFF) }; /* nor */ -static const unsigned int nor_hold_pins[] = {BOOT_3}; -static const unsigned int nor_d_pins[] = {BOOT_4}; -static const unsigned int nor_q_pins[] = {BOOT_5}; -static const unsigned int nor_c_pins[] = {BOOT_6}; -static const unsigned int nor_wp_pins[] = {BOOT_9}; -static const unsigned int nor_cs_pins[] = {BOOT_14}; +static const unsigned int nor_hold_pins[] = { PIN(BOOT_3, EE_OFF) }; +static const unsigned int nor_d_pins[] = { PIN(BOOT_4, EE_OFF) }; +static const unsigned int nor_q_pins[] = { PIN(BOOT_5, EE_OFF) }; +static const unsigned int nor_c_pins[] = { PIN(BOOT_6, EE_OFF) }; +static const unsigned int nor_wp_pins[] = { PIN(BOOT_9, EE_OFF) }; +static const unsigned int nor_cs_pins[] = { PIN(BOOT_14, EE_OFF) }; /* sdio */ -static const unsigned int sdio_d0_pins[] = {GPIOX_0}; -static const unsigned int sdio_d1_pins[] = {GPIOX_1}; -static const unsigned int sdio_d2_pins[] = {GPIOX_2}; -static const unsigned int sdio_d3_pins[] = {GPIOX_3}; -static const unsigned int sdio_clk_pins[] = {GPIOX_4}; -static const unsigned int sdio_cmd_pins[] = {GPIOX_5}; +static const unsigned int sdio_d0_pins[] = { PIN(GPIOX_0, EE_OFF) }; +static const unsigned int sdio_d1_pins[] = { PIN(GPIOX_1, EE_OFF) }; +static const unsigned int sdio_d2_pins[] = { PIN(GPIOX_2, EE_OFF) }; +static const unsigned int sdio_d3_pins[] = { PIN(GPIOX_3, EE_OFF) }; +static const unsigned int sdio_clk_pins[] = { PIN(GPIOX_4, EE_OFF) }; +static const unsigned int sdio_cmd_pins[] = { PIN(GPIOX_5, EE_OFF) }; /* spi0 */ -static const unsigned int spi0_clk_pins[] = {GPIOZ_0}; -static const unsigned int spi0_mosi_pins[] = {GPIOZ_1}; -static const unsigned int spi0_miso_pins[] = {GPIOZ_2}; -static const unsigned int spi0_ss0_pins[] = {GPIOZ_3}; -static const unsigned int spi0_ss1_pins[] = {GPIOZ_4}; -static const unsigned int spi0_ss2_pins[] = {GPIOZ_5}; +static const unsigned int spi0_clk_pins[] = { PIN(GPIOZ_0, EE_OFF) }; +static const unsigned int spi0_mosi_pins[] = { PIN(GPIOZ_1, EE_OFF) }; +static const unsigned int spi0_miso_pins[] = { PIN(GPIOZ_2, EE_OFF) }; +static const unsigned int spi0_ss0_pins[] = { PIN(GPIOZ_3, EE_OFF) }; +static const unsigned int spi0_ss1_pins[] = { PIN(GPIOZ_4, EE_OFF) }; +static const unsigned int spi0_ss2_pins[] = { PIN(GPIOZ_5, EE_OFF) }; /* spi1 */ -static const unsigned int spi1_clk_x_pins[] = {GPIOX_19}; -static const unsigned int spi1_mosi_x_pins[] = {GPIOX_17}; -static const unsigned int spi1_miso_x_pins[] = {GPIOX_18}; -static const unsigned int spi1_ss0_x_pins[] = {GPIOX_16}; +static const unsigned int spi1_clk_x_pins[] = { PIN(GPIOX_19, EE_OFF) }; +static const unsigned int spi1_mosi_x_pins[] = { PIN(GPIOX_17, EE_OFF) }; +static const unsigned int spi1_miso_x_pins[] = { PIN(GPIOX_18, EE_OFF) }; +static const unsigned int spi1_ss0_x_pins[] = { PIN(GPIOX_16, EE_OFF) }; -static const unsigned int spi1_clk_a_pins[] = {GPIOA_4}; -static const unsigned int spi1_mosi_a_pins[] = {GPIOA_2}; -static const unsigned int spi1_miso_a_pins[] = {GPIOA_3}; -static const unsigned int spi1_ss0_a_pins[] = {GPIOA_5}; -static const unsigned int spi1_ss1_pins[] = {GPIOA_6}; +static const unsigned int spi1_clk_a_pins[] = { PIN(GPIOA_4, EE_OFF) }; +static const unsigned int spi1_mosi_a_pins[] = { PIN(GPIOA_2, EE_OFF) }; +static const unsigned int spi1_miso_a_pins[] = { PIN(GPIOA_3, EE_OFF) }; +static const unsigned int spi1_ss0_a_pins[] = { PIN(GPIOA_5, EE_OFF) }; +static const unsigned int spi1_ss1_pins[] = { PIN(GPIOA_6, EE_OFF) }; /* i2c0 */ -static const unsigned int i2c0_sck_pins[] = {GPIOZ_6}; -static const unsigned int i2c0_sda_pins[] = {GPIOZ_7}; +static const unsigned int i2c0_sck_pins[] = { PIN(GPIOZ_6, EE_OFF) }; +static const unsigned int i2c0_sda_pins[] = { PIN(GPIOZ_7, EE_OFF) }; /* i2c1 */ -static const unsigned int i2c1_sck_z_pins[] = {GPIOZ_8}; -static const unsigned int i2c1_sda_z_pins[] = {GPIOZ_9}; +static const unsigned int i2c1_sck_z_pins[] = { PIN(GPIOZ_8, EE_OFF) }; +static const unsigned int i2c1_sda_z_pins[] = { PIN(GPIOZ_9, EE_OFF) }; -static const unsigned int i2c1_sck_x_pins[] = {GPIOX_16}; -static const unsigned int i2c1_sda_x_pins[] = {GPIOX_17}; +static const unsigned int i2c1_sck_x_pins[] = { PIN(GPIOX_16, EE_OFF) }; +static const unsigned int i2c1_sda_x_pins[] = { PIN(GPIOX_17, EE_OFF) }; /* i2c2 */ -static const unsigned int i2c2_sck_x_pins[] = {GPIOX_18}; -static const unsigned int i2c2_sda_x_pins[] = {GPIOX_19}; +static const unsigned int i2c2_sck_x_pins[] = { PIN(GPIOX_18, EE_OFF) }; +static const unsigned int i2c2_sda_x_pins[] = { PIN(GPIOX_19, EE_OFF) }; -static const unsigned int i2c2_sda_a_pins[] = {GPIOA_17}; -static const unsigned int i2c2_sck_a_pins[] = {GPIOA_18}; +static const unsigned int i2c2_sda_a_pins[] = { PIN(GPIOA_17, EE_OFF) }; +static const unsigned int i2c2_sck_a_pins[] = { PIN(GPIOA_18, EE_OFF) }; /* i2c3 */ -static const unsigned int i2c3_sda_a6_pins[] = {GPIOA_6}; -static const unsigned int i2c3_sck_a7_pins[] = {GPIOA_7}; +static const unsigned int i2c3_sda_a6_pins[] = { PIN(GPIOA_6, EE_OFF) }; +static const unsigned int i2c3_sck_a7_pins[] = { PIN(GPIOA_7, EE_OFF) }; -static const unsigned int i2c3_sda_a12_pins[] = {GPIOA_12}; -static const unsigned int i2c3_sck_a13_pins[] = {GPIOA_13}; +static const unsigned int i2c3_sda_a12_pins[] = { PIN(GPIOA_12, EE_OFF) }; +static const unsigned int i2c3_sck_a13_pins[] = { PIN(GPIOA_13, EE_OFF) }; -static const unsigned int i2c3_sda_a19_pins[] = {GPIOA_19}; -static const unsigned int i2c3_sck_a20_pins[] = {GPIOA_20}; +static const unsigned int i2c3_sda_a19_pins[] = { PIN(GPIOA_19, EE_OFF) }; +static const unsigned int i2c3_sck_a20_pins[] = { PIN(GPIOA_20, EE_OFF) }; /* uart_a */ -static const unsigned int uart_rts_a_pins[] = {GPIOX_11}; -static const unsigned int uart_cts_a_pins[] = {GPIOX_10}; -static const unsigned int uart_tx_a_pins[] = {GPIOX_8}; -static const unsigned int uart_rx_a_pins[] = {GPIOX_9}; +static const unsigned int uart_rts_a_pins[] = { PIN(GPIOX_11, EE_OFF) }; +static const unsigned int uart_cts_a_pins[] = { PIN(GPIOX_10, EE_OFF) }; +static const unsigned int uart_tx_a_pins[] = { PIN(GPIOX_8, EE_OFF) }; +static const unsigned int uart_rx_a_pins[] = { PIN(GPIOX_9, EE_OFF) }; /* uart_b */ -static const unsigned int uart_rts_b_z_pins[] = {GPIOZ_0}; -static const unsigned int uart_cts_b_z_pins[] = {GPIOZ_1}; -static const unsigned int uart_tx_b_z_pins[] = {GPIOZ_2}; -static const unsigned int uart_rx_b_z_pins[] = {GPIOZ_3}; +static const unsigned int uart_rts_b_z_pins[] = { PIN(GPIOZ_0, EE_OFF) }; +static const unsigned int uart_cts_b_z_pins[] = { PIN(GPIOZ_1, EE_OFF) }; +static const unsigned int uart_tx_b_z_pins[] = { PIN(GPIOZ_2, EE_OFF) }; +static const unsigned int uart_rx_b_z_pins[] = { PIN(GPIOZ_3, EE_OFF) }; -static const unsigned int uart_rts_b_x_pins[] = {GPIOX_18}; -static const unsigned int uart_cts_b_x_pins[] = {GPIOX_19}; -static const unsigned int uart_tx_b_x_pins[] = {GPIOX_16}; -static const unsigned int uart_rx_b_x_pins[] = {GPIOX_17}; +static const unsigned int uart_rts_b_x_pins[] = { PIN(GPIOX_18, EE_OFF) }; +static const unsigned int uart_cts_b_x_pins[] = { PIN(GPIOX_19, EE_OFF) }; +static const unsigned int uart_tx_b_x_pins[] = { PIN(GPIOX_16, EE_OFF) }; +static const unsigned int uart_rx_b_x_pins[] = { PIN(GPIOX_17, EE_OFF) }; /* uart_ao_b */ -static const unsigned int uart_ao_tx_b_z_pins[] = {GPIOZ_8}; -static const unsigned int uart_ao_rx_b_z_pins[] = {GPIOZ_9}; -static const unsigned int uart_ao_cts_b_z_pins[] = {GPIOZ_6}; -static const unsigned int uart_ao_rts_b_z_pins[] = {GPIOZ_7}; +static const unsigned int uart_ao_tx_b_z_pins[] = { PIN(GPIOZ_8, EE_OFF) }; +static const unsigned int uart_ao_rx_b_z_pins[] = { PIN(GPIOZ_9, EE_OFF) }; +static const unsigned int uart_ao_cts_b_z_pins[] = { PIN(GPIOZ_6, EE_OFF) }; +static const unsigned int uart_ao_rts_b_z_pins[] = { PIN(GPIOZ_7, EE_OFF) }; /* pwm_a */ -static const unsigned int pwm_a_z_pins[] = {GPIOZ_5}; +static const unsigned int pwm_a_z_pins[] = { PIN(GPIOZ_5, EE_OFF) }; -static const unsigned int pwm_a_x18_pins[] = {GPIOX_18}; -static const unsigned int pwm_a_x20_pins[] = {GPIOX_20}; +static const unsigned int pwm_a_x18_pins[] = { PIN(GPIOX_18, EE_OFF) }; +static const unsigned int pwm_a_x20_pins[] = { PIN(GPIOX_20, EE_OFF) }; -static const unsigned int pwm_a_a_pins[] = {GPIOA_14}; +static const unsigned int pwm_a_a_pins[] = { PIN(GPIOA_14, EE_OFF) }; /* pwm_b */ -static const unsigned int pwm_b_z_pins[] = {GPIOZ_4}; +static const unsigned int pwm_b_z_pins[] = { PIN(GPIOZ_4, EE_OFF) }; -static const unsigned int pwm_b_x_pins[] = {GPIOX_19}; +static const unsigned int pwm_b_x_pins[] = { PIN(GPIOX_19, EE_OFF) }; -static const unsigned int pwm_b_a_pins[] = {GPIOA_15}; +static const unsigned int pwm_b_a_pins[] = { PIN(GPIOA_15, EE_OFF) }; /* pwm_c */ -static const unsigned int pwm_c_x10_pins[] = {GPIOX_10}; -static const unsigned int pwm_c_x17_pins[] = {GPIOX_17}; +static const unsigned int pwm_c_x10_pins[] = { PIN(GPIOX_10, EE_OFF) }; +static const unsigned int pwm_c_x17_pins[] = { PIN(GPIOX_17, EE_OFF) }; -static const unsigned int pwm_c_a_pins[] = {GPIOA_16}; +static const unsigned int pwm_c_a_pins[] = { PIN(GPIOA_16, EE_OFF) }; /* pwm_d */ -static const unsigned int pwm_d_x11_pins[] = {GPIOX_11}; -static const unsigned int pwm_d_x16_pins[] = {GPIOX_16}; +static const unsigned int pwm_d_x11_pins[] = { PIN(GPIOX_11, EE_OFF) }; +static const unsigned int pwm_d_x16_pins[] = { PIN(GPIOX_16, EE_OFF) }; /* pwm_vs */ -static const unsigned int pwm_vs_pins[] = {GPIOA_0}; +static const unsigned int pwm_vs_pins[] = { PIN(GPIOA_0, EE_OFF) }; /* spdif_in */ -static const unsigned int spdif_in_z_pins[] = {GPIOZ_4}; +static const unsigned int spdif_in_z_pins[] = { PIN(GPIOZ_4, EE_OFF) }; -static const unsigned int spdif_in_a1_pins[] = {GPIOA_1}; -static const unsigned int spdif_in_a7_pins[] = {GPIOA_7}; -static const unsigned int spdif_in_a19_pins[] = {GPIOA_19}; -static const unsigned int spdif_in_a20_pins[] = {GPIOA_20}; +static const unsigned int spdif_in_a1_pins[] = { PIN(GPIOA_1, EE_OFF) }; +static const unsigned int spdif_in_a7_pins[] = { PIN(GPIOA_7, EE_OFF) }; +static const unsigned int spdif_in_a19_pins[] = { PIN(GPIOA_19, EE_OFF) }; +static const unsigned int spdif_in_a20_pins[] = { PIN(GPIOA_20, EE_OFF) }; /* spdif_out */ -static const unsigned int spdif_out_z_pins[] = {GPIOZ_5}; +static const unsigned int spdif_out_z_pins[] = { PIN(GPIOZ_5, EE_OFF) }; -static const unsigned int spdif_out_a1_pins[] = {GPIOA_1}; -static const unsigned int spdif_out_a11_pins[] = {GPIOA_11}; -static const unsigned int spdif_out_a19_pins[] = {GPIOA_19}; -static const unsigned int spdif_out_a20_pins[] = {GPIOA_20}; +static const unsigned int spdif_out_a1_pins[] = { PIN(GPIOA_1, EE_OFF) }; +static const unsigned int spdif_out_a11_pins[] = { PIN(GPIOA_11, EE_OFF) }; +static const unsigned int spdif_out_a19_pins[] = { PIN(GPIOA_19, EE_OFF) }; +static const unsigned int spdif_out_a20_pins[] = { PIN(GPIOA_20, EE_OFF) }; /* jtag_ee */ -static const unsigned int jtag_tdo_x_pins[] = {GPIOX_0}; -static const unsigned int jtag_tdi_x_pins[] = {GPIOX_1}; -static const unsigned int jtag_clk_x_pins[] = {GPIOX_4}; -static const unsigned int jtag_tms_x_pins[] = {GPIOX_5}; +static const unsigned int jtag_tdo_x_pins[] = { PIN(GPIOX_0, EE_OFF) }; +static const unsigned int jtag_tdi_x_pins[] = { PIN(GPIOX_1, EE_OFF) }; +static const unsigned int jtag_clk_x_pins[] = { PIN(GPIOX_4, EE_OFF) }; +static const unsigned int jtag_tms_x_pins[] = { PIN(GPIOX_5, EE_OFF) }; /* eth */ -static const unsigned int eth_txd0_x_pins[] = {GPIOX_8}; -static const unsigned int eth_txd1_x_pins[] = {GPIOX_9}; -static const unsigned int eth_txen_x_pins[] = {GPIOX_10}; -static const unsigned int eth_rgmii_rx_clk_x_pins[] = {GPIOX_12}; -static const unsigned int eth_rxd0_x_pins[] = {GPIOX_13}; -static const unsigned int eth_rxd1_x_pins[] = {GPIOX_14}; -static const unsigned int eth_rx_dv_x_pins[] = {GPIOX_15}; -static const unsigned int eth_mdio_x_pins[] = {GPIOX_21}; -static const unsigned int eth_mdc_x_pins[] = {GPIOX_22}; - -static const unsigned int eth_txd0_y_pins[] = {GPIOY_10}; -static const unsigned int eth_txd1_y_pins[] = {GPIOY_11}; -static const unsigned int eth_txen_y_pins[] = {GPIOY_9}; -static const unsigned int eth_rgmii_rx_clk_y_pins[] = {GPIOY_2}; -static const unsigned int eth_rxd0_y_pins[] = {GPIOY_4}; -static const unsigned int eth_rxd1_y_pins[] = {GPIOY_5}; -static const unsigned int eth_rx_dv_y_pins[] = {GPIOY_3}; -static const unsigned int eth_mdio_y_pins[] = {GPIOY_0}; -static const unsigned int eth_mdc_y_pins[] = {GPIOY_1}; - -static const unsigned int eth_rxd2_rgmii_pins[] = {GPIOY_6}; -static const unsigned int eth_rxd3_rgmii_pins[] = {GPIOY_7}; -static const unsigned int eth_rgmii_tx_clk_pins[] = {GPIOY_8}; -static const unsigned int eth_txd2_rgmii_pins[] = {GPIOY_12}; -static const unsigned int eth_txd3_rgmii_pins[] = {GPIOY_13}; +static const unsigned int eth_txd0_x_pins[] = { PIN(GPIOX_8, EE_OFF) }; +static const unsigned int eth_txd1_x_pins[] = { PIN(GPIOX_9, EE_OFF) }; +static const unsigned int eth_txen_x_pins[] = { PIN(GPIOX_10, EE_OFF) }; +static const unsigned int eth_rgmii_rx_clk_x_pins[] = { PIN(GPIOX_12, EE_OFF) }; +static const unsigned int eth_rxd0_x_pins[] = { PIN(GPIOX_13, EE_OFF) }; +static const unsigned int eth_rxd1_x_pins[] = { PIN(GPIOX_14, EE_OFF) }; +static const unsigned int eth_rx_dv_x_pins[] = { PIN(GPIOX_15, EE_OFF) }; +static const unsigned int eth_mdio_x_pins[] = { PIN(GPIOX_21, EE_OFF) }; +static const unsigned int eth_mdc_x_pins[] = { PIN(GPIOX_22, EE_OFF) }; + +static const unsigned int eth_txd0_y_pins[] = { PIN(GPIOY_10, EE_OFF) }; +static const unsigned int eth_txd1_y_pins[] = { PIN(GPIOY_11, EE_OFF) }; +static const unsigned int eth_txen_y_pins[] = { PIN(GPIOY_9, EE_OFF) }; +static const unsigned int eth_rgmii_rx_clk_y_pins[] = { PIN(GPIOY_2, EE_OFF) }; +static const unsigned int eth_rxd0_y_pins[] = { PIN(GPIOY_4, EE_OFF) }; +static const unsigned int eth_rxd1_y_pins[] = { PIN(GPIOY_5, EE_OFF) }; +static const unsigned int eth_rx_dv_y_pins[] = { PIN(GPIOY_3, EE_OFF) }; +static const unsigned int eth_mdio_y_pins[] = { PIN(GPIOY_0, EE_OFF) }; +static const unsigned int eth_mdc_y_pins[] = { PIN(GPIOY_1, EE_OFF) }; + +static const unsigned int eth_rxd2_rgmii_pins[] = { PIN(GPIOY_6, EE_OFF) }; +static const unsigned int eth_rxd3_rgmii_pins[] = { PIN(GPIOY_7, EE_OFF) }; +static const unsigned int eth_rgmii_tx_clk_pins[] = { PIN(GPIOY_8, EE_OFF) }; +static const unsigned int eth_txd2_rgmii_pins[] = { PIN(GPIOY_12, EE_OFF) }; +static const unsigned int eth_txd3_rgmii_pins[] = { PIN(GPIOY_13, EE_OFF) }; /* pdm */ -static const unsigned int pdm_dclk_a14_pins[] = {GPIOA_14}; -static const unsigned int pdm_dclk_a19_pins[] = {GPIOA_19}; -static const unsigned int pdm_din0_pins[] = {GPIOA_15}; -static const unsigned int pdm_din1_pins[] = {GPIOA_16}; -static const unsigned int pdm_din2_pins[] = {GPIOA_17}; -static const unsigned int pdm_din3_pins[] = {GPIOA_18}; +static const unsigned int pdm_dclk_a14_pins[] = { PIN(GPIOA_14, EE_OFF) }; +static const unsigned int pdm_dclk_a19_pins[] = { PIN(GPIOA_19, EE_OFF) }; +static const unsigned int pdm_din0_pins[] = { PIN(GPIOA_15, EE_OFF) }; +static const unsigned int pdm_din1_pins[] = { PIN(GPIOA_16, EE_OFF) }; +static const unsigned int pdm_din2_pins[] = { PIN(GPIOA_17, EE_OFF) }; +static const unsigned int pdm_din3_pins[] = { PIN(GPIOA_18, EE_OFF) }; /* mclk */ -static const unsigned int mclk_c_pins[] = {GPIOA_0}; -static const unsigned int mclk_b_pins[] = {GPIOA_1}; +static const unsigned int mclk_c_pins[] = { PIN(GPIOA_0, EE_OFF) }; +static const unsigned int mclk_b_pins[] = { PIN(GPIOA_1, EE_OFF) }; /* tdm */ -static const unsigned int tdma_sclk_pins[] = {GPIOX_12}; -static const unsigned int tdma_sclk_slv_pins[] = {GPIOX_12}; -static const unsigned int tdma_fs_pins[] = {GPIOX_13}; -static const unsigned int tdma_fs_slv_pins[] = {GPIOX_13}; -static const unsigned int tdma_din0_pins[] = {GPIOX_14}; -static const unsigned int tdma_dout0_x14_pins[] = {GPIOX_14}; -static const unsigned int tdma_dout0_x15_pins[] = {GPIOX_15}; -static const unsigned int tdma_dout1_pins[] = {GPIOX_15}; -static const unsigned int tdma_din1_pins[] = {GPIOX_15}; - -static const unsigned int tdmc_sclk_pins[] = {GPIOA_2}; -static const unsigned int tdmc_sclk_slv_pins[] = {GPIOA_2}; -static const unsigned int tdmc_fs_pins[] = {GPIOA_3}; -static const unsigned int tdmc_fs_slv_pins[] = {GPIOA_3}; -static const unsigned int tdmc_din0_pins[] = {GPIOA_4}; -static const unsigned int tdmc_dout0_pins[] = {GPIOA_4}; -static const unsigned int tdmc_din1_pins[] = {GPIOA_5}; -static const unsigned int tdmc_dout1_pins[] = {GPIOA_5}; -static const unsigned int tdmc_din2_pins[] = {GPIOA_6}; -static const unsigned int tdmc_dout2_pins[] = {GPIOA_6}; -static const unsigned int tdmc_din3_pins[] = {GPIOA_7}; -static const unsigned int tdmc_dout3_pins[] = {GPIOA_7}; - -static const unsigned int tdmb_sclk_pins[] = {GPIOA_8}; -static const unsigned int tdmb_sclk_slv_pins[] = {GPIOA_8}; -static const unsigned int tdmb_fs_pins[] = {GPIOA_9}; -static const unsigned int tdmb_fs_slv_pins[] = {GPIOA_9}; -static const unsigned int tdmb_din0_pins[] = {GPIOA_10}; -static const unsigned int tdmb_dout0_pins[] = {GPIOA_10}; -static const unsigned int tdmb_din1_pins[] = {GPIOA_11}; -static const unsigned int tdmb_dout1_pins[] = {GPIOA_11}; -static const unsigned int tdmb_din2_pins[] = {GPIOA_12}; -static const unsigned int tdmb_dout2_pins[] = {GPIOA_12}; -static const unsigned int tdmb_din3_pins[] = {GPIOA_13}; -static const unsigned int tdmb_dout3_pins[] = {GPIOA_13}; +static const unsigned int tdma_sclk_pins[] = { PIN(GPIOX_12, EE_OFF) }; +static const unsigned int tdma_sclk_slv_pins[] = { PIN(GPIOX_12, EE_OFF) }; +static const unsigned int tdma_fs_pins[] = { PIN(GPIOX_13, EE_OFF) }; +static const unsigned int tdma_fs_slv_pins[] = { PIN(GPIOX_13, EE_OFF) }; +static const unsigned int tdma_din0_pins[] = { PIN(GPIOX_14, EE_OFF) }; +static const unsigned int tdma_dout0_x14_pins[] = { PIN(GPIOX_14, EE_OFF) }; +static const unsigned int tdma_dout0_x15_pins[] = { PIN(GPIOX_15, EE_OFF) }; +static const unsigned int tdma_dout1_pins[] = { PIN(GPIOX_15, EE_OFF) }; +static const unsigned int tdma_din1_pins[] = { PIN(GPIOX_15, EE_OFF) }; + +static const unsigned int tdmc_sclk_pins[] = { PIN(GPIOA_2, EE_OFF) }; +static const unsigned int tdmc_sclk_slv_pins[] = { PIN(GPIOA_2, EE_OFF) }; +static const unsigned int tdmc_fs_pins[] = { PIN(GPIOA_3, EE_OFF) }; +static const unsigned int tdmc_fs_slv_pins[] = { PIN(GPIOA_3, EE_OFF) }; +static const unsigned int tdmc_din0_pins[] = { PIN(GPIOA_4, EE_OFF) }; +static const unsigned int tdmc_dout0_pins[] = { PIN(GPIOA_4, EE_OFF) }; +static const unsigned int tdmc_din1_pins[] = { PIN(GPIOA_5, EE_OFF) }; +static const unsigned int tdmc_dout1_pins[] = { PIN(GPIOA_5, EE_OFF) }; +static const unsigned int tdmc_din2_pins[] = { PIN(GPIOA_6, EE_OFF) }; +static const unsigned int tdmc_dout2_pins[] = { PIN(GPIOA_6, EE_OFF) }; +static const unsigned int tdmc_din3_pins[] = { PIN(GPIOA_7, EE_OFF) }; +static const unsigned int tdmc_dout3_pins[] = { PIN(GPIOA_7, EE_OFF) }; + +static const unsigned int tdmb_sclk_pins[] = { PIN(GPIOA_8, EE_OFF) }; +static const unsigned int tdmb_sclk_slv_pins[] = { PIN(GPIOA_8, EE_OFF) }; +static const unsigned int tdmb_fs_pins[] = { PIN(GPIOA_9, EE_OFF) }; +static const unsigned int tdmb_fs_slv_pins[] = { PIN(GPIOA_9, EE_OFF) }; +static const unsigned int tdmb_din0_pins[] = { PIN(GPIOA_10, EE_OFF) }; +static const unsigned int tdmb_dout0_pins[] = { PIN(GPIOA_10, EE_OFF) }; +static const unsigned int tdmb_din1_pins[] = { PIN(GPIOA_11, EE_OFF) }; +static const unsigned int tdmb_dout1_pins[] = { PIN(GPIOA_11, EE_OFF) }; +static const unsigned int tdmb_din2_pins[] = { PIN(GPIOA_12, EE_OFF) }; +static const unsigned int tdmb_dout2_pins[] = { PIN(GPIOA_12, EE_OFF) }; +static const unsigned int tdmb_din3_pins[] = { PIN(GPIOA_13, EE_OFF) }; +static const unsigned int tdmb_dout3_pins[] = { PIN(GPIOA_13, EE_OFF) }; static struct meson_pmx_group meson_axg_periphs_groups[] = { GPIO_GROUP(GPIOZ_0, EE_OFF), @@ -907,12 +907,12 @@ static struct meson_bank meson_axg_aobus_banks[] = { }; static struct meson_pmx_bank meson_axg_periphs_pmx_banks[] = { - /* name first lask reg offset */ - BANK_PMX("Z", GPIOZ_0, GPIOZ_10, 0x2, 0), - BANK_PMX("BOOT", BOOT_0, BOOT_14, 0x0, 0), - BANK_PMX("A", GPIOA_0, GPIOA_20, 0xb, 0), - BANK_PMX("X", GPIOX_0, GPIOX_22, 0x4, 0), - BANK_PMX("Y", GPIOY_0, GPIOY_15, 0x8, 0), + /* name first last reg offset */ + BANK_PMX("Z", PIN(GPIOZ_0, EE_OFF), PIN(GPIOZ_10, EE_OFF), 0x2, 0), + BANK_PMX("BOOT", PIN(BOOT_0, EE_OFF), PIN(BOOT_14, EE_OFF), 0x0, 0), + BANK_PMX("A", PIN(GPIOA_0, EE_OFF), PIN(GPIOA_20, EE_OFF), 0xb, 0), + BANK_PMX("X", PIN(GPIOX_0, EE_OFF), PIN(GPIOX_22, EE_OFF), 0x4, 0), + BANK_PMX("Y", PIN(GPIOY_0, EE_OFF), PIN(GPIOY_15, EE_OFF), 0x8, 0), }; static struct meson_axg_pmx_data meson_axg_periphs_pmx_banks_data = { @@ -931,7 +931,7 @@ static struct meson_axg_pmx_data meson_axg_aobus_pmx_banks_data = { struct meson_pinctrl_data meson_axg_periphs_pinctrl_data = { .name = "periphs-banks", - .pin_base = 15, + .pin_base = EE_OFF, .groups = meson_axg_periphs_groups, .funcs = meson_axg_periphs_functions, .banks = meson_axg_periphs_banks, diff --git a/drivers/pinctrl/meson/pinctrl-meson-g12a.c b/drivers/pinctrl/meson/pinctrl-meson-g12a.c new file mode 100644 index 0000000000..9cc2b9d52b --- /dev/null +++ b/drivers/pinctrl/meson/pinctrl-meson-g12a.c @@ -0,0 +1,1294 @@ +// SPDX-License-Identifier: (GPL-2.0+ or MIT) +/* + * (C) Copyright (C) 2019 Jerome Brunet <jbrunet@baylibre.com> + * + * Based on code from Linux kernel: + * Copyright (c) 2018 Amlogic, Inc. All rights reserved. + * Author: Xingyu Chen <xingyu.chen@amlogic.com> + * Author: Yixun Lan <yixun.lan@amlogic.com> + */ + +#include <common.h> +#include <dm.h> +#include <dm/pinctrl.h> +#include <dt-bindings/gpio/meson-g12a-gpio.h> + +#include "pinctrl-meson-axg.h" + +#define EE_OFF 15 + +/* emmc */ +static const unsigned int emmc_nand_d0_pins[] = { PIN(BOOT_0, EE_OFF) }; +static const unsigned int emmc_nand_d1_pins[] = { PIN(BOOT_1, EE_OFF) }; +static const unsigned int emmc_nand_d2_pins[] = { PIN(BOOT_2, EE_OFF) }; +static const unsigned int emmc_nand_d3_pins[] = { PIN(BOOT_3, EE_OFF) }; +static const unsigned int emmc_nand_d4_pins[] = { PIN(BOOT_4, EE_OFF) }; +static const unsigned int emmc_nand_d5_pins[] = { PIN(BOOT_5, EE_OFF) }; +static const unsigned int emmc_nand_d6_pins[] = { PIN(BOOT_6, EE_OFF) }; +static const unsigned int emmc_nand_d7_pins[] = { PIN(BOOT_7, EE_OFF) }; +static const unsigned int emmc_clk_pins[] = { PIN(BOOT_8, EE_OFF) }; +static const unsigned int emmc_cmd_pins[] = { PIN(BOOT_10, EE_OFF) }; +static const unsigned int emmc_nand_ds_pins[] = { PIN(BOOT_13, EE_OFF) }; + +/* nand */ +static const unsigned int nand_wen_clk_pins[] = { PIN(BOOT_8, EE_OFF) }; +static const unsigned int nand_ale_pins[] = { PIN(BOOT_9, EE_OFF) }; +static const unsigned int nand_cle_pins[] = { PIN(BOOT_10, EE_OFF) }; +static const unsigned int nand_ce0_pins[] = { PIN(BOOT_11, EE_OFF) }; +static const unsigned int nand_ren_wr_pins[] = { PIN(BOOT_12, EE_OFF) }; +static const unsigned int nand_rb0_pins[] = { PIN(BOOT_14, EE_OFF) }; +static const unsigned int nand_ce1_pins[] = { PIN(BOOT_15, EE_OFF) }; + +/* nor */ +static const unsigned int nor_hold_pins[] = { PIN(BOOT_3, EE_OFF) }; +static const unsigned int nor_d_pins[] = { PIN(BOOT_4, EE_OFF) }; +static const unsigned int nor_q_pins[] = { PIN(BOOT_5, EE_OFF) }; +static const unsigned int nor_c_pins[] = { PIN(BOOT_6, EE_OFF) }; +static const unsigned int nor_wp_pins[] = { PIN(BOOT_7, EE_OFF) }; +static const unsigned int nor_cs_pins[] = { PIN(BOOT_14, EE_OFF) }; + +/* sdio */ +static const unsigned int sdio_d0_pins[] = { PIN(GPIOX_0, EE_OFF) }; +static const unsigned int sdio_d1_pins[] = { PIN(GPIOX_1, EE_OFF) }; +static const unsigned int sdio_d2_pins[] = { PIN(GPIOX_2, EE_OFF) }; +static const unsigned int sdio_d3_pins[] = { PIN(GPIOX_3, EE_OFF) }; +static const unsigned int sdio_clk_pins[] = { PIN(GPIOX_4, EE_OFF) }; +static const unsigned int sdio_cmd_pins[] = { PIN(GPIOX_5, EE_OFF) }; + +/* sdcard */ +static const unsigned int sdcard_d0_c_pins[] = { PIN(GPIOC_0, EE_OFF) }; +static const unsigned int sdcard_d1_c_pins[] = { PIN(GPIOC_1, EE_OFF) }; +static const unsigned int sdcard_d2_c_pins[] = { PIN(GPIOC_2, EE_OFF) }; +static const unsigned int sdcard_d3_c_pins[] = { PIN(GPIOC_3, EE_OFF) }; +static const unsigned int sdcard_clk_c_pins[] = { PIN(GPIOC_4, EE_OFF) }; +static const unsigned int sdcard_cmd_c_pins[] = { PIN(GPIOC_5, EE_OFF) }; + +static const unsigned int sdcard_d0_z_pins[] = { PIN(GPIOZ_2, EE_OFF) }; +static const unsigned int sdcard_d1_z_pins[] = { PIN(GPIOZ_3, EE_OFF) }; +static const unsigned int sdcard_d2_z_pins[] = { PIN(GPIOZ_4, EE_OFF) }; +static const unsigned int sdcard_d3_z_pins[] = { PIN(GPIOZ_5, EE_OFF) }; +static const unsigned int sdcard_clk_z_pins[] = { PIN(GPIOZ_6, EE_OFF) }; +static const unsigned int sdcard_cmd_z_pins[] = { PIN(GPIOZ_7, EE_OFF) }; + +/* spi0 */ +static const unsigned int spi0_mosi_c_pins[] = { PIN(GPIOC_0, EE_OFF) }; +static const unsigned int spi0_miso_c_pins[] = { PIN(GPIOC_1, EE_OFF) }; +static const unsigned int spi0_ss0_c_pins[] = { PIN(GPIOC_2, EE_OFF) }; +static const unsigned int spi0_clk_c_pins[] = { PIN(GPIOC_3, EE_OFF) }; + +static const unsigned int spi0_mosi_x_pins[] = { PIN(GPIOX_8, EE_OFF) }; +static const unsigned int spi0_miso_x_pins[] = { PIN(GPIOX_9, EE_OFF) }; +static const unsigned int spi0_ss0_x_pins[] = { PIN(GPIOX_10, EE_OFF) }; +static const unsigned int spi0_clk_x_pins[] = { PIN(GPIOX_11, EE_OFF) }; + +/* spi1 */ +static const unsigned int spi1_mosi_pins[] = { PIN(GPIOH_4, EE_OFF) }; +static const unsigned int spi1_miso_pins[] = { PIN(GPIOH_5, EE_OFF) }; +static const unsigned int spi1_ss0_pins[] = { PIN(GPIOH_6, EE_OFF) }; +static const unsigned int spi1_clk_pins[] = { PIN(GPIOH_7, EE_OFF) }; + +/* i2c0 */ +static const unsigned int i2c0_sda_c_pins[] = { PIN(GPIOC_5, EE_OFF) }; +static const unsigned int i2c0_sck_c_pins[] = { PIN(GPIOC_6, EE_OFF) }; +static const unsigned int i2c0_sda_z0_pins[] = { PIN(GPIOZ_0, EE_OFF) }; +static const unsigned int i2c0_sck_z1_pins[] = { PIN(GPIOZ_1, EE_OFF) }; +static const unsigned int i2c0_sda_z7_pins[] = { PIN(GPIOZ_7, EE_OFF) }; +static const unsigned int i2c0_sck_z8_pins[] = { PIN(GPIOZ_8, EE_OFF) }; + +/* i2c1 */ +static const unsigned int i2c1_sda_x_pins[] = { PIN(GPIOX_10, EE_OFF) }; +static const unsigned int i2c1_sck_x_pins[] = { PIN(GPIOX_11, EE_OFF) }; +static const unsigned int i2c1_sda_h2_pins[] = { PIN(GPIOH_2, EE_OFF) }; +static const unsigned int i2c1_sck_h3_pins[] = { PIN(GPIOH_3, EE_OFF) }; +static const unsigned int i2c1_sda_h6_pins[] = { PIN(GPIOH_6, EE_OFF) }; +static const unsigned int i2c1_sck_h7_pins[] = { PIN(GPIOH_7, EE_OFF) }; + +/* i2c2 */ +static const unsigned int i2c2_sda_x_pins[] = { PIN(GPIOX_17, EE_OFF) }; +static const unsigned int i2c2_sck_x_pins[] = { PIN(GPIOX_18, EE_OFF) }; +static const unsigned int i2c2_sda_z_pins[] = { PIN(GPIOZ_14, EE_OFF) }; +static const unsigned int i2c2_sck_z_pins[] = { PIN(GPIOZ_15, EE_OFF) }; + +/* i2c3 */ +static const unsigned int i2c3_sda_h_pins[] = { PIN(GPIOH_0, EE_OFF) }; +static const unsigned int i2c3_sck_h_pins[] = { PIN(GPIOH_1, EE_OFF) }; +static const unsigned int i2c3_sda_a_pins[] = { PIN(GPIOA_14, EE_OFF) }; +static const unsigned int i2c3_sck_a_pins[] = { PIN(GPIOA_15, EE_OFF) }; + +/* uart_a */ +static const unsigned int uart_a_tx_pins[] = { PIN(GPIOX_12, EE_OFF) }; +static const unsigned int uart_a_rx_pins[] = { PIN(GPIOX_13, EE_OFF) }; +static const unsigned int uart_a_cts_pins[] = { PIN(GPIOX_14, EE_OFF) }; +static const unsigned int uart_a_rts_pins[] = { PIN(GPIOX_15, EE_OFF) }; + +/* uart_b */ +static const unsigned int uart_b_tx_pins[] = { PIN(GPIOX_6, EE_OFF) }; +static const unsigned int uart_b_rx_pins[] = { PIN(GPIOX_7, EE_OFF) }; + +/* uart_c */ +static const unsigned int uart_c_rts_pins[] = { PIN(GPIOH_4, EE_OFF) }; +static const unsigned int uart_c_cts_pins[] = { PIN(GPIOH_5, EE_OFF) }; +static const unsigned int uart_c_rx_pins[] = { PIN(GPIOH_6, EE_OFF) }; +static const unsigned int uart_c_tx_pins[] = { PIN(GPIOH_7, EE_OFF) }; + +/* uart_ao_a_c */ +static const unsigned int uart_ao_a_rx_c_pins[] = { PIN(GPIOC_2, EE_OFF) }; +static const unsigned int uart_ao_a_tx_c_pins[] = { PIN(GPIOC_3, EE_OFF) }; + +/* iso7816 */ +static const unsigned int iso7816_clk_c_pins[] = { PIN(GPIOC_5, EE_OFF) }; +static const unsigned int iso7816_data_c_pins[] = { PIN(GPIOC_6, EE_OFF) }; +static const unsigned int iso7816_clk_x_pins[] = { PIN(GPIOX_8, EE_OFF) }; +static const unsigned int iso7816_data_x_pins[] = { PIN(GPIOX_9, EE_OFF) }; +static const unsigned int iso7816_clk_h_pins[] = { PIN(GPIOH_6, EE_OFF) }; +static const unsigned int iso7816_data_h_pins[] = { PIN(GPIOH_7, EE_OFF) }; +static const unsigned int iso7816_clk_z_pins[] = { PIN(GPIOZ_0, EE_OFF) }; +static const unsigned int iso7816_data_z_pins[] = { PIN(GPIOZ_1, EE_OFF) }; + +/* eth */ +static const unsigned int eth_mdio_pins[] = { PIN(GPIOZ_0, EE_OFF) }; +static const unsigned int eth_mdc_pins[] = { PIN(GPIOZ_1, EE_OFF) }; +static const unsigned int eth_rgmii_rx_clk_pins[] = { PIN(GPIOZ_2, EE_OFF) }; +static const unsigned int eth_rx_dv_pins[] = { PIN(GPIOZ_3, EE_OFF) }; +static const unsigned int eth_rxd0_pins[] = { PIN(GPIOZ_4, EE_OFF) }; +static const unsigned int eth_rxd1_pins[] = { PIN(GPIOZ_5, EE_OFF) }; +static const unsigned int eth_rxd2_rgmii_pins[] = { PIN(GPIOZ_6, EE_OFF) }; +static const unsigned int eth_rxd3_rgmii_pins[] = { PIN(GPIOZ_7, EE_OFF) }; +static const unsigned int eth_rgmii_tx_clk_pins[] = { PIN(GPIOZ_8, EE_OFF) }; +static const unsigned int eth_txen_pins[] = { PIN(GPIOZ_9, EE_OFF) }; +static const unsigned int eth_txd0_pins[] = { PIN(GPIOZ_10, EE_OFF) }; +static const unsigned int eth_txd1_pins[] = { PIN(GPIOZ_11, EE_OFF) }; +static const unsigned int eth_txd2_rgmii_pins[] = { PIN(GPIOZ_12, EE_OFF) }; +static const unsigned int eth_txd3_rgmii_pins[] = { PIN(GPIOZ_13, EE_OFF) }; +static const unsigned int eth_link_led_pins[] = { PIN(GPIOZ_14, EE_OFF) }; +static const unsigned int eth_act_led_pins[] = { PIN(GPIOZ_15, EE_OFF) }; + +/* pwm_a */ +static const unsigned int pwm_a_pins[] = { PIN(GPIOX_6, EE_OFF) }; + +/* pwm_b */ +static const unsigned int pwm_b_x7_pins[] = { PIN(GPIOX_7, EE_OFF) }; +static const unsigned int pwm_b_x19_pins[] = { PIN(GPIOX_19, EE_OFF) }; + +/* pwm_c */ +static const unsigned int pwm_c_c_pins[] = { PIN(GPIOC_4, EE_OFF) }; +static const unsigned int pwm_c_x5_pins[] = { PIN(GPIOX_5, EE_OFF) }; +static const unsigned int pwm_c_x8_pins[] = { PIN(GPIOX_8, EE_OFF) }; + +/* pwm_d */ +static const unsigned int pwm_d_x3_pins[] = { PIN(GPIOX_3, EE_OFF) }; +static const unsigned int pwm_d_x6_pins[] = { PIN(GPIOX_6, EE_OFF) }; + +/* pwm_e */ +static const unsigned int pwm_e_pins[] = { PIN(GPIOX_16, EE_OFF) }; + +/* pwm_f */ +static const unsigned int pwm_f_x_pins[] = { PIN(GPIOX_7, EE_OFF) }; +static const unsigned int pwm_f_h_pins[] = { PIN(GPIOH_5, EE_OFF) }; + +/* cec_ao */ +static const unsigned int cec_ao_a_h_pins[] = { PIN(GPIOH_3, EE_OFF) }; +static const unsigned int cec_ao_b_h_pins[] = { PIN(GPIOH_3, EE_OFF) }; + +/* jtag_b */ +static const unsigned int jtag_b_tdo_pins[] = { PIN(GPIOC_0, EE_OFF) }; +static const unsigned int jtag_b_tdi_pins[] = { PIN(GPIOC_1, EE_OFF) }; +static const unsigned int jtag_b_clk_pins[] = { PIN(GPIOC_4, EE_OFF) }; +static const unsigned int jtag_b_tms_pins[] = { PIN(GPIOC_5, EE_OFF) }; + +/* bt565_a */ +static const unsigned int bt565_a_vs_pins[] = { PIN(GPIOZ_0, EE_OFF) }; +static const unsigned int bt565_a_hs_pins[] = { PIN(GPIOZ_1, EE_OFF) }; +static const unsigned int bt565_a_clk_pins[] = { PIN(GPIOZ_3, EE_OFF) }; +static const unsigned int bt565_a_din0_pins[] = { PIN(GPIOZ_4, EE_OFF) }; +static const unsigned int bt565_a_din1_pins[] = { PIN(GPIOZ_5, EE_OFF) }; +static const unsigned int bt565_a_din2_pins[] = { PIN(GPIOZ_6, EE_OFF) }; +static const unsigned int bt565_a_din3_pins[] = { PIN(GPIOZ_7, EE_OFF) }; +static const unsigned int bt565_a_din4_pins[] = { PIN(GPIOZ_8, EE_OFF) }; +static const unsigned int bt565_a_din5_pins[] = { PIN(GPIOZ_9, EE_OFF) }; +static const unsigned int bt565_a_din6_pins[] = { PIN(GPIOZ_10, EE_OFF) }; +static const unsigned int bt565_a_din7_pins[] = { PIN(GPIOZ_11, EE_OFF) }; + +/* tsin_a */ +static const unsigned int tsin_a_valid_pins[] = { PIN(GPIOX_2, EE_OFF) }; +static const unsigned int tsin_a_sop_pins[] = { PIN(GPIOX_1, EE_OFF) }; +static const unsigned int tsin_a_din0_pins[] = { PIN(GPIOX_0, EE_OFF) }; +static const unsigned int tsin_a_clk_pins[] = { PIN(GPIOX_3, EE_OFF) }; + +/* tsin_b */ +static const unsigned int tsin_b_valid_x_pins[] = { PIN(GPIOX_9, EE_OFF) }; +static const unsigned int tsin_b_sop_x_pins[] = { PIN(GPIOX_8, EE_OFF) }; +static const unsigned int tsin_b_din0_x_pins[] = { PIN(GPIOX_10, EE_OFF) }; +static const unsigned int tsin_b_clk_x_pins[] = { PIN(GPIOX_11, EE_OFF) }; + +static const unsigned int tsin_b_valid_z_pins[] = { PIN(GPIOZ_2, EE_OFF) }; +static const unsigned int tsin_b_sop_z_pins[] = { PIN(GPIOZ_3, EE_OFF) }; +static const unsigned int tsin_b_din0_z_pins[] = { PIN(GPIOZ_4, EE_OFF) }; +static const unsigned int tsin_b_clk_z_pins[] = { PIN(GPIOZ_5, EE_OFF) }; + +static const unsigned int tsin_b_fail_pins[] = { PIN(GPIOZ_6, EE_OFF) }; +static const unsigned int tsin_b_din1_pins[] = { PIN(GPIOZ_7, EE_OFF) }; +static const unsigned int tsin_b_din2_pins[] = { PIN(GPIOZ_8, EE_OFF) }; +static const unsigned int tsin_b_din3_pins[] = { PIN(GPIOZ_9, EE_OFF) }; +static const unsigned int tsin_b_din4_pins[] = { PIN(GPIOZ_10, EE_OFF) }; +static const unsigned int tsin_b_din5_pins[] = { PIN(GPIOZ_11, EE_OFF) }; +static const unsigned int tsin_b_din6_pins[] = { PIN(GPIOZ_12, EE_OFF) }; +static const unsigned int tsin_b_din7_pins[] = { PIN(GPIOZ_13, EE_OFF) }; + +/* hdmitx */ +static const unsigned int hdmitx_sda_pins[] = { PIN(GPIOH_0, EE_OFF) }; +static const unsigned int hdmitx_sck_pins[] = { PIN(GPIOH_1, EE_OFF) }; +static const unsigned int hdmitx_hpd_in_pins[] = { PIN(GPIOH_2, EE_OFF) }; + +/* pdm */ +static const unsigned int pdm_din0_c_pins[] = { PIN(GPIOC_0, EE_OFF) }; +static const unsigned int pdm_din1_c_pins[] = { PIN(GPIOC_1, EE_OFF) }; +static const unsigned int pdm_din2_c_pins[] = { PIN(GPIOC_2, EE_OFF) }; +static const unsigned int pdm_din3_c_pins[] = { PIN(GPIOC_3, EE_OFF) }; +static const unsigned int pdm_dclk_c_pins[] = { PIN(GPIOC_4, EE_OFF) }; + +static const unsigned int pdm_din0_x_pins[] = { PIN(GPIOX_0, EE_OFF) }; +static const unsigned int pdm_din1_x_pins[] = { PIN(GPIOX_1, EE_OFF) }; +static const unsigned int pdm_din2_x_pins[] = { PIN(GPIOX_2, EE_OFF) }; +static const unsigned int pdm_din3_x_pins[] = { PIN(GPIOX_3, EE_OFF) }; +static const unsigned int pdm_dclk_x_pins[] = { PIN(GPIOX_4, EE_OFF) }; + +static const unsigned int pdm_din0_z_pins[] = { PIN(GPIOZ_2, EE_OFF) }; +static const unsigned int pdm_din1_z_pins[] = { PIN(GPIOZ_3, EE_OFF) }; +static const unsigned int pdm_din2_z_pins[] = { PIN(GPIOZ_4, EE_OFF) }; +static const unsigned int pdm_din3_z_pins[] = { PIN(GPIOZ_5, EE_OFF) }; +static const unsigned int pdm_dclk_z_pins[] = { PIN(GPIOZ_6, EE_OFF) }; + +static const unsigned int pdm_din0_a_pins[] = { PIN(GPIOA_8, EE_OFF) }; +static const unsigned int pdm_din1_a_pins[] = { PIN(GPIOA_9, EE_OFF) }; +static const unsigned int pdm_din2_a_pins[] = { PIN(GPIOA_6, EE_OFF) }; +static const unsigned int pdm_din3_a_pins[] = { PIN(GPIOA_5, EE_OFF) }; +static const unsigned int pdm_dclk_a_pins[] = { PIN(GPIOA_7, EE_OFF) }; + +/* spdif_in */ +static const unsigned int spdif_in_h_pins[] = { PIN(GPIOH_5, EE_OFF) }; +static const unsigned int spdif_in_a10_pins[] = { PIN(GPIOA_10, EE_OFF) }; +static const unsigned int spdif_in_a12_pins[] = { PIN(GPIOA_12, EE_OFF) }; + +/* spdif_out */ +static const unsigned int spdif_out_h_pins[] = { PIN(GPIOH_4, EE_OFF) }; +static const unsigned int spdif_out_a11_pins[] = { PIN(GPIOA_11, EE_OFF) }; +static const unsigned int spdif_out_a13_pins[] = { PIN(GPIOA_13, EE_OFF) }; + +/* mclk0 */ +static const unsigned int mclk0_a_pins[] = { PIN(GPIOA_0, EE_OFF) }; + +/* mclk1 */ +static const unsigned int mclk1_x_pins[] = { PIN(GPIOX_5, EE_OFF) }; +static const unsigned int mclk1_z_pins[] = { PIN(GPIOZ_8, EE_OFF) }; +static const unsigned int mclk1_a_pins[] = { PIN(GPIOA_11, EE_OFF) }; + +/* tdm */ +static const unsigned int tdm_a_slv_sclk_pins[] = { PIN(GPIOX_11, EE_OFF) }; +static const unsigned int tdm_a_slv_fs_pins[] = { PIN(GPIOX_10, EE_OFF) }; +static const unsigned int tdm_a_sclk_pins[] = { PIN(GPIOX_11, EE_OFF) }; +static const unsigned int tdm_a_fs_pins[] = { PIN(GPIOX_10, EE_OFF) }; +static const unsigned int tdm_a_din0_pins[] = { PIN(GPIOX_9, EE_OFF) }; +static const unsigned int tdm_a_din1_pins[] = { PIN(GPIOX_8, EE_OFF) }; +static const unsigned int tdm_a_dout0_pins[] = { PIN(GPIOX_9, EE_OFF) }; +static const unsigned int tdm_a_dout1_pins[] = { PIN(GPIOX_8, EE_OFF) }; + +static const unsigned int tdm_b_slv_sclk_pins[] = { PIN(GPIOA_1, EE_OFF) }; +static const unsigned int tdm_b_slv_fs_pins[] = { PIN(GPIOA_2, EE_OFF) }; +static const unsigned int tdm_b_sclk_pins[] = { PIN(GPIOA_1, EE_OFF) }; +static const unsigned int tdm_b_fs_pins[] = { PIN(GPIOA_2, EE_OFF) }; +static const unsigned int tdm_b_din0_pins[] = { PIN(GPIOA_3, EE_OFF) }; +static const unsigned int tdm_b_din1_pins[] = { PIN(GPIOA_4, EE_OFF) }; +static const unsigned int tdm_b_din2_pins[] = { PIN(GPIOA_5, EE_OFF) }; +static const unsigned int tdm_b_din3_a_pins[] = { PIN(GPIOA_6, EE_OFF) }; +static const unsigned int tdm_b_din3_h_pins[] = { PIN(GPIOH_5, EE_OFF) }; +static const unsigned int tdm_b_dout0_pins[] = { PIN(GPIOA_3, EE_OFF) }; +static const unsigned int tdm_b_dout1_pins[] = { PIN(GPIOA_4, EE_OFF) }; +static const unsigned int tdm_b_dout2_pins[] = { PIN(GPIOA_5, EE_OFF) }; +static const unsigned int tdm_b_dout3_a_pins[] = { PIN(GPIOA_6, EE_OFF) }; +static const unsigned int tdm_b_dout3_h_pins[] = { PIN(GPIOH_5, EE_OFF) }; + +static const unsigned int tdm_c_slv_sclk_a_pins[] = { PIN(GPIOA_12, EE_OFF) }; +static const unsigned int tdm_c_slv_fs_a_pins[] = { PIN(GPIOA_13, EE_OFF) }; +static const unsigned int tdm_c_slv_sclk_z_pins[] = { PIN(GPIOZ_7, EE_OFF) }; +static const unsigned int tdm_c_slv_fs_z_pins[] = { PIN(GPIOZ_6, EE_OFF) }; +static const unsigned int tdm_c_sclk_a_pins[] = { PIN(GPIOA_12, EE_OFF) }; +static const unsigned int tdm_c_fs_a_pins[] = { PIN(GPIOA_13, EE_OFF) }; +static const unsigned int tdm_c_sclk_z_pins[] = { PIN(GPIOZ_7, EE_OFF) }; +static const unsigned int tdm_c_fs_z_pins[] = { PIN(GPIOZ_6, EE_OFF) }; +static const unsigned int tdm_c_din0_a_pins[] = { PIN(GPIOA_10, EE_OFF) }; +static const unsigned int tdm_c_din1_a_pins[] = { PIN(GPIOA_9, EE_OFF) }; +static const unsigned int tdm_c_din2_a_pins[] = { PIN(GPIOA_8, EE_OFF) }; +static const unsigned int tdm_c_din3_a_pins[] = { PIN(GPIOA_7, EE_OFF) }; +static const unsigned int tdm_c_din0_z_pins[] = { PIN(GPIOZ_2, EE_OFF) }; +static const unsigned int tdm_c_din1_z_pins[] = { PIN(GPIOZ_3, EE_OFF) }; +static const unsigned int tdm_c_din2_z_pins[] = { PIN(GPIOZ_4, EE_OFF) }; +static const unsigned int tdm_c_din3_z_pins[] = { PIN(GPIOZ_5, EE_OFF) }; +static const unsigned int tdm_c_dout0_a_pins[] = { PIN(GPIOA_10, EE_OFF) }; +static const unsigned int tdm_c_dout1_a_pins[] = { PIN(GPIOA_9, EE_OFF) }; +static const unsigned int tdm_c_dout2_a_pins[] = { PIN(GPIOA_8, EE_OFF) }; +static const unsigned int tdm_c_dout3_a_pins[] = { PIN(GPIOA_7, EE_OFF) }; +static const unsigned int tdm_c_dout0_z_pins[] = { PIN(GPIOZ_2, EE_OFF) }; +static const unsigned int tdm_c_dout1_z_pins[] = { PIN(GPIOZ_3, EE_OFF) }; +static const unsigned int tdm_c_dout2_z_pins[] = { PIN(GPIOZ_4, EE_OFF) }; +static const unsigned int tdm_c_dout3_z_pins[] = { PIN(GPIOZ_5, EE_OFF) }; + +static struct meson_pmx_group meson_g12a_periphs_groups[] = { + GPIO_GROUP(GPIOZ_0, EE_OFF), + GPIO_GROUP(GPIOZ_1, EE_OFF), + GPIO_GROUP(GPIOZ_2, EE_OFF), + GPIO_GROUP(GPIOZ_3, EE_OFF), + GPIO_GROUP(GPIOZ_4, EE_OFF), + GPIO_GROUP(GPIOZ_5, EE_OFF), + GPIO_GROUP(GPIOZ_6, EE_OFF), + GPIO_GROUP(GPIOZ_7, EE_OFF), + GPIO_GROUP(GPIOZ_8, EE_OFF), + GPIO_GROUP(GPIOZ_9, EE_OFF), + GPIO_GROUP(GPIOZ_10, EE_OFF), + GPIO_GROUP(GPIOZ_11, EE_OFF), + GPIO_GROUP(GPIOZ_12, EE_OFF), + GPIO_GROUP(GPIOZ_13, EE_OFF), + GPIO_GROUP(GPIOZ_14, EE_OFF), + GPIO_GROUP(GPIOZ_15, EE_OFF), + GPIO_GROUP(GPIOH_0, EE_OFF), + GPIO_GROUP(GPIOH_1, EE_OFF), + GPIO_GROUP(GPIOH_2, EE_OFF), + GPIO_GROUP(GPIOH_3, EE_OFF), + GPIO_GROUP(GPIOH_4, EE_OFF), + GPIO_GROUP(GPIOH_5, EE_OFF), + GPIO_GROUP(GPIOH_6, EE_OFF), + GPIO_GROUP(GPIOH_7, EE_OFF), + GPIO_GROUP(GPIOH_8, EE_OFF), + GPIO_GROUP(BOOT_0, EE_OFF), + GPIO_GROUP(BOOT_1, EE_OFF), + GPIO_GROUP(BOOT_2, EE_OFF), + GPIO_GROUP(BOOT_3, EE_OFF), + GPIO_GROUP(BOOT_4, EE_OFF), + GPIO_GROUP(BOOT_5, EE_OFF), + GPIO_GROUP(BOOT_6, EE_OFF), + GPIO_GROUP(BOOT_7, EE_OFF), + GPIO_GROUP(BOOT_8, EE_OFF), + GPIO_GROUP(BOOT_9, EE_OFF), + GPIO_GROUP(BOOT_10, EE_OFF), + GPIO_GROUP(BOOT_11, EE_OFF), + GPIO_GROUP(BOOT_12, EE_OFF), + GPIO_GROUP(BOOT_13, EE_OFF), + GPIO_GROUP(BOOT_14, EE_OFF), + GPIO_GROUP(BOOT_15, EE_OFF), + GPIO_GROUP(GPIOC_0, EE_OFF), + GPIO_GROUP(GPIOC_1, EE_OFF), + GPIO_GROUP(GPIOC_2, EE_OFF), + GPIO_GROUP(GPIOC_3, EE_OFF), + GPIO_GROUP(GPIOC_4, EE_OFF), + GPIO_GROUP(GPIOC_5, EE_OFF), + GPIO_GROUP(GPIOC_6, EE_OFF), + GPIO_GROUP(GPIOC_7, EE_OFF), + GPIO_GROUP(GPIOA_0, EE_OFF), + GPIO_GROUP(GPIOA_1, EE_OFF), + GPIO_GROUP(GPIOA_2, EE_OFF), + GPIO_GROUP(GPIOA_3, EE_OFF), + GPIO_GROUP(GPIOA_4, EE_OFF), + GPIO_GROUP(GPIOA_5, EE_OFF), + GPIO_GROUP(GPIOA_6, EE_OFF), + GPIO_GROUP(GPIOA_7, EE_OFF), + GPIO_GROUP(GPIOA_8, EE_OFF), + GPIO_GROUP(GPIOA_9, EE_OFF), + GPIO_GROUP(GPIOA_10, EE_OFF), + GPIO_GROUP(GPIOA_11, EE_OFF), + GPIO_GROUP(GPIOA_12, EE_OFF), + GPIO_GROUP(GPIOA_13, EE_OFF), + GPIO_GROUP(GPIOA_14, EE_OFF), + GPIO_GROUP(GPIOA_15, EE_OFF), + GPIO_GROUP(GPIOX_0, EE_OFF), + GPIO_GROUP(GPIOX_1, EE_OFF), + GPIO_GROUP(GPIOX_2, EE_OFF), + GPIO_GROUP(GPIOX_3, EE_OFF), + GPIO_GROUP(GPIOX_4, EE_OFF), + GPIO_GROUP(GPIOX_5, EE_OFF), + GPIO_GROUP(GPIOX_6, EE_OFF), + GPIO_GROUP(GPIOX_7, EE_OFF), + GPIO_GROUP(GPIOX_8, EE_OFF), + GPIO_GROUP(GPIOX_9, EE_OFF), + GPIO_GROUP(GPIOX_10, EE_OFF), + GPIO_GROUP(GPIOX_11, EE_OFF), + GPIO_GROUP(GPIOX_12, EE_OFF), + GPIO_GROUP(GPIOX_13, EE_OFF), + GPIO_GROUP(GPIOX_14, EE_OFF), + GPIO_GROUP(GPIOX_15, EE_OFF), + GPIO_GROUP(GPIOX_16, EE_OFF), + GPIO_GROUP(GPIOX_17, EE_OFF), + GPIO_GROUP(GPIOX_18, EE_OFF), + GPIO_GROUP(GPIOX_19, EE_OFF), + + /* bank BOOT */ + GROUP(emmc_nand_d0, 1), + GROUP(emmc_nand_d1, 1), + GROUP(emmc_nand_d2, 1), + GROUP(emmc_nand_d3, 1), + GROUP(emmc_nand_d4, 1), + GROUP(emmc_nand_d5, 1), + GROUP(emmc_nand_d6, 1), + GROUP(emmc_nand_d7, 1), + GROUP(emmc_clk, 1), + GROUP(emmc_cmd, 1), + GROUP(emmc_nand_ds, 1), + GROUP(nand_ce0, 2), + GROUP(nand_ale, 2), + GROUP(nand_cle, 2), + GROUP(nand_wen_clk, 2), + GROUP(nand_ren_wr, 2), + GROUP(nand_rb0, 2), + GROUP(nand_ce1, 2), + GROUP(nor_hold, 3), + GROUP(nor_d, 3), + GROUP(nor_q, 3), + GROUP(nor_c, 3), + GROUP(nor_wp, 3), + GROUP(nor_cs, 3), + + /* bank GPIOZ */ + GROUP(sdcard_d0_z, 5), + GROUP(sdcard_d1_z, 5), + GROUP(sdcard_d2_z, 5), + GROUP(sdcard_d3_z, 5), + GROUP(sdcard_clk_z, 5), + GROUP(sdcard_cmd_z, 5), + GROUP(i2c0_sda_z0, 4), + GROUP(i2c0_sck_z1, 4), + GROUP(i2c0_sda_z7, 7), + GROUP(i2c0_sck_z8, 7), + GROUP(i2c2_sda_z, 3), + GROUP(i2c2_sck_z, 3), + GROUP(iso7816_clk_z, 3), + GROUP(iso7816_data_z, 3), + GROUP(eth_mdio, 1), + GROUP(eth_mdc, 1), + GROUP(eth_rgmii_rx_clk, 1), + GROUP(eth_rx_dv, 1), + GROUP(eth_rxd0, 1), + GROUP(eth_rxd1, 1), + GROUP(eth_rxd2_rgmii, 1), + GROUP(eth_rxd3_rgmii, 1), + GROUP(eth_rgmii_tx_clk, 1), + GROUP(eth_txen, 1), + GROUP(eth_txd0, 1), + GROUP(eth_txd1, 1), + GROUP(eth_txd2_rgmii, 1), + GROUP(eth_txd3_rgmii, 1), + GROUP(eth_link_led, 1), + GROUP(eth_act_led, 1), + GROUP(bt565_a_vs, 2), + GROUP(bt565_a_hs, 2), + GROUP(bt565_a_clk, 2), + GROUP(bt565_a_din0, 2), + GROUP(bt565_a_din1, 2), + GROUP(bt565_a_din2, 2), + GROUP(bt565_a_din3, 2), + GROUP(bt565_a_din4, 2), + GROUP(bt565_a_din5, 2), + GROUP(bt565_a_din6, 2), + GROUP(bt565_a_din7, 2), + GROUP(tsin_b_valid_z, 3), + GROUP(tsin_b_sop_z, 3), + GROUP(tsin_b_din0_z, 3), + GROUP(tsin_b_clk_z, 3), + GROUP(tsin_b_fail, 3), + GROUP(tsin_b_din1, 3), + GROUP(tsin_b_din2, 3), + GROUP(tsin_b_din3, 3), + GROUP(tsin_b_din4, 3), + GROUP(tsin_b_din5, 3), + GROUP(tsin_b_din6, 3), + GROUP(tsin_b_din7, 3), + GROUP(pdm_din0_z, 7), + GROUP(pdm_din1_z, 7), + GROUP(pdm_din2_z, 7), + GROUP(pdm_din3_z, 7), + GROUP(pdm_dclk_z, 7), + GROUP(tdm_c_slv_sclk_z, 6), + GROUP(tdm_c_slv_fs_z, 6), + GROUP(tdm_c_din0_z, 6), + GROUP(tdm_c_din1_z, 6), + GROUP(tdm_c_din2_z, 6), + GROUP(tdm_c_din3_z, 6), + GROUP(tdm_c_sclk_z, 4), + GROUP(tdm_c_fs_z, 4), + GROUP(tdm_c_dout0_z, 4), + GROUP(tdm_c_dout1_z, 4), + GROUP(tdm_c_dout2_z, 4), + GROUP(tdm_c_dout3_z, 4), + GROUP(mclk1_z, 4), + + /* bank GPIOX */ + GROUP(sdio_d0, 1), + GROUP(sdio_d1, 1), + GROUP(sdio_d2, 1), + GROUP(sdio_d3, 1), + GROUP(sdio_clk, 1), + GROUP(sdio_cmd, 1), + GROUP(spi0_mosi_x, 4), + GROUP(spi0_miso_x, 4), + GROUP(spi0_ss0_x, 4), + GROUP(spi0_clk_x, 4), + GROUP(i2c1_sda_x, 5), + GROUP(i2c1_sck_x, 5), + GROUP(i2c2_sda_x, 1), + GROUP(i2c2_sck_x, 1), + GROUP(uart_a_tx, 1), + GROUP(uart_a_rx, 1), + GROUP(uart_a_cts, 1), + GROUP(uart_a_rts, 1), + GROUP(uart_b_tx, 2), + GROUP(uart_b_rx, 2), + GROUP(iso7816_clk_x, 6), + GROUP(iso7816_data_x, 6), + GROUP(pwm_a, 1), + GROUP(pwm_b_x7, 4), + GROUP(pwm_b_x19, 1), + GROUP(pwm_c_x5, 4), + GROUP(pwm_c_x8, 5), + GROUP(pwm_d_x3, 4), + GROUP(pwm_d_x6, 4), + GROUP(pwm_e, 1), + GROUP(pwm_f_x, 1), + GROUP(tsin_a_valid, 3), + GROUP(tsin_a_sop, 3), + GROUP(tsin_a_din0, 3), + GROUP(tsin_a_clk, 3), + GROUP(tsin_b_valid_x, 3), + GROUP(tsin_b_sop_x, 3), + GROUP(tsin_b_din0_x, 3), + GROUP(tsin_b_clk_x, 3), + GROUP(pdm_din0_x, 2), + GROUP(pdm_din1_x, 2), + GROUP(pdm_din2_x, 2), + GROUP(pdm_din3_x, 2), + GROUP(pdm_dclk_x, 2), + GROUP(tdm_a_slv_sclk, 2), + GROUP(tdm_a_slv_fs, 2), + GROUP(tdm_a_din0, 2), + GROUP(tdm_a_din1, 2), + GROUP(tdm_a_sclk, 1), + GROUP(tdm_a_fs, 1), + GROUP(tdm_a_dout0, 1), + GROUP(tdm_a_dout1, 1), + GROUP(mclk1_x, 2), + + /* bank GPIOC */ + GROUP(sdcard_d0_c, 1), + GROUP(sdcard_d1_c, 1), + GROUP(sdcard_d2_c, 1), + GROUP(sdcard_d3_c, 1), + GROUP(sdcard_clk_c, 1), + GROUP(sdcard_cmd_c, 1), + GROUP(spi0_mosi_c, 5), + GROUP(spi0_miso_c, 5), + GROUP(spi0_ss0_c, 5), + GROUP(spi0_clk_c, 5), + GROUP(i2c0_sda_c, 3), + GROUP(i2c0_sck_c, 3), + GROUP(uart_ao_a_rx_c, 2), + GROUP(uart_ao_a_tx_c, 2), + GROUP(iso7816_clk_c, 5), + GROUP(iso7816_data_c, 5), + GROUP(pwm_c_c, 5), + GROUP(jtag_b_tdo, 2), + GROUP(jtag_b_tdi, 2), + GROUP(jtag_b_clk, 2), + GROUP(jtag_b_tms, 2), + GROUP(pdm_din0_c, 4), + GROUP(pdm_din1_c, 4), + GROUP(pdm_din2_c, 4), + GROUP(pdm_din3_c, 4), + GROUP(pdm_dclk_c, 4), + + /* bank GPIOH */ + GROUP(spi1_mosi, 3), + GROUP(spi1_miso, 3), + GROUP(spi1_ss0, 3), + GROUP(spi1_clk, 3), + GROUP(i2c1_sda_h2, 2), + GROUP(i2c1_sck_h3, 2), + GROUP(i2c1_sda_h6, 4), + GROUP(i2c1_sck_h7, 4), + GROUP(i2c3_sda_h, 2), + GROUP(i2c3_sck_h, 2), + GROUP(uart_c_tx, 2), + GROUP(uart_c_rx, 2), + GROUP(uart_c_cts, 2), + GROUP(uart_c_rts, 2), + GROUP(iso7816_clk_h, 1), + GROUP(iso7816_data_h, 1), + GROUP(pwm_f_h, 4), + GROUP(cec_ao_a_h, 4), + GROUP(cec_ao_b_h, 5), + GROUP(hdmitx_sda, 1), + GROUP(hdmitx_sck, 1), + GROUP(hdmitx_hpd_in, 1), + GROUP(spdif_out_h, 1), + GROUP(spdif_in_h, 1), + GROUP(tdm_b_din3_h, 6), + GROUP(tdm_b_dout3_h, 5), + + /* bank GPIOA */ + GROUP(i2c3_sda_a, 2), + GROUP(i2c3_sck_a, 2), + GROUP(pdm_din0_a, 1), + GROUP(pdm_din1_a, 1), + GROUP(pdm_din2_a, 1), + GROUP(pdm_din3_a, 1), + GROUP(pdm_dclk_a, 1), + GROUP(spdif_in_a10, 1), + GROUP(spdif_in_a12, 1), + GROUP(spdif_out_a11, 1), + GROUP(spdif_out_a13, 1), + GROUP(tdm_b_slv_sclk, 2), + GROUP(tdm_b_slv_fs, 2), + GROUP(tdm_b_din0, 2), + GROUP(tdm_b_din1, 2), + GROUP(tdm_b_din2, 2), + GROUP(tdm_b_din3_a, 2), + GROUP(tdm_b_sclk, 1), + GROUP(tdm_b_fs, 1), + GROUP(tdm_b_dout0, 1), + GROUP(tdm_b_dout1, 1), + GROUP(tdm_b_dout2, 3), + GROUP(tdm_b_dout3_a, 3), + GROUP(tdm_c_slv_sclk_a, 3), + GROUP(tdm_c_slv_fs_a, 3), + GROUP(tdm_c_din0_a, 3), + GROUP(tdm_c_din1_a, 3), + GROUP(tdm_c_din2_a, 3), + GROUP(tdm_c_din3_a, 3), + GROUP(tdm_c_sclk_a, 2), + GROUP(tdm_c_fs_a, 2), + GROUP(tdm_c_dout0_a, 2), + GROUP(tdm_c_dout1_a, 2), + GROUP(tdm_c_dout2_a, 2), + GROUP(tdm_c_dout3_a, 2), + GROUP(mclk0_a, 1), + GROUP(mclk1_a, 2), +}; + +/* uart_ao_a */ +static const unsigned int uart_ao_a_tx_pins[] = { GPIOAO_0 }; +static const unsigned int uart_ao_a_rx_pins[] = { GPIOAO_1 }; +static const unsigned int uart_ao_a_cts_pins[] = { GPIOE_0 }; +static const unsigned int uart_ao_a_rts_pins[] = { GPIOE_1 }; + +/* uart_ao_b */ +static const unsigned int uart_ao_b_tx_2_pins[] = { GPIOAO_2 }; +static const unsigned int uart_ao_b_rx_3_pins[] = { GPIOAO_3 }; +static const unsigned int uart_ao_b_tx_8_pins[] = { GPIOAO_8 }; +static const unsigned int uart_ao_b_rx_9_pins[] = { GPIOAO_9 }; +static const unsigned int uart_ao_b_cts_pins[] = { GPIOE_0 }; +static const unsigned int uart_ao_b_rts_pins[] = { GPIOE_1 }; + +/* i2c_ao */ +static const unsigned int i2c_ao_sck_pins[] = { GPIOAO_2 }; +static const unsigned int i2c_ao_sda_pins[] = { GPIOAO_3 }; + +static const unsigned int i2c_ao_sck_e_pins[] = { GPIOE_0 }; +static const unsigned int i2c_ao_sda_e_pins[] = { GPIOE_1 }; + +/* i2c_ao_slave */ +static const unsigned int i2c_ao_slave_sck_pins[] = { GPIOAO_2 }; +static const unsigned int i2c_ao_slave_sda_pins[] = { GPIOAO_3 }; + +/* ir_in */ +static const unsigned int remote_ao_input_pins[] = { GPIOAO_5 }; + +/* ir_out */ +static const unsigned int remote_ao_out_pins[] = { GPIOAO_4 }; + +/* pwm_ao_a */ +static const unsigned int pwm_ao_a_pins[] = { GPIOAO_11 }; +static const unsigned int pwm_ao_a_hiz_pins[] = { GPIOAO_11 }; + +/* pwm_ao_b */ +static const unsigned int pwm_ao_b_pins[] = { GPIOE_0 }; + +/* pwm_ao_c */ +static const unsigned int pwm_ao_c_4_pins[] = { GPIOAO_4 }; +static const unsigned int pwm_ao_c_hiz_pins[] = { GPIOAO_4 }; +static const unsigned int pwm_ao_c_6_pins[] = { GPIOAO_6 }; + +/* pwm_ao_d */ +static const unsigned int pwm_ao_d_5_pins[] = { GPIOAO_5 }; +static const unsigned int pwm_ao_d_10_pins[] = { GPIOAO_10 }; +static const unsigned int pwm_ao_d_e_pins[] = { GPIOE_1 }; + +/* jtag_a */ +static const unsigned int jtag_a_tdi_pins[] = { GPIOAO_8 }; +static const unsigned int jtag_a_tdo_pins[] = { GPIOAO_9 }; +static const unsigned int jtag_a_clk_pins[] = { GPIOAO_6 }; +static const unsigned int jtag_a_tms_pins[] = { GPIOAO_7 }; + +/* cec_ao */ +static const unsigned int cec_ao_a_pins[] = { GPIOAO_10 }; +static const unsigned int cec_ao_b_pins[] = { GPIOAO_10 }; + +/* tsin_ao_a */ +static const unsigned int tsin_ao_asop_pins[] = { GPIOAO_6 }; +static const unsigned int tsin_ao_adin0_pins[] = { GPIOAO_7 }; +static const unsigned int tsin_ao_aclk_pins[] = { GPIOAO_8 }; +static const unsigned int tsin_ao_a_valid_pins[] = { GPIOAO_9 }; + +/* spdif_ao_out */ +static const unsigned int spdif_ao_out_pins[] = { GPIOAO_10 }; + +/* tdm_ao_b */ +static const unsigned int tdm_ao_b_slv_fs_pins[] = { GPIOAO_7 }; +static const unsigned int tdm_ao_b_slv_sclk_pins[] = { GPIOAO_8 }; +static const unsigned int tdm_ao_b_fs_pins[] = { GPIOAO_7 }; +static const unsigned int tdm_ao_b_sclk_pins[] = { GPIOAO_8 }; +static const unsigned int tdm_ao_b_din0_pins[] = { GPIOAO_4 }; +static const unsigned int tdm_ao_b_din1_pins[] = { GPIOAO_10 }; +static const unsigned int tdm_ao_b_din2_pins[] = { GPIOAO_6 }; +static const unsigned int tdm_ao_b_dout0_pins[] = { GPIOAO_4 }; +static const unsigned int tdm_ao_b_dout1_pins[] = { GPIOAO_10 }; +static const unsigned int tdm_ao_b_dout2_pins[] = { GPIOAO_6 }; + +/* mclk0_ao */ +static const unsigned int mclk0_ao_pins[] = { GPIOAO_9 }; + +static struct meson_pmx_group meson_g12a_aobus_groups[] = { + GPIO_GROUP(GPIOAO_0, 0), + GPIO_GROUP(GPIOAO_1, 0), + GPIO_GROUP(GPIOAO_2, 0), + GPIO_GROUP(GPIOAO_3, 0), + GPIO_GROUP(GPIOAO_4, 0), + GPIO_GROUP(GPIOAO_5, 0), + GPIO_GROUP(GPIOAO_6, 0), + GPIO_GROUP(GPIOAO_7, 0), + GPIO_GROUP(GPIOAO_8, 0), + GPIO_GROUP(GPIOAO_9, 0), + GPIO_GROUP(GPIOAO_10, 0), + GPIO_GROUP(GPIOAO_11, 0), + GPIO_GROUP(GPIOE_0, 0), + GPIO_GROUP(GPIOE_1, 0), + GPIO_GROUP(GPIOE_2, 0), + + /* bank AO */ + GROUP(uart_ao_a_tx, 1), + GROUP(uart_ao_a_rx, 1), + GROUP(uart_ao_a_cts, 1), + GROUP(uart_ao_a_rts, 1), + GROUP(uart_ao_b_tx_2, 2), + GROUP(uart_ao_b_rx_3, 2), + GROUP(uart_ao_b_tx_8, 3), + GROUP(uart_ao_b_rx_9, 3), + GROUP(uart_ao_b_cts, 2), + GROUP(uart_ao_b_rts, 2), + GROUP(i2c_ao_sck, 1), + GROUP(i2c_ao_sda, 1), + GROUP(i2c_ao_sck_e, 4), + GROUP(i2c_ao_sda_e, 4), + GROUP(i2c_ao_slave_sck, 3), + GROUP(i2c_ao_slave_sda, 3), + GROUP(remote_ao_input, 1), + GROUP(remote_ao_out, 1), + GROUP(pwm_ao_a, 3), + GROUP(pwm_ao_a_hiz, 2), + GROUP(pwm_ao_b, 3), + GROUP(pwm_ao_c_4, 3), + GROUP(pwm_ao_c_hiz, 4), + GROUP(pwm_ao_c_6, 3), + GROUP(pwm_ao_d_5, 3), + GROUP(pwm_ao_d_10, 3), + GROUP(pwm_ao_d_e, 3), + GROUP(jtag_a_tdi, 1), + GROUP(jtag_a_tdo, 1), + GROUP(jtag_a_clk, 1), + GROUP(jtag_a_tms, 1), + GROUP(cec_ao_a, 1), + GROUP(cec_ao_b, 2), + GROUP(tsin_ao_asop, 4), + GROUP(tsin_ao_adin0, 4), + GROUP(tsin_ao_aclk, 4), + GROUP(tsin_ao_a_valid, 4), + GROUP(spdif_ao_out, 4), + GROUP(tdm_ao_b_dout0, 5), + GROUP(tdm_ao_b_dout1, 5), + GROUP(tdm_ao_b_dout2, 5), + GROUP(tdm_ao_b_fs, 5), + GROUP(tdm_ao_b_sclk, 5), + GROUP(tdm_ao_b_din0, 6), + GROUP(tdm_ao_b_din1, 6), + GROUP(tdm_ao_b_din2, 6), + GROUP(tdm_ao_b_slv_fs, 6), + GROUP(tdm_ao_b_slv_sclk, 6), + GROUP(mclk0_ao, 5), +}; + +static const char * const gpio_periphs_groups[] = { + "GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4", + "GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9", + "GPIOZ_10", "GPIOZ_11", "GPIOZ_12", "GPIOZ_13", "GPIOZ_14", + "GPIOZ_15", + + "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4", + "GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", + + "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4", + "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9", + "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14", + "BOOT_15", + + "GPIOC_0", "GPIOC_1", "GPIOC_2", "GPIOC_3", "GPIOC_4", + "GPIOC_5", "GPIOC_6", "GPIOC_7", + + "GPIOA_0", "GPIOA_1", "GPIOA_2", "GPIOA_3", "GPIOA_4", + "GPIOA_5", "GPIOA_6", "GPIOA_7", "GPIOA_8", "GPIOA_9", + "GPIOA_10", "GPIOA_11", "GPIOA_12", "GPIOA_13", "GPIOA_14", + "GPIOA_15", + + "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4", + "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9", + "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14", + "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19", +}; + +static const char * const emmc_groups[] = { + "emmc_nand_d0", "emmc_nand_d1", "emmc_nand_d2", + "emmc_nand_d3", "emmc_nand_d4", "emmc_nand_d5", + "emmc_nand_d6", "emmc_nand_d7", + "emmc_clk", "emmc_cmd", "emmc_nand_ds", +}; + +static const char * const nand_groups[] = { + "emmc_nand_d0", "emmc_nand_d1", "emmc_nand_d2", + "emmc_nand_d3", "emmc_nand_d4", "emmc_nand_d5", + "emmc_nand_d6", "emmc_nand_d7", + "nand_ce0", "nand_ale", "nand_cle", + "nand_wen_clk", "nand_ren_wr", "nand_rb0", + "emmc_nand_ds", "nand_ce1", +}; + +static const char * const nor_groups[] = { + "nor_d", "nor_q", "nor_c", "nor_cs", + "nor_hold", "nor_wp", +}; + +static const char * const sdio_groups[] = { + "sdio_d0", "sdio_d1", "sdio_d2", "sdio_d3", + "sdio_cmd", "sdio_clk", "sdio_dummy", +}; + +static const char * const sdcard_groups[] = { + "sdcard_d0_c", "sdcard_d1_c", "sdcard_d2_c", "sdcard_d3_c", + "sdcard_clk_c", "sdcard_cmd_c", + "sdcard_d0_z", "sdcard_d1_z", "sdcard_d2_z", "sdcard_d3_z", + "sdcard_clk_z", "sdcard_cmd_z", +}; + +static const char * const spi0_groups[] = { + "spi0_mosi_c", "spi0_miso_c", "spi0_ss0_c", "spi0_clk_c", + "spi0_mosi_x", "spi0_miso_x", "spi0_ss0_x", "spi0_clk_x", +}; + +static const char * const spi1_groups[] = { + "spi1_mosi", "spi1_miso", "spi1_ss0", "spi1_clk", +}; + +static const char * const i2c0_groups[] = { + "i2c0_sda_c", "i2c0_sck_c", + "i2c0_sda_z0", "i2c0_sck_z1", + "i2c0_sda_z7", "i2c0_sck_z8", +}; + +static const char * const i2c1_groups[] = { + "i2c1_sda_x", "i2c1_sck_x", + "i2c1_sda_h2", "i2c1_sck_h3", + "i2c1_sda_h6", "i2c1_sck_h7", +}; + +static const char * const i2c2_groups[] = { + "i2c2_sda_x", "i2c2_sck_x", + "i2c2_sda_z", "i2c2_sck_z", +}; + +static const char * const i2c3_groups[] = { + "i2c3_sda_h", "i2c3_sck_h", + "i2c3_sda_a", "i2c3_sck_a", +}; + +static const char * const uart_a_groups[] = { + "uart_a_tx", "uart_a_rx", "uart_a_cts", "uart_a_rts", +}; + +static const char * const uart_b_groups[] = { + "uart_b_tx", "uart_b_rx", +}; + +static const char * const uart_c_groups[] = { + "uart_c_tx", "uart_c_rx", "uart_c_cts", "uart_c_rts", +}; + +static const char * const uart_ao_a_c_groups[] = { + "uart_ao_a_rx_c", "uart_ao_a_tx_c", +}; + +static const char * const iso7816_groups[] = { + "iso7816_clk_c", "iso7816_data_c", + "iso7816_clk_x", "iso7816_data_x", + "iso7816_clk_h", "iso7816_data_h", + "iso7816_clk_z", "iso7816_data_z", +}; + +static const char * const eth_groups[] = { + "eth_rxd2_rgmii", "eth_rxd3_rgmii", "eth_rgmii_tx_clk", + "eth_txd2_rgmii", "eth_txd3_rgmii", "eth_rgmii_rx_clk", + "eth_txd0", "eth_txd1", "eth_txen", "eth_mdc", + "eth_rxd0", "eth_rxd1", "eth_rx_dv", "eth_mdio", + "eth_link_led", "eth_act_led", +}; + +static const char * const pwm_a_groups[] = { + "pwm_a", +}; + +static const char * const pwm_b_groups[] = { + "pwm_b_x7", "pwm_b_x19", +}; + +static const char * const pwm_c_groups[] = { + "pwm_c_c", "pwm_c_x5", "pwm_c_x8", +}; + +static const char * const pwm_d_groups[] = { + "pwm_d_x3", "pwm_d_x6", +}; + +static const char * const pwm_e_groups[] = { + "pwm_e", +}; + +static const char * const pwm_f_groups[] = { + "pwm_f_x", "pwm_f_h", +}; + +static const char * const cec_ao_a_h_groups[] = { + "cec_ao_a_h", +}; + +static const char * const cec_ao_b_h_groups[] = { + "cec_ao_b_h", +}; + +static const char * const jtag_b_groups[] = { + "jtag_b_tdi", "jtag_b_tdo", "jtag_b_clk", "jtag_b_tms", +}; + +static const char * const bt565_a_groups[] = { + "bt565_a_vs", "bt565_a_hs", "bt565_a_clk", + "bt565_a_din0", "bt565_a_din1", "bt565_a_din2", + "bt565_a_din3", "bt565_a_din4", "bt565_a_din5", + "bt565_a_din6", "bt565_a_din7", +}; + +static const char * const tsin_a_groups[] = { + "tsin_a_valid", "tsin_a_sop", "tsin_a_din0", + "tsin_a_clk", +}; + +static const char * const tsin_b_groups[] = { + "tsin_b_valid_x", "tsin_b_sop_x", "tsin_b_din0_x", "tsin_b_clk_x", + "tsin_b_valid_z", "tsin_b_sop_z", "tsin_b_din0_z", "tsin_b_clk_z", + "tsin_b_fail", "tsin_b_din1", "tsin_b_din2", "tsin_b_din3", + "tsin_b_din4", "tsin_b_din5", "tsin_b_din6", "tsin_b_din7", +}; + +static const char * const hdmitx_groups[] = { + "hdmitx_sda", "hdmitx_sck", "hdmitx_hpd_in", +}; + +static const char * const pdm_groups[] = { + "pdm_din0_c", "pdm_din1_c", "pdm_din2_c", "pdm_din3_c", + "pdm_dclk_c", + "pdm_din0_x", "pdm_din1_x", "pdm_din2_x", "pdm_din3_x", + "pdm_dclk_x", + "pdm_din0_z", "pdm_din1_z", "pdm_din2_z", "pdm_din3_z", + "pdm_dclk_z", + "pdm_din0_a", "pdm_din1_a", "pdm_din2_a", "pdm_din3_a", + "pdm_dclk_a", +}; + +static const char * const spdif_in_groups[] = { + "spdif_in_h", "spdif_in_a10", "spdif_in_a12", +}; + +static const char * const spdif_out_groups[] = { + "spdif_out_h", "spdif_out_a11", "spdif_out_a13", +}; + +static const char * const mclk0_groups[] = { + "mclk0_a", +}; + +static const char * const mclk1_groups[] = { + "mclk1_x", "mclk1_z", "mclk1_a", +}; + +static const char * const tdm_a_groups[] = { + "tdm_a_slv_sclk", "tdm_a_slv_fs", "tdm_a_sclk", "tdm_a_fs", + "tdm_a_din0", "tdm_a_din1", "tdm_a_dout0", "tdm_a_dout1", +}; + +static const char * const tdm_b_groups[] = { + "tdm_b_slv_sclk", "tdm_b_slv_fs", "tdm_b_sclk", "tdm_b_fs", + "tdm_b_din0", "tdm_b_din1", "tdm_b_din2", + "tdm_b_din3_a", "tdm_b_din3_h", + "tdm_b_dout0", "tdm_b_dout1", "tdm_b_dout2", + "tdm_b_dout3_a", "tdm_b_dout3_h", +}; + +static const char * const tdm_c_groups[] = { + "tdm_c_slv_sclk_a", "tdm_c_slv_fs_a", + "tdm_c_slv_sclk_z", "tdm_c_slv_fs_z", + "tdm_c_sclk_a", "tdm_c_fs_a", + "tdm_c_sclk_z", "tdm_c_fs_z", + "tdm_c_din0_a", "tdm_c_din1_a", + "tdm_c_din2_a", "tdm_c_din3_a", + "tdm_c_din0_z", "tdm_c_din1_z", + "tdm_c_din2_z", "tdm_c_din3_z", + "tdm_c_dout0_a", "tdm_c_dout1_a", + "tdm_c_dout2_a", "tdm_c_dout3_a", + "tdm_c_dout0_z", "tdm_c_dout1_z", + "tdm_c_dout2_z", "tdm_c_dout3_z", +}; + +static const char * const gpio_aobus_groups[] = { + "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4", + "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9", + "GPIOAO_10", "GPIOAO_11", "GPIOE_0", "GPIOE_1", "GPIOE_2", +}; + +static const char * const uart_ao_a_groups[] = { + "uart_ao_a_tx", "uart_ao_a_rx", + "uart_ao_a_cts", "uart_ao_a_rts", +}; + +static const char * const uart_ao_b_groups[] = { + "uart_ao_b_tx_2", "uart_ao_b_rx_3", + "uart_ao_b_tx_8", "uart_ao_b_rx_9", + "uart_ao_b_cts", "uart_ao_b_rts", +}; + +static const char * const i2c_ao_groups[] = { + "i2c_ao_sck", "i2c_ao_sda", + "i2c_ao_sck_e", "i2c_ao_sda_e", +}; + +static const char * const i2c_ao_slave_groups[] = { + "i2c_ao_slave_sck", "i2c_ao_slave_sda", +}; + +static const char * const remote_ao_input_groups[] = { + "remote_ao_input", +}; + +static const char * const remote_ao_out_groups[] = { + "remote_ao_out", +}; + +static const char * const pwm_ao_a_groups[] = { + "pwm_ao_a", "pwm_ao_a_hiz", +}; + +static const char * const pwm_ao_b_groups[] = { + "pwm_ao_b", +}; + +static const char * const pwm_ao_c_groups[] = { + "pwm_ao_c_4", "pwm_ao_c_hiz", + "pwm_ao_c_6", +}; + +static const char * const pwm_ao_d_groups[] = { + "pwm_ao_d_5", "pwm_ao_d_10", "pwm_ao_d_e", +}; + +static const char * const jtag_a_groups[] = { + "jtag_a_tdi", "jtag_a_tdo", "jtag_a_clk", "jtag_a_tms", +}; + +static const char * const cec_ao_a_groups[] = { + "cec_ao_a", +}; + +static const char * const cec_ao_b_groups[] = { + "cec_ao_b", +}; + +static const char * const tsin_ao_a_groups[] = { + "tsin_ao_asop", "tsin_ao_adin0", "tsin_ao_aclk", "tsin_ao_a_valid", +}; + +static const char * const spdif_ao_out_groups[] = { + "spdif_ao_out", +}; + +static const char * const tdm_ao_b_groups[] = { + "tdm_ao_b_dout0", "tdm_ao_b_dout1", "tdm_ao_b_dout2", + "tdm_ao_b_fs", "tdm_ao_b_sclk", + "tdm_ao_b_din0", "tdm_ao_b_din1", "tdm_ao_b_din2", + "tdm_ao_b_slv_fs", "tdm_ao_b_slv_sclk", +}; + +static const char * const mclk0_ao_groups[] = { + "mclk0_ao", +}; + +static struct meson_pmx_func meson_g12a_periphs_functions[] = { + FUNCTION(gpio_periphs), + FUNCTION(emmc), + FUNCTION(nor), + FUNCTION(spi0), + FUNCTION(spi1), + FUNCTION(sdio), + FUNCTION(nand), + FUNCTION(sdcard), + FUNCTION(i2c0), + FUNCTION(i2c1), + FUNCTION(i2c2), + FUNCTION(i2c3), + FUNCTION(uart_a), + FUNCTION(uart_b), + FUNCTION(uart_c), + FUNCTION(uart_ao_a_c), + FUNCTION(iso7816), + FUNCTION(eth), + FUNCTION(pwm_a), + FUNCTION(pwm_b), + FUNCTION(pwm_c), + FUNCTION(pwm_d), + FUNCTION(pwm_e), + FUNCTION(pwm_f), + FUNCTION(cec_ao_a_h), + FUNCTION(cec_ao_b_h), + FUNCTION(jtag_b), + FUNCTION(bt565_a), + FUNCTION(tsin_a), + FUNCTION(tsin_b), + FUNCTION(hdmitx), + FUNCTION(pdm), + FUNCTION(spdif_out), + FUNCTION(spdif_in), + FUNCTION(mclk0), + FUNCTION(mclk1), + FUNCTION(tdm_a), + FUNCTION(tdm_b), + FUNCTION(tdm_c), +}; + +static struct meson_pmx_func meson_g12a_aobus_functions[] = { + FUNCTION(gpio_aobus), + FUNCTION(uart_ao_a), + FUNCTION(uart_ao_b), + FUNCTION(i2c_ao), + FUNCTION(i2c_ao_slave), + FUNCTION(remote_ao_input), + FUNCTION(remote_ao_out), + FUNCTION(pwm_ao_a), + FUNCTION(pwm_ao_b), + FUNCTION(pwm_ao_c), + FUNCTION(pwm_ao_d), + FUNCTION(jtag_a), + FUNCTION(cec_ao_a), + FUNCTION(cec_ao_b), + FUNCTION(tsin_ao_a), + FUNCTION(spdif_ao_out), + FUNCTION(tdm_ao_b), + FUNCTION(mclk0_ao), +}; + +static struct meson_bank meson_g12a_periphs_banks[] = { + /* name first last pullen pull dir out in */ + BANK("Z", PIN(GPIOZ_0, EE_OFF), PIN(GPIOZ_15, EE_OFF), 4, 0, 4, 0, 12, 0, 13, 0, 14, 0), + BANK("H", PIN(GPIOH_0, EE_OFF), PIN(GPIOH_8, EE_OFF), 3, 0, 3, 0, 9, 0, 10, 0, 11, 0), + BANK("BOOT", PIN(BOOT_0, EE_OFF), PIN(BOOT_15, EE_OFF), 0, 0, 0, 0, 0, 0, 1, 0, 2, 0), + BANK("C", PIN(GPIOC_0, EE_OFF), PIN(GPIOC_7, EE_OFF), 1, 0, 1, 0, 3, 0, 4, 0, 5, 0), + BANK("A", PIN(GPIOA_0, EE_OFF), PIN(GPIOA_15, EE_OFF), 5, 0, 5, 0, 16, 0, 17, 0, 18, 0), + BANK("X", PIN(GPIOX_0, EE_OFF), PIN(GPIOX_19, EE_OFF), 2, 0, 2, 0, 6, 0, 7, 0, 8, 0), +}; + +static struct meson_bank meson_g12a_aobus_banks[] = { + /* name first last pullen pull dir out in */ + BANK("AO", PIN(GPIOAO_0, 0), PIN(GPIOAO_11, 0), 3, 0, 2, 0, 0, 0, 4, 0, 1, 0), + BANK("E", PIN(GPIOE_0, 0), PIN(GPIOE_2, 0), 3, 16, 2, 16, 0, 16, 4, 16, 1, 16), +}; + +static struct meson_pmx_bank meson_g12a_periphs_pmx_banks[] = { + /* name first last reg offset */ + BANK_PMX("Z", PIN(GPIOZ_0, EE_OFF), PIN(GPIOZ_15, EE_OFF), 0x6, 0), + BANK_PMX("H", PIN(GPIOH_0, EE_OFF), PIN(GPIOH_8, EE_OFF), 0xb, 0), + BANK_PMX("BOOT", PIN(BOOT_0, EE_OFF), PIN(BOOT_15, EE_OFF), 0x0, 0), + BANK_PMX("C", PIN(GPIOC_0, EE_OFF), PIN(GPIOC_7, EE_OFF), 0x9, 0), + BANK_PMX("A", PIN(GPIOA_0, EE_OFF), PIN(GPIOA_15, EE_OFF), 0xd, 0), + BANK_PMX("X", PIN(GPIOX_0, EE_OFF), PIN(GPIOX_19, EE_OFF), 0x3, 0), +}; + +static struct meson_axg_pmx_data meson_g12a_periphs_pmx_banks_data = { + .pmx_banks = meson_g12a_periphs_pmx_banks, + .num_pmx_banks = ARRAY_SIZE(meson_g12a_periphs_pmx_banks), +}; + +static struct meson_pmx_bank meson_g12a_aobus_pmx_banks[] = { + BANK_PMX("AO", GPIOAO_0, GPIOAO_11, 0x0, 0), + BANK_PMX("E", GPIOE_0, GPIOE_2, 0x1, 16), +}; + +static struct meson_axg_pmx_data meson_g12a_aobus_pmx_banks_data = { + .pmx_banks = meson_g12a_aobus_pmx_banks, + .num_pmx_banks = ARRAY_SIZE(meson_g12a_aobus_pmx_banks), +}; + +static struct meson_pinctrl_data meson_g12a_periphs_pinctrl_data = { + .name = "periphs-banks", + .pin_base = EE_OFF, + .groups = meson_g12a_periphs_groups, + .funcs = meson_g12a_periphs_functions, + .banks = meson_g12a_periphs_banks, + .num_pins = 85, + .num_groups = ARRAY_SIZE(meson_g12a_periphs_groups), + .num_funcs = ARRAY_SIZE(meson_g12a_periphs_functions), + .num_banks = ARRAY_SIZE(meson_g12a_periphs_banks), + .gpio_driver = &meson_axg_gpio_driver, + .pmx_data = &meson_g12a_periphs_pmx_banks_data, +}; + +static struct meson_pinctrl_data meson_g12a_aobus_pinctrl_data = { + .name = "aobus-banks", + .pin_base = 0, + .groups = meson_g12a_aobus_groups, + .funcs = meson_g12a_aobus_functions, + .banks = meson_g12a_aobus_banks, + .num_pins = 15, + .num_groups = ARRAY_SIZE(meson_g12a_aobus_groups), + .num_funcs = ARRAY_SIZE(meson_g12a_aobus_functions), + .num_banks = ARRAY_SIZE(meson_g12a_aobus_banks), + .gpio_driver = &meson_axg_gpio_driver, + .pmx_data = &meson_g12a_aobus_pmx_banks_data, +}; + +static const struct udevice_id meson_g12a_pinctrl_match[] = { + { + .compatible = "amlogic,meson-g12a-periphs-pinctrl", + .data = (ulong)&meson_g12a_periphs_pinctrl_data, + }, + { + .compatible = "amlogic,meson-g12a-aobus-pinctrl", + .data = (ulong)&meson_g12a_aobus_pinctrl_data, + }, + { }, +}; + +U_BOOT_DRIVER(meson_axg_pinctrl) = { + .name = "meson-g12a-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = of_match_ptr(meson_g12a_pinctrl_match), + .probe = meson_pinctrl_probe, + .priv_auto_alloc_size = sizeof(struct meson_pinctrl), + .ops = &meson_axg_pinctrl_ops, +}; diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c index fa3d78858a..8735418c5b 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c @@ -314,11 +314,11 @@ int meson_pinctrl_probe(struct udevice *dev) priv->reg_gpio = (void __iomem *)addr; addr = parse_address(gpio, "pull", na, ns); - if (addr == FDT_ADDR_T_NONE) { - debug("pull address not found\n"); - return -EINVAL; - } - priv->reg_pull = (void __iomem *)addr; + /* Use gpio region if pull one is not present */ + if (addr == FDT_ADDR_T_NONE) + priv->reg_pull = priv->reg_gpio; + else + priv->reg_pull = (void __iomem *)addr; addr = parse_address(gpio, "pull-enable", na, ns); /* Use pull region if pull-enable one is not present */ @@ -327,6 +327,13 @@ int meson_pinctrl_probe(struct udevice *dev) else priv->reg_pullen = (void __iomem *)addr; + addr = parse_address(gpio, "ds", na, ns); + /* Drive strength region is optional */ + if (addr == FDT_ADDR_T_NONE) + priv->reg_ds = NULL; + else + priv->reg_ds = (void __iomem *)addr; + priv->data = (struct meson_pinctrl_data *)dev_get_driver_data(dev); /* Lookup GPIO driver */ diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h index 28085a7495..b3683e2073 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.h +++ b/drivers/pinctrl/meson/pinctrl-meson.h @@ -41,6 +41,7 @@ struct meson_pinctrl { void __iomem *reg_gpio; void __iomem *reg_pull; void __iomem *reg_pullen; + void __iomem *reg_ds; }; /** diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c index 24affe0414..43dbdd9d6a 100644 --- a/drivers/pinctrl/pinctrl_stm32.c +++ b/drivers/pinctrl/pinctrl_stm32.c @@ -421,6 +421,7 @@ static const struct udevice_id stm32_pinctrl_ids[] = { { .compatible = "st,stm32f429-pinctrl" }, { .compatible = "st,stm32f469-pinctrl" }, { .compatible = "st,stm32f746-pinctrl" }, + { .compatible = "st,stm32f769-pinctrl" }, { .compatible = "st,stm32h743-pinctrl" }, { .compatible = "st,stm32mp157-pinctrl" }, { .compatible = "st,stm32mp157-z-pinctrl" }, diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c index 92f04695ec..31aa4d41e8 100644 --- a/drivers/reset/reset-meson.c +++ b/drivers/reset/reset-meson.c @@ -69,6 +69,7 @@ struct reset_ops meson_reset_ops = { static const struct udevice_id meson_reset_ids[] = { { .compatible = "amlogic,meson-gxbb-reset" }, + { .compatible = "amlogic,meson-axg-reset" }, { } }; diff --git a/drivers/timer/sandbox_timer.c b/drivers/timer/sandbox_timer.c index 6d2b045fe8..5228486082 100644 --- a/drivers/timer/sandbox_timer.c +++ b/drivers/timer/sandbox_timer.c @@ -14,7 +14,7 @@ /* system timer offset in ms */ static unsigned long sandbox_timer_offset; -void sandbox_timer_add_offset(unsigned long offset) +void timer_test_add_offset(unsigned long offset) { sandbox_timer_offset += offset; } |