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-rw-r--r--drivers/ddr/fsl/ctrl_regs.c2
-rw-r--r--drivers/ddr/fsl/mpc85xx_ddr_gen1.c2
-rw-r--r--drivers/input/keyboard.c2
3 files changed, 3 insertions, 3 deletions
diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c
index 24fd36602d..b2e92a0b44 100644
--- a/drivers/ddr/fsl/ctrl_regs.c
+++ b/drivers/ddr/fsl/ctrl_regs.c
@@ -1831,7 +1831,7 @@ static void set_ddr_sdram_clk_cntl(fsl_ddr_cfg_regs_t *ddr,
unsigned int clk_adjust; /* Clock adjust */
unsigned int ss_en = 0; /* Source synchronous enable */
-#if defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+#if defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_MPC8555)
/* Per FSL Application Note: AN2805 */
ss_en = 1;
#endif
diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c
index c27288dda2..67a9ad8bf8 100644
--- a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c
+++ b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c
@@ -47,7 +47,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
out_be32(&ddr->timing_cfg_2, regs->timing_cfg_2);
out_be32(&ddr->sdram_mode, regs->ddr_sdram_mode);
out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval);
-#if defined(CONFIG_MPC8555) || defined(CONFIG_MPC8541)
+#if defined(CONFIG_MPC8555) || defined(CONFIG_ARCH_MPC8541)
out_be32(&ddr->sdram_clk_cntl, regs->ddr_sdram_clk_cntl);
#endif
diff --git a/drivers/input/keyboard.c b/drivers/input/keyboard.c
index 522b02fa0a..f53a07afcc 100644
--- a/drivers/input/keyboard.c
+++ b/drivers/input/keyboard.c
@@ -21,7 +21,7 @@ static struct input_config config;
static int kbd_read_keys(struct input_config *config)
{
#if defined(CONFIG_MPC5xxx) || defined(CONFIG_ARCH_MPC8540) || \
- defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+ defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_MPC8555)
/* no ISR is used, so received chars must be polled */
ps2ser_check();
#endif