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Diffstat (limited to 'include/configs/taurus.h')
-rw-r--r--include/configs/taurus.h32
1 files changed, 2 insertions, 30 deletions
diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index 77d80bfc98..4758e23f55 100644
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -49,8 +49,8 @@
* leaving the correct space for initial global data structure above
* that address while providing maximum stack area below.
*/
-#define CONFIG_SYS_INIT_SP_ADDR \
- (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
+#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1
/* NAND flash */
#ifdef CONFIG_CMD_NAND
@@ -63,16 +63,7 @@
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
#endif
-/* USB */
#if defined(CONFIG_BOARD_TAURUS)
-#define CONFIG_USB_ATMEL
-#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
-#define CONFIG_USB_OHCI_NEW
-#define CONFIG_SYS_USB_OHCI_CPU_INIT
-#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
-#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
-#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
-
/* USB DFU support */
#define CONFIG_USB_GADGET_AT91
@@ -84,13 +75,8 @@
/* SPI EEPROM */
#define TAURUS_SPI_MASK (1 << 4)
-#if defined(CONFIG_SPL_BUILD)
-/* SPL related */
-#endif
-
/* bootstrap in spi flash , u-boot + env + linux in nandflash */
-#ifndef CONFIG_SPL_BUILD
#if defined(CONFIG_BOARD_AXM)
#define CONFIG_EXTRA_ENV_SETTINGS \
"addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
@@ -139,21 +125,10 @@
"stdout=serial\0" \
"upgrade_available=0\0"
#endif
-#endif /* #ifndef CONFIG_SPL_BUILD */
/* Defines for SPL */
-#define CONFIG_SPL_MAX_SIZE (31 * SZ_512)
-#define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K)
-#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
- CONFIG_SYS_MALLOC_LEN)
-#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
-
-#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
-#define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512)
#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
-#define CONFIG_SPL_NAND_RAW_ONLY
-#define CONFIG_SPL_NAND_SOFTECC
#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
@@ -172,7 +147,4 @@
#define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR)
#define CONFIG_SYS_AT91_PLLB 0x10193F05
-#define CONFIG_SPL_PAD_TO CONFIG_SYS_NAND_U_BOOT_OFFS
-#define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO
-
#endif