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-rw-r--r--include/mmc.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/include/mmc.h b/include/mmc.h
index df4255b828..9b9cbedadc 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -64,6 +64,7 @@
#define MMC_MODE_HS_52MHz MMC_CAP(MMC_HS_52)
#define MMC_MODE_DDR_52MHz MMC_CAP(MMC_DDR_52)
#define MMC_MODE_HS200 MMC_CAP(MMC_HS_200)
+#define MMC_MODE_HS400 MMC_CAP(MMC_HS_400)
#define MMC_MODE_8BIT BIT(30)
#define MMC_MODE_4BIT BIT(29)
@@ -248,6 +249,10 @@ static inline bool mmc_is_tuning_cmd(uint cmdidx)
/* SDR mode @1.2V I/O */
#define EXT_CSD_CARD_TYPE_HS200 (EXT_CSD_CARD_TYPE_HS200_1_8V | \
EXT_CSD_CARD_TYPE_HS200_1_2V)
+#define EXT_CSD_CARD_TYPE_HS400_1_8V BIT(6)
+#define EXT_CSD_CARD_TYPE_HS400_1_2V BIT(7)
+#define EXT_CSD_CARD_TYPE_HS400 (EXT_CSD_CARD_TYPE_HS400_1_8V | \
+ EXT_CSD_CARD_TYPE_HS400_1_2V)
#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
@@ -259,6 +264,7 @@ static inline bool mmc_is_tuning_cmd(uint cmdidx)
#define EXT_CSD_TIMING_LEGACY 0 /* no high speed */
#define EXT_CSD_TIMING_HS 1 /* HS */
#define EXT_CSD_TIMING_HS200 2 /* HS200 */
+#define EXT_CSD_TIMING_HS400 3 /* HS400 */
#define EXT_CSD_BOOT_ACK_ENABLE (1 << 6)
#define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3)
@@ -519,6 +525,7 @@ enum bus_mode {
UHS_DDR50,
UHS_SDR104,
MMC_HS_200,
+ MMC_HS_400,
MMC_MODES_END
};
@@ -533,6 +540,10 @@ static inline bool mmc_is_mode_ddr(enum bus_mode mode)
else if (mode == UHS_DDR50)
return true;
#endif
+#if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
+ else if (mode == MMC_HS_400)
+ return true;
+#endif
else
return false;
}