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2021-08-01sunxi: Select environment MMC based on boot deviceSamuel Holland2-2/+15
Currently, the environment is always stored in eMMC if eMMC is enabled in the config. This means images written to SD and eMMC will cross- contaminate their environments unless the configuration is changed. By dropping the device number from the environment location string and implementing mmc_get_env_dev, we will always use the environment from the boot device when booting from SD/eMMC. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-07-28Merge branch '2021-07-28-setexpr-fmt-support'Tom Rini13-5/+949
- Add a new feature (and CONFIG option) to allow setexpr to take format (%d, etc) arguments.
2021-07-28AzureCI: Move i.MX8 builds to their own jobTom Rini1-1/+3
The aarch64 catch-all job is starting to get close to or exceed the time limit for jobs. Move the i.MX8 boards to their own job to fix this. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-28test: cmd: setexpr: add format string testsRoland Gaudig2-0/+85
Add test cases for the setexpr format string operator. Signed-off-by: Roland Gaudig <roland.gaudig@weidmueller.com> [trini: Enable on sandbox] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-27doc: usage: add description for setexpr commandRoland Gaudig3-0/+150
Add usage for the setexpr command. It has been added to describe mainly the new setexpr format string operation. Signed-off-by: Roland Gaudig <roland.gaudig@weidmueller.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-27cmd: setexpr: add format string handlingRoland Gaudig6-178/+300
Add format string handling operator to the setexpr command. It allows to use C or Bash like format string expressions to be evaluated with the result being stored inside the environment variable name. setexpr <name> fmt <format> [value]... The following example setexpr foo fmt "%d, 0x%x" 0x100 ff will result in $foo being set to "256, 0xff". Signed-off-by: Roland Gaudig <roland.gaudig@weidmueller.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-27cmd: printf: add helper functions from busyboxRoland Gaudig1-0/+121
Import the following helper functions from Busybox-1.33.1 which are required by printf.c: process_escape_sequence from libbb/process_escape_sequence.c, skip_whitespace from libbb/skip_whitespace.c, overlapping_strcpy from libbb/safe_strncpy.c src-url: https://git.busybox.net/busybox/ commit bcc5b0e6caca6c7602a6a41f "Bump version to 1.33.1" version: 1.33.1 Signed-off-by: Roland Gaudig <roland.gaudig@weidmueller.com>
2021-07-27cmd: printf: import busybox-1.33.1 printf.cRoland Gaudig1-0/+455
Import printf.c from the Busybox project, which provides Bash like format string handling. src-url: https://git.busybox.net/busybox/ commit bcc5b0e6caca6c7602a6a41f "Bump version to 1.33.1" version: 1.33.1 Signed-off-by: Roland Gaudig <roland.gaudig@weidmueller.com>
2021-07-27lib: strto: add simple_strtoll functionRoland Gaudig2-0/+9
Add simple_strtoll function for converting a string containing digits into a long long int value. Signed-off-by: Roland Gaudig <roland.gaudig@weidmueller.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-27Merge tag 'u-boot-amlogic-20210727' of ↵Tom Rini12-7/+113
https://source.denx.de/u-boot/custodians/u-boot-amlogic - Add SMBIOS info for Khadas VIM boards - Fix meson-axg-mipi PHY build - Fix VIM3 board phy-names property setup - Return correct value for non emmc boot sources on VIM3 - add kernel compression vars
2021-07-27Merge tag 'u-boot-stm32-20210727' of ↵Tom Rini14-9/+310
https://source.denx.de/u-boot/custodians/u-boot-stm - FIP Enable OP-TEE and TZC support in SPL for STM32MP15 SoC - Add stm32mp15 missing SPI clock support - Manage pull-up on gpio button STM32MP15 boards - Correct STM32MP15 boot when TAMPER registers are invalid - Fix EMMC pinmux on STM32MP15 Avenger96 board
2021-07-27configs: Enable SMBIOS for Khadas VIM boardsArtem Lapkin4-0/+8
Enable configs to support SMBIOS for all Khadas VIM boards Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Artem Lapkin <art@khadas.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-07-27ARM: dts: meson: Use devicetree for SMBIOS settings for Khadas VIM boardsArtem Lapkin4-0/+90
Khadas vim series: Use devicetree for SMBIOS settings Add settings and enable the default sysinfo driver so that these can come from the device tree. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Artem Lapkin <art@khadas.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-07-27phy: meson-axg-mipi: Access parent ofnode through dev_ofnode()Alper Nebi Yasak1-1/+1
With commit 84a42ae36683 ("dm: core: Rename device node to indicate it is private") and commit f10643cf8a4c ("dm: core: Access device ofnode through functions") accesses to the "node" member were replaced with dev_ofnode(). Also apply that replacement here. Fixes: 4547551aa019 ("phy: Add Amlogic AXG MIPI PCIe Analog PHY driver") Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-07-27phy: meson-axg-mipi: Rename "priv_auto_alloc_size" to "priv_auto"Alper Nebi Yasak2-2/+2
With commit 41575d8e4c33 ("dm: treewide: Rename auto_alloc_size members to be shorter") "priv_auto_alloc_size" was renamed to "priv_auto". Apply the rename to these two drivers as well. Fixes: 4547551aa019 ("phy: Add Amlogic AXG MIPI PCIe Analog PHY driver") Fixes: 7ef19503bacf ("phy: Add Amlogic AXG MIPI D-PHY driver") Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-07-27board: amlogic: vim3: fix phy-names property setupArtem Lapkin1-2/+2
phy-names was improperly implemented resulting in an inoperable USB-OTG port. - phy-names = "usb2-phy0\0\0usb2-phy1\0"; + phy-names = "usb2-phy0\0usb2-phy1"; Signed-off-by: Artem Lapkin <art@khadas.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-07-27VIM3: mmc_get_env_dev correct non emmc boot sourcesArtem Lapkin1-2/+8
need return -1 if boot source is not EMMC or SD ( for example it will be useful if we have multy env sources configuration and device was booted from SPI flash and env need read from SPI not from mmc ) Signed-off-by: Artem Lapkin <art@khadas.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-07-27meson64: add kernel compression varsArtem Lapkin1-0/+2
make possible to load simple compressed linux kernel for meson64 Signed-off-by: Artem Lapkin <art@khadas.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-07-27ARM: dts: stm32mp: Add OP-TEE reserved memory to SPL dtbAlexandru Gagniuc1-0/+3
Add the "/reserved-memory/optee" node to the SPL devicetree. The purpose is to allow configuring TZC regions when booting OP-TEE. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-27stm32mp1: spl: Configure TrustZone controller for OP-TEEAlexandru Gagniuc1-0/+92
OP-TEE is very particular about how the TZC should be configured. When booting an OP-TEE payload, an incorrect TZC configuration will result in a panic. Most information can be derived from the SPL devicetree. The only information we don't have is the split between TZDRAM and shared memory. This has to be hardcoded. The rest of the configuration is fairly easy, and only requires 3 TZC regions. Configure them. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-07-27arm: stm32mp: Implement support for TZC 400 controllerAlexandru Gagniuc3-0/+170
The purpose of this change is to allow configuring TrustZone (TZC) memory permissions. For example, OP-TEE expects TZC regions to be configured in a very particular way. The API presented here is intended to allow exactly that. UCLASS support is not implemented, because it would not be too useful. Changing TZC permissions needs to be done with care, so as not to cut off access to memory we are currently using. One place where we can use this is at the end of SPL, right before jumping to OP-TEE. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-27spl: Introduce spl_board_prepare_for_optee() hookAlexandru Gagniuc2-0/+19
OP-TEE requires some particular setup, which is not needed for linux or other payloads. Add a hook for platform-specific code to perform any OP-TEE related configuration and initialization. A weak function is used because it is symmetrical to other spl_board_prepare_for_*() implementations. A solution to avoid the use of weak functions would trivially apply to all these implementations. However, re-designing this is beyond the scope of this patch. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-27spl: mmc: Support OP-TEE payloads in Falcon modeAlexandru Gagniuc1-2/+2
In general, Falcon mode means we're booting a linux kernel directly. With FIT images, however, an OP-TEE secure kernel can be booted before linux. Thus, if the next stage is an IH_OS_TEE, this isn't necessarily a problem. Of course, a general solution would involve mmc_load_image_raw_os() only loading the binary, and leaving the decision of suitability to someone else. However, a rework of the boot flow is beyond the scope of this patch. Accept IH_OS_TEE as a valid OS value. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-27ARM: dts: stm32: Fix AV96 eMMC pinmuxMarek Vasut2-2/+2
Commit 500327e2ea7 ("ARM: dts: stm32mp1: DT alignment with Linux kernel v5.8-rc1") renamed sdmmc2_d47_pins_b phandle to sdmmc2_d47_pins_c, but without updating the AV96 DT which uses that phandle. Linux missed similar update as well and it was only added in commit 1ad6e36ec266 ("ARM: dts: stm32: Fix sdmmc2 pins on AV96") . Update the AV96 DT pinmux phandle, otherwise eMMC 8bit mode does not work and access to eMMC takes a very long time to fall back to 4bit mode. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-27clk: stm32mp1: add support of missing SPI clocksPatrick Delaunay1-0/+13
Add the missing SPI clock even if these instances are not available on STMicroelectronics boards: SPI2_K, SPI3_K, SPI4_K, SPI6_K. With this patch, the SPI2 / SPI3 / SPI4 / SPI6 instances can be used on customer design without the clock driver error: stm32mp1_clk_get_id: clk id 131 not found Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-27stm32mp1: add pull-up for gpio button PA13 and PA14Patrick Delaunay3-4/+6
When a push-button is released and PA13/PA14 are defined as input (high-Z) the LED should not be active as the circuit is open but a small current leak through PCB or push-button close the circuit and allows a small LED bias giving erroneous level voltage. So it is recommended to activate an internal pull-up in order to clearly fix the voltage at PA13/PA14 when button is released and to wait a short delay before to read the GPIO value only when the pull-up is correctly configured. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-07-27arm: stm32mp1: force boot_device variable for invalid TAMP register valuePatrick Delaunay1-1/+3
When the TAMP register 20 have an invalid value (0x0 for example after TAMPER error) the "boot_device" U-Boot env variable have no value and no error is displayed in U-Boot log. The STM32MP boot command bootcmd_stm32mp failed with strange trace: "Boot over !" and the next command in bootcmd_stm32mp failed with few indication: if test ${boot_device} = serial || test ${boot_device} = usb; then stm32prog ${boot_device} ${boot_instance}; As it is difficult to investigate, the current patch avoids this issue: - change the debug message to error: "unexpected boot mode" is displayed - display trace "Boot over invalid!" in bootcmd_stm32mp - execute "run distro_bootcmd" to try all the possible target Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-07-27configs: Resync with savedefconfigTom Rini632-1222/+205
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-27Prepare v2021.10-rc1Tom Rini1-2/+2
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-26Merge tag 'xilinx-for-v2021.10-rc1' of ↵Tom Rini31-151/+950
https://source.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.10-rc1 xilinx: - Use default ENVL_NOWHERE configuration - Add support for handling compressed kernels zynqmp: - SPL malloc size extension - USB2.0 for zc1751 dc2 - Fix USB3.0 nodes - Handle lpd_lsbus clock - Cleanup macros around SYSRESET versal: - Remove PBSIZE macro zynq_sdhci: - Tap delay fixups net: - Add support for MRMAC
2021-07-26arm64: zynqmp: Move USB3 PHY properties from DWC3 node to USB nodeManish Narani13-30/+30
Move the PHY properties from DWC3 node to USB node in ZynqMP DTs as here the USB3 PHY used is PSGTR, which is connected to Xilinx USB core. This PHY initialization should be handled from Xilinx USB core as the prerequisite register configurations are done here only. Signed-off-by: Manish Narani <manish.narani@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26xilinx: Define kernel_comp_addr_r,kernel_comp_size env variablesRaju Kumar Pothuraju2-0/+4
Add kernel_comp_addr_r, kernel_comp_size env variables for zynqmp and versal to be able to use the compressed kernel Image(.gz,.bz2,.lzma,.lzo) using booti command. Signed-off-by: Raju Kumar Pothuraju <raju.kumar-pothuraju@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26arm64: versal: Drop default definitions of CONFIG_SYS_PBSIZEMichal Simek1-2/+0
It is default value which had been converted by commit 432e39806805 ("include/configs: drop default definitions of CONFIG_SYS_PBSIZE"). That's why also remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26arm64: zynqmp: Enable reset and poweroff via sysreset frameworkMichal Simek1-0/+3
reset and poweroff are called via hooks in psci driver which is going around sysreset framework that's why enable sysreset drivers and do reset and poweroff via this framework. Using this flow will allow us to call SYSTEM_WARM_RESET based on psci 1.1 spec which can be calles with reset -w command. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26arm64: zynqmp: Do not define do_reset() if sysreset is enabledMichal Simek1-0/+2
The SPL can also be compiled with sysreset drivers just fine, so update the condition to cater for that option. The same change was done by commit efa1a62ad2dd ("ARM: imx8m: Do not define do_reset() if sysreset is enabled"). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26psci: Do not define do_poweroff() if CONFIG_SYSRESET_CMD_POWEROFF is enabledMichal Simek1-1/+1
CONFIG_SYSRESET_CMD_POWEROFF defines do_poweroff() in sysreset-uclass.c that's why don't define it twice when both CONFIG_SYSRESET_CMD_POWEROFF and CONFIG_CMD_POWEROFF are enabled. CONFIG_SYSRESET_CMD_POWEROFF depends on CONFIG_CMD_POWEROFF. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26xilinx: versal: Enable Xilinx AXI MRMACAshok Reddy Soma1-0/+1
Enable Xilinx AXI MRMAC for Versal platforms. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26net: xilinx: axi_mrmac: Add MRMAC driverAshok Reddy Soma5-0/+778
Add support for xilinx multirate(MRMAC) ethernet driver. This driver uses multichannel DMA(MCDMA) for data transfers of MRMAC. Added support for 4 ports of MRMAC for speeds 10G and 25G. MCDMA supports upto 16 channels but in this driver we have setup only one channel which is enough. Tested 10G and 25G on all 4 ports. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26net: ethtool: Add ethernet speed macros for higher speedsAshok Reddy Soma1-0/+8
Add speed macro's for higher ethernet speeds to be used in u-boot networking drivers. Added Macros for speeds 14G, 20G, 25G, 40G, 50G, 56G, 100G and 200G inline with linux. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26clk: zynqmp: Add support for enabling clock on lpd_lsbusMichal Simek1-0/+1
lpd_lsbus is clock which is used by many IPs like dmas, gems, gpio, sdhcis, spis, ttcs, uarts, watchdog that's why make sense to also enable access to change this clock. For this clock you already get the rate. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26arm64: dts: zynqmp: Enable USB2.0 for zc1751-xm016-dc2Piyush Mehta1-2/+0
The board zynqmp-zc1751-xm016-dc2 support only USB2.0. This patch removes USB3.0 DT configuration for DC2 board. Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26xilinx: Return ENVL_NOWHERE instead of ENVL_UNKNOWNMike Looijmans2-6/+6
The system refuses to boot without any environment, so return ENVL_NOWHERE when there's nowhere to store the environment instead of ENVL_UNKNOWN. This fixes that the board won't boot from eMMC when CONFIG_ENV_IS_IN_FAT is not defined, for example. Similar for other combinations. Fixes: 1025bd098aa8 "xilinx: zynqmp: Add support for saving variables" Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26mmc: zynq_sdhci: Make variables/structure staticMichal Simek1-6/+10
All these variables/structure are local and should be static. Issues are reported by sparse: drivers/mmc/zynq_sdhci.c:49:11: warning: symbol 'zynqmp_iclk_phases' was not declared. Should it be static? drivers/mmc/zynq_sdhci.c:50:11: warning: symbol 'zynqmp_oclk_phases' was not declared. Should it be static? drivers/mmc/zynq_sdhci.c:53:11: warning: symbol 'versal_iclk_phases' was not declared. Should it be static? drivers/mmc/zynq_sdhci.c:54:11: warning: symbol 'versal_oclk_phases' was not declared. Should it be static? drivers/mmc/zynq_sdhci.c:546:24: warning: symbol 'arasan_ops' was not declared. Should it be static? Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-26mmc: zynq_sdhci: Fix kernel doc warningsMichal Simek1-12/+12
Fix these kernel doc warnings: drivers/mmc/zynq_sdhci.c:181: warning: contents before sections drivers/mmc/zynq_sdhci.c:236: warning: contents before sections drivers/mmc/zynq_sdhci.c:291: warning: contents before sections drivers/mmc/zynq_sdhci.c:297: warning: Function parameter or member 'degrees' not described in 'sdhci_versal_sdcardclk_set_phase' drivers/mmc/zynq_sdhci.c:354: warning: contents before sections drivers/mmc/zynq_sdhci.c:360: warning: Function parameter or member 'degrees' not described in 'sdhci_versal_sampleclk_set_phase' drivers/mmc/zynq_sdhci.c:467: warning: contents before sections Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-26mmc: zynq_sdhci: Split set_tapdelay function to in and outAshok Reddy Soma3-40/+50
Split arasan_zynqmp_set_tapdelay() to handle input and output tapdelays separately. This is required to handle zero values for ITAP and OTAP values. If we dont split, we will have to remove the if() in the function, which makes ITAP values to be overwritten when OTAP values are called to set and vice-versa. Restrict tap_delay value calculated to max allowed 8 bits for ITAP and 6 bits for OTAP for ZynqMP. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26mmc: zynq_sdhci: Use Mask writes for Tap delaysAshok Reddy Soma1-27/+31
Restrict tap_delay value to the allowed size(8bits for itap and 6 bits for otap) before writing to the tap delay register. Clear ITAP and OTAP delay bits before updating with the new tap value for Versal platform. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26mmc: zynq_sdhci: Allow configuring zero Tap valuesAshok Reddy Soma1-12/+4
Allow configuring ITAP and OTAP values with zero to avoid failures in some cases (one of them is SD boot mode). Legacy, SDR12 modes require to program the ITAP and OTAP values as zero, whereas for SDR50 and SDR104 modes ITAP value is zero. In SD boot mode firmware configures the SD ITAP and OTAP values and in this case u-boot has to re-configure required tap values(including zero) based on the operating mode. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26mmc: zynq_sdhci: Resolve uninitialized return valueAshok Reddy Soma1-12/+8
set_phase() functions are not modifying the ret value and returning the same uninitialized ret, return 0 instead. Keep the return type as int to return errors when the tapdelay's are set via xilinx_pm_request() in future. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26xilinx: zynqmp: increase CONFIG_SYS_SPL_MALLOC_SIZE to 16MBRicardo Salveti1-1/+1
commit 03f1f78a9b44 ("spl: fit: Prefer a malloc()'d buffer for loading images")' changed the way buffer allocation worked for SPL to a more flexible method. For xilinx zynqmp the 1MB buffer is not necessarily enough when dealing with complex fit images (e.g. containing FPGA/TF-A/OP-TEE/U-Boot proper), which can easily reach up to 10MB, so increase the default CONFIG_SYS_SPL_MALLOC_SIZE size to 16MB to cover more advanced scenarios. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-24Merge tag 'efi-2021-10-rc1-3' of ↵Tom Rini16-50/+1798
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2021-10-rc1-3 Documentation: provide Makefile documentation SMBIOS: generate BIOS release date based on UEFI version improve error handling in SMBIOS table generation UEFI: correct handling of signed capsule if authentication if off
generated by cgit v1.2.3 (git 2.39.0) at 2024-07-14 08:06:02 +0300