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2021-09-11environment: ti: mmc.h: Make the finduuid generic for usage across different ↵Aswath Govindraju1-1/+1
device types Make finduuid generic by making it dependent on the boot variable. For example, this can now be used for finding the uuid of partitions in usb device too. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-09-11board: ti: am64x: Add support for fixing dr_mode while booting from USBAswath Govindraju1-0/+32
Fix the dr_mode in the U-Boot device tree blob, by reading the mode field from the USB Boot Configuration fields. The dr_mode will only be fixed when booting from USB. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-09-11ARM: omap3: evm: Enable booting 'fitImage' with DEFAULT_FIT_TI_ARGSDerald D. Woods2-40/+6
This commit uses the existing DEFAULT_MMC_TI_ARGS and DEFAULT_FIT_TI_ARGS defintions to replace the 'mmc*' environment variables in the configuration. The check for the 'boot_fit' is handled like the 'am335x_*' boards with 'CONFIG_BOOTCOMMAND'. Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2021-09-11arm: am335x: Enable SPL_OF_CONTROL on some configsTom Rini2-0/+2
Both am335x_boneblack_vboot and am335x_evm_spiboot require SPL_OF_CONTROL to function but are currently missing this option. Add it. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-10Merge https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini12-24/+76
- mvebu: dts: Armada8k enable mdio (Sven) - a37xx: pci: Fix / enhance error handling (Pali) - mvebu: espressobin/turris_: Enable GPT partition support (Pali) - mvebu: sata_mv: Probe all ports (Tony) - a37xx: pci: Don't spam about PIO Response Status (Marek)
2021-09-10arm: a37xx: pci: Don't spam about PIO Response StatusMarek Behún1-1/+1
Use dev_dbg() instead of dev_err() in pcie_advk_check_pio_status(). For example CRS is not an error status, it just says that the request should be retried. Without this, U-Boot spams the terminal with pcie_advk pcie@d0070000: Non-posted PIO Response Status: UR, 0xc80 @ 0x100000 pcie_advk pcie@d0070000: Non-posted PIO Response Status: UR, 0xc80 @ 0x108000 pcie_advk pcie@d0070000: Non-posted PIO Response Status: UR, 0xc80 @ 0x110000 pcie_advk pcie@d0070000: Non-posted PIO Response Status: UR, 0xc80 @ 0x120000 pcie_advk pcie@d0070000: Non-posted PIO Response Status: UR, 0xc80 @ 0x128000 pcie_advk pcie@d0070000: Non-posted PIO Response Status: UR, 0xc80 @ 0x130000 ... when a device is not connected to a PCIe switch (Unsupported Request from the switch). Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-10arm: marvell: Dreamplug: fix typo in eth1 nameTony Dinh1-1/+1
Ethernet 1 should be ethernet-controller@76000. Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-10arm: mvebu : sata_mv should probe all portsTony Dinh1-4/+10
While a board could have multiple SATA ports, some of the ports might not have a disk attached to them. So while probing for disks, sata_mv_probe() should continue probing all ports, and skip one with no disk attached. Tests with: - Seagate Goflex Net (Marvell Kirkwood 88F6281) out-of-tree u-boot. - Zyxel NSA325 (Marvell Kirkwood 88F6282 out-of-tree u-boot. Observation: If a board has 2 or more SATA ports, and there is only one disk attached to one of the ports, sata_mv_probe() does not return a successful probe status. And if only one disk is attached to the 2nd port (i.e. port 1), it is not probed at all. Patch Description: Let sata_mv_probe() continues probing all ports, even if there is error in probing a given port, and then return a successful status if there is at least one port was probed successfully. Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-10arm: mvebu: a38x: Fix 5200000 baudratePali Rohár1-1/+1
Fix baudrate value 5150000 which was added in commit ead4864fa6cc ("arm: mvebu: a38x: Define supported UART baudrates"). Exact value for divisor 3 with 250 MHz TCLK is 5208333 baudrate. In above commit I incorrectly rounded it to 5150000 value due to testing with USB-UART hw which incorrectly reported exact value and divisor configured on other other end of UART link. Fix this value to 520000 baudrate which is more close to the exact hardware value and also has less fraction parts. Signed-off-by: Pali Rohár <pali@kernel.org> Fixes: ead4864fa6cc ("arm: mvebu: a38x: Define supported UART baudrates") Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-10arm: mvebu: espressobin: Enable GPT partition supportPali Rohár1-0/+1
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-10arm: mvebu: turris_{omnia, mox}: GPT partition supportPali Rohár2-0/+2
This allows U-Boot to access filesystems on GPT partitioned disks. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-10arm: a37xx: pci: Implement re-issuing config requests on CRS responsePali Rohár1-15/+43
According to PCIe base specification, if CRS Software Visibility is not enabled, the Root Complex must re-issue the Configuration Request as a new Request. Normally this part of Root Complex is implemented in hardware but aardvark is somehow special and does not implement it in hardware and expect that handling of config requests are fully implemented in software. This re-issuing functionality is required also because U-Boot does not support CRS Software Visibility feature and therefore expects that Root Complex re-issues requests as is specified in PCIe base specification. Retry / re-issue config request up to the PIO_MAX_RETRIES, to prevent infinite loop. After retry count exceed PIO_MAX_RETRIES, returns failure. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-10arm: a37xx: pci: Disable returning CRS responsePali Rohár1-1/+12
There was mistake in commit 4cd61c43fd51 ("arm: a37xx: pci: Fix handling PIO config error responses"). U-Boot does not support handling of CRS return value for PCI_VENDOR_ID config read request and also does not set CRSSVE bit. Therefore disable returning CRS response for now. Signed-off-by: Pali Rohár <pali@kernel.org> Fixes: 4cd61c43fd51 ("arm: a37xx: pci: Fix handling PIO config error responses") Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-10arm: mvebu: dts: Armada8k enable mdioSven Auhagen4-0/+4
Since mvpp2 is using the new mdio driver and the cp110 has been synced with the linux upstream, the mdio has to enabled in the device tree file. This is missing for some device tree files and therefore the network cards do not come online. Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de> Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-10arm: kirkwood: Sheevaplug: Update board maintainerTony Dinh1-1/+1
Change maintainer to me. Prafulla is no longer active in U-Boot community. Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-09MAINTAINERS: Update ARM TI entryLokesh Vutla12-12/+12
Move TI maintainership to Tom. Updated with the following commands: find ./ -name MAINTAINERS | xargs sed -i s/"Lokesh Vutla <lokeshvutla@ti.com>"/"Tom Rini <trini@konsulko.com>"/g Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com> Acked-by: Tom Rini <trini@konsulko.com>
2021-09-09Kconfig: Drop duplicate 'select SHA512' instancesTom Rini2-2/+0
When dropping SHA512_ALGO in general, we didn't catch some cases where an option was selecting both SHA512 and SHA512_ALGO and caused them to select SHA512 twice. Kconfig doesn't complain, but this is still wrong and should be corrected. Fixes: e60e44993120 ("lib: Drop SHA512_ALGO in lieu of SHA512") Reported-by: Andreas Schwab <schwab@suse.de> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-09Merge branch '2021-09-08-fix-FIT-hash-algos-in-SPL'Tom Rini24-171/+60
- Merge some fixes to how we enable hash algorithms for FIT images in SPL. This fixes a few cases where we should have had some options enabled, but did not. This also removes otherwise unused options in a few other cases.
2021-09-08image: Drop IMAGE_ENABLE_{MD5, CRC32} #definesAlexandru Gagniuc1-20/+0
These are no longer used, so drop them. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-09-08image: Drop if/elseif hash selection in calculate_hash()Alexandru Gagniuc3-26/+23
calculate_hash() would try to select the appropriate hashing function by a if/elseif contruct. But that is exactly why hash_lookup_algo() exists, so use it instead. This does mean that we now have to 'select HASH' to make sure we get the hash_lookup_algo() symbol. However, the change makes sense because even basic FITs will have to deal with "hash" nodes. My only concern is that the 'select SPL_HASH' might cause some platform to grow above its SPL size allowance Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> [trini: Make FSL_CAAM be implied only on ARM && SPL] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-08common: Move MD5 hash to hash_algo[] array.Alexandru Gagniuc4-4/+20
MD5 is being called directly in some places, but it is not available via hash_lookup_algo("md5"). This is inconsistent with other hasing routines. To resolve this, add an "md5" entry to hash_algos[]. The #ifdef clause looks funnier than those for other entries. This is because both MD5 and SPL_MD5 configs exist, whereas the other hashes do not have "SPL_" entries. The long term plan is to get rid of the ifdefs, so those should not be expected to survive much longer. The md5 entry does not have .hash_init/update/finish members. That's okay because hash_progressive_lookup_algo() will catch that, and return -EPROTONOSUPPORT, while hash_lookup_algo() will return the correct pointer. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> [trini: Use CONFIG_IS_ENABLED not IS_ENABLED for MD5 check] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-08common/spl: Drop [ST]PL_HASH_SUPPORT in favor of [ST]PL_HASHAlexandru Gagniuc11-33/+6
All of these configs exist. Stick to using CONFIG_[ST]PL_HASH, and drop all references to CONFIG_[ST]PL_HASH_SUPPORT. This means we need for CHAIN_OF_TRUST to select SPL_HASH now. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> [trini: Add TPL case, fix CHAIN_OF_TRUST, other tweaks] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-08lib: Drop SHA512_ALGO in lieu of SHA512Alexandru Gagniuc6-14/+8
SHA512_ALGO was used as a "either SHA512 or SHA384", although the implementations of these two algorithms share a majority of code. From a Kconfig interface perspective, it makes sense to present two distinct options. This requires #ifdefing out the SHA512 implementation from sha512.c. The latter doesn't make any sense. It's reasonable to say in Kconfig that SHA384 depends on SHA512, and seems to be the more polite way to handle the selection. Thus, automatically select SHA512 when SHA384 is enabled. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-09-08common: Remove unused CONFIG_FIT_SHAxxx selectorsAlexandru Gagniuc5-74/+3
Originally CONFIG_FIT_SHAxxx enabled specific SHA algos for and only for hash_calculate() in common/image-fit.c. However, since commit 14f061dcb1 ("image: Drop IMAGE_ENABLE_SHAxxx"), the correct selector was changed to CONFIG_SHAxxx. The extra "_FIT_" variants are neither used, nor needed. Remove them. One defconfig disables FIT_SHA256, which is now changed to 'SHA256'. CMD_MVEBU_BUBT needs to select select SHA256 to avoid undefined references to "sha256_*()". bubt.c needs sha256, so this selection is correct. It is not clear why this problem did not manifest before. Note that SHA selection in SPL is broken for this exact reason. There is no corresponding SPL_SHAxxx. Fixing this is is beyond the scope of this change. Also note that we make CONFIG_FIT now imply SHA256, to make up for FIT_SHA256 previously being a default y option. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> [trini: Add imply SHA256 to FIT] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-07Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini25-159/+176
2021-09-07riscv: lib: modify the indentZong Li1-1/+1
We usually use a space in function declaration, rather than a tab. Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-09-07board: sifive: use ccache driver instead of helper functionZong Li10-156/+9
Invokes the common cache_init function to initialize ccache. Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-09-07riscv: lib: implement enable_caches for sifive cacheZong Li3-0/+33
The enable_caches is a generic hook for architecture-implemented, we define this function to enable composable cache of sifive platforms. In sifive_cache, it invokes the generic cache_enable interface of cache uclass to execute the relative implementation in SiFive ccache driver. Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-09-07common: board_r: support enable_caches for RISC-VZong Li2-2/+6
The enable_caches is a generic hook for architecture-implemented, we leverage this function to enable caches for RISC-V Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-09-07cache: add sifive composable cache driverZong Li3-0/+83
This driver is currently responsible for enabling all ccache ways. Composable cache could be configure as RAM or cache, we will use it as RAM at the beginning to put the u-boot SPL there. In u-boot proper phrase, we will use the composable cache as cache, and try to enable the cache ways. Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-09-07riscv: Add missing sentinel in ocores_i2c.cThomas Skibo1-0/+1
The ocores_i2c.c driver is missing a sentinel at the end of the compatible strings list. This causes the "dm compat" command to spew garbage. Signed-off-by: Thomas Skibo <thomas-git@skibo.net> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-09-07riscv: show code leading to exceptionHeinrich Schuchardt1-0/+33
To make analyzing exceptions easier output the code that leads to it. We already do the same on the ARM platform. Here is an example: => exception ebreak Unhandled exception: Breakpoint EPC: 000000008ff5d50e RA: 000000008ff5d62c TVAL: 0000000000000000 EPC: 000000008020b50e RA: 000000008020b62c reloc adjusted Code: 2785 0693 07a0 dce3 fef6 47a5 d563 00e7 (9002) To disassemble the code we can use the decodecode script: $ echo 'Code: 2785 0693 07a0 dce3 fef6 47a5 d563 00e7 (9002)' | \ CROSS_COMPILE=riscv64-linux-gnu- scripts/decodecode Code: 2785 0693 07a0 dce3 fef6 47a5 d563 00e7 (9002) All code ======== 0: 2785 addiw a5,a5,1 2: 07a00693 li a3,122 6: fef6dce3 bge a3,a5,0xfffffffffffffffe a: 47a5 li a5,9 c: 00e7d563 bge a5,a4,0x16 10:* 9002 ebreak <-- trapping instruction ... Code starting with the faulting instruction =========================================== 0: 9002 ebreak ... As it is not always clear if the first 16 bits are at the start or in the middle of a 32bit instruction it may become necessary to strip the first u16 from the output before calling decodecode to get the correct disassembled code. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-09-07configs: qemu-riscvXX_spl_defconfig enable CMD_SBIHeinrich Schuchardt2-0/+2
Both for 64bit and 32bit at least on one board we should compile the sbi command. Enabling it on QEMU will allow to write a test for it. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-09-07riscv: enable booting HiFive Unmatched from SATAHeinrich Schuchardt2-0/+8
On the HiFive Unmatched a PCI to SATA adapter may be used to install a SATA drive. Enable booting from it. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2021-09-06Merge tag 'u-boot-stm32-20210906' of ↵Tom Rini1-1/+1
https://source.denx.de/u-boot/custodians/u-boot-stm - fix EFI boot with OP-TEE for STM32MP15 boards
2021-09-06stm32mp: Fix board_get_usable_ram_top()Patrice Chotard1-1/+1
When booting in EFI, lib/efi_loader/efi_memory.c calls board_get_usable_ram_top(0) which returns by default gd->ram_base + gd->ram_size which is the top of DDR. In case of OPTEE boot, the top of DDR is currently reserved by OPTEE, board_get_usable_ram_top(0) must return an address outside OPTEE reserved memory. gd->ram_top matches this constraint as it has already been initialized by substracting all DT reserved-memory (included OPTEE memory area). Fixes: 92b611e8b003 ("stm32mp: correctly handle board_get_usable_ram_top(0)") Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-09-04Merge tag 'efi-2021-10-rc4' of ↵Tom Rini7-38/+118
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2021-10-rc4 Documentation: Remove invalid reference to configuration variable in UEFI doc UEFI: Parameter checks for the EFI_TCG2_PROTOCOL Improve support of preseeding UEFI variables. Correct the calculation of the size of loaded images. Allow for UEFI images with zero VirtualSize
2021-09-04efi_loader: fix efi_tcg2_hash_log_extend_event() parameter checkMasahisa Kojima2-1/+3
TCG EFI Protocol Specification defines that PCRIndex parameter passed from caller must be 0 to 23. TPM2_MAX_PCRS is currently used to check the range of PCRIndex, but TPM2_MAX_PCRS is tpm2 device dependent and may have larger value. This commit newly adds EFI_TCG2_MAX_PCR_INDEX macro, it is used to check the range of PCRIndex parameter. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-09-04efi_loader: fix boot_service_capability_min calculationMasahisa Kojima1-1/+1
TCG EFI Protocol Specification requires to the input ProtocolCapability.Size < size of the EFI_TCG2_BOOT_SERVICE_CAPABILITY up to and including the vendor ID field. Current implementation does different calculation, let's fix it. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-09-04efi_loader: add missing parameter check for EFI_TCG2_PROTOCOL apiMasahisa Kojima1-0/+19
TCG EFI Protocol Specification defines the required parameter checking and return value for each API. This commit adds the missing parameter check and fixes the wrong return value to comply the specification. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-09-04efi_loader: correct determination of secure boot stateHeinrich Schuchardt1-8/+31
When U-Boot is started we have to use the existing variables to determine in which secure boot state we are. * If a platform key PK is present and DeployedMode=1, we are in deployed mode. * If no platform key PK is present and AuditMode=1, we are in audit mode. * Otherwise if a platform key is present, we are in user mode. * Otherwise if no platform key is present, we are in setup mode. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-09-04efi_loader: efi_auth_var_type for AuditMode, DeployedModeHeinrich Schuchardt3-2/+5
Writing variables AuditMode and DeployedMode serves to switch between Secure Boot modes. Provide a separate value for these in efi_auth_var_type. With this patch the variables will not be read from from file even if they are marked as non-volatile by mistake. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-09-04efi_loader: don't load signature database from fileHeinrich Schuchardt4-20/+30
The UEFI specification requires that the signature database may only be stored in tamper-resistant storage. So these variable may not be read from an unsigned file. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-09-04efi_loader: rounding of image sizeHeinrich Schuchardt1-2/+2
We should not first allocate memory and then report a rounded up value as image size. Instead first round up according to section allocation and then allocate the memory. Fixes: 82786754b9d2 ("efi_loader: ImageSize must be multiple of SectionAlignment") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-09-04efi_loader: sections with zero VirtualSizeHeinrich Schuchardt1-4/+27
In a section header VirtualSize may be zero. This is for instance seen in the .sbat section of shim. In this case use SizeOfRawData as section size. Fixes: 9d30a941cce5 ("efi_loader: don't load beyond VirtualSize") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Asherah Connor <ashe@kivikakk.ee>
2021-09-04doc: Remove information about CAPSULE_FMP_HEADERMichal Simek1-1/+0
This Kconfig symbol was never added to U-Boot but it was mentioned in the origin commit c35df7c9e43e ("qemu: arm64: Add documentation for capsule update"). That's why remove it from documentation to be accurate. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-09-03Merge tag 'xilinx-for-v2021.10-rc4' of ↵Tom Rini2-17/+14
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.10-rc4 doc: - Fix uefi documentation spi: - Fix gqspi driver for single configuration
2021-09-03spi: zynqmp_gqspi: Fix dma alignment issueAshok Reddy Soma1-9/+7
DMA is aligned to ARCH_DMA_MINALIGN(64 bytes), but as per spec, alignment required is 4bytes only. Change DMA alignment from ARCH_DMA_MINALIGN to GQSPI_DMA_ALIGN. Remove alignment of data length in non-exponential case. Some minor improvements in the initialization to initialize gen_fifo threshold and disable qspi controller while setting config register. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-09-03spi: zynqmp_gqspi: Switch genfifo start to manual modeAshok Reddy Soma1-7/+7
Current implementation uses auto mode for starting generic FIFO. The recommendation from IP designers is to use manual mode, hence change to manual start mode. In fill genfifo first write to genfio and then trigger manual start. Also enable and check for genfifo empty interrupt status in place of genfifo not full interrupt. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-09-03doc: Remove information about CAPSULE_FMP_HEADERMichal Simek1-1/+0
This Kconfig symbol was never added to U-Boot but it was mentioned in the origin commit c35df7c9e43e ("qemu: arm64: Add documentation for capsule update"). That's why remove it from documentation to be accurate. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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