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2023-07-10borad: starfive: evb: Synchronize environment variables from vf2Samin Guo1-0/+4
loadaddr fdtoverlay_addr_r kernel_comp_addr_r/kernel_comp_size Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-10borad: starfive: evb: Resize the address spaceSamin Guo1-20/+8
Readjust the address space for 1G DDR Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-10riscv: jh7110: add spi nor flash SPI_FLASH_MACRONIX supportSamin Guo1-0/+1
Radxa uses macronix spi flash, so enable it. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-10riscv: jh7110: set SPL_OPENSBI_LOAD_ADDRSamin Guo1-0/+1
set SPL_OPENSBI_LOAD_ADDR to 0x40000000 Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-10dram: starfive: jh7110: Add 1G supportSamin Guo5-29/+47
add 1G DDR tuning cfg Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-10dram: jh7110: Add CONFIG_ID_EEPROM to determine if EEPROM is availableSamin Guo1-18/+26
When eeprom reads, you need to determine whether eeprom supports it. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-10dram: jh7110: Macro definitions STARFIVE_JH7110_EEPROM_DDRINFO_OFFSETSamin Guo1-1/+2
In order to read DDR info from eeprom. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-07borad: starfive: vf2: Optimized kernel_comp_addr_r and kernel_comp_sizeSamin Guo1-2/+2
Usually, kernel_comp_size only need 0x4000000. Optimize kernel_comp_addr_r for better compatibility with 1G DDR situations. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-06-25dram: jh7110: Add resize DDR info from EEPROM.Samin Guo1-2/+47
sync from vf2 and add resize DDR info from EEPROM Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-06-21Merge branch 'CR_6164_vf2_uboot_mem_keith.zhao' into 'vf2-devel'andy.hu1-1/+1
CR6164 riscv: config: starfive: jh7110: mem size See merge request sbc/u-boot!52
2023-06-21Merge tag 'JH7110_515_SDK_v5.2.1' into vf2-develAndy Hu1-1/+1
2023-06-20Merge branch 'CR_6164_evb_uboot_mem_keith.zhao' into 'jh7110-master'andy.hu1-1/+1
CR 6164 riscv: config: starfive: jh7110: mem size See merge request sdk/u-boot!56
2023-06-20riscv: config: starfive: jh7110: mem sizeKeith Zhao1-1/+1
reduce the mem size from 800+M to 128M Signed-off-by: Keith Zhao <keith.zhao@starfivetech.com>
2023-06-20riscv: config: starfive: jh7110: mem sizeKeith Zhao1-1/+1
reduce the mem size from 800+M to 128M Signed-off-by: Keith Zhao <keith.zhao@starfivetech.com>
2023-06-09Merge branch 'CR_5469_CPU_Max_Speed_mason.huo' into 'vf2-devel'VF2_v3.1.5andy.hu2-41/+33
CR_5469 board: starfive: jh7110: Add support for 1.25GHz chips See merge request sbc/u-boot!51
2023-06-09Merge tag 'JH7110_515_SDK_v5.1.5' into vf2-develAndy Hu2-41/+33
2023-06-07Merge branch 'CR_5469_CPU_Max_Speed_mason.huo' into 'jh7110-master'andy.hu2-41/+33
CR_5469 board: starfive: jh7110: Add support for 1.25GHz chips See merge request sdk/u-boot!55
2023-06-05board: starfive: jh7110: Add support for 1.25GHz chipsMason Huo2-41/+33
Remove max cpu voltages: 1.12v, 1.10v, 1.08v. Set the cpu max frequency to 1.25G per OTP value. Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
2023-06-02board: starfive: jh7110: Add support for 1.25GHz chipsMason Huo4-82/+66
Remove max cpu voltages: 1.12v, 1.10v, 1.08v. Set the cpu max frequency to 1.25G per OTP value. Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
2023-05-31VisionFive 2: Add default device tree overlay addressVF2_v3.0.4MichaIng1-0/+1
This is needed for device tree overlays to work when adding them via "fdtoverlays /path/to/overlay.dtbo" to extlinux.conf. Of course this can be also set in uEnv.txt, but this U-Boot build reads that environment file from partition 3 with FAT filesystem only, which makes this an unnecessary limitation. Also, this variable is listed as mandatory in upstream U-Boot docs: https://github.com/u-boot/u-boot/blob/master/doc/develop/distro.rst#required-environment-variables To allow using device tree overlays on the VisionFive 2, including the one shipped with StarFive's own kernel build, via extlinux in a generic and upstream-compatible way, this variable is hereby added. The used address is sufficiently distant from the initramfs address, also in case 0x48100000 is used (override via uEnv.txt in StarFive's Debian image). Signed-off-by: MichaIng <micha@dietpi.com>
2023-05-31VisionFive 2: Add default compressed kernel addressMichaIng1-0/+2
The default U-Boot environment does not provide kernel_comp_addr_r and kernel_comp_size, needed when using a compressed kernel image. These variables are listed as mandatory in upstream U-Boot to allow this feature without needed user configuration: https://github.com/u-boot/u-boot/blob/master/doc/develop/distro.rst#required-environment-variables The values are taken from the uEnv.txt shipped by StarFive's own Debian images, which does use a gzip-compressed kernel image hence proven to be valid. Adding those values to the U-Boot default environment allows them to be removed from the dedicated uEnv.txt and enables support for compressed kernel images independent of the used uEnv.txt or whether one is used at all. Signed-off-by: MichaIng <micha@dietpi.com>
2023-05-19Merge tag 'JH7110_515_SDK_v5.0.0' into vf2-develAndy Hu1-6/+6
update toolchain to gcc 12.2.0
2023-05-19Merge branch 'CR_3508_update_toolchain' into 'jh7110-master'andy.hu1-6/+6
CR_3508: riscv: dts: starfive: add zicsr_zifencei to riscv,isa string See merge request sdk/u-boot!54
2023-05-18riscv: dts: starfive: add zicsr_zifencei to riscv,isa stringAndy Hu1-6/+6
Starting from gcc 12.x, csr and fence instructions have been separated from the base I instruction set. special the zicsr_zifencei string to DT riscv,isa string Signed-off-by: Andy Hu <andy.hu@starfivetech.com>
2023-05-12Merge branch 'CR_5228_debian_nvme_boot' into 'vf2-devel'andy.hu2-9/+29
CR_5228: Added booting from nvme support for debian See merge request sbc/u-boot!50
2023-05-12Merge branch 'CR_5042_gmac_phy_delay_ds_samin.guo' into 'vf2-devel'andy.hu1-1/+9
CR5042: riscv: dts: starfive: vf2: add Pad Drive Strength Cfg See merge request sbc/u-boot!49
2023-05-12Merge tag 'JH7110_515_SDK_v4.9.0' into vf2-develAndy Hu3-3/+37
1. u-boot: Merge branch 'CR_5042_gmac_phy_delay_ds_samin.guo' into 'jh7110-master' Merge branch 'CR_4854_nvboot_shanlong.li' into 'jh7110-master'
2023-05-10Merge branch 'CR_5042_gmac_phy_delay_ds_samin.guo' into 'jh7110-master'andy.hu1-2/+20
CR5042： net: phy: motorcomm: add Pad Drive Strength Cfg See merge request sdk/u-boot!52
2023-05-10Merge branch 'CR_4854_nvboot_shanlong.li' into 'jh7110-master'andy.hu2-1/+17
CR_4854: uboot: evb support boot from nvme ssd See merge request sdk/u-boot!53
2023-05-05uboot: evb support boot from nvme ssdshanlong.li2-1/+17
support boot from nvme ssd Signed-off-by: shanlong.li <shanlong.li@starfivetech.com>
2023-05-02Added booting from nvme support for debianClement2-9/+29
Signed-off-by: Clement <clement@starfivetech.com>
2023-04-28Merge tag 'JH7110_515_SDK_v4.8.2' into vf2-develAndy Hu26-27/+28
2023-04-26Merge branch 'CR_5041_Copyright_yanhong.wang' into 'jh7110-master'andy.hu29-30/+31
CR 5041 board: starfive: copyright: Standardize the copyright format See merge request sdk/u-boot!51
2023-04-24riscv: dts: starfive: vf2: set gmac1 rx delay to 300psSamin Guo1-0/+1
set gmac1 rx delay to 300ps to to match better delays. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-04-24riscv: dts: starfive: vf2: set gmac0 rx delay to 1500psSamin Guo1-1/+2
set gmac0 rx delay to 1500ps to to match better delays. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-04-24riscv: dts: starfive: vf2: add Pad Drive Strength CfgSamin Guo1-0/+6
Increase the drive strength of rx_clk to increase the delay available window. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-04-23board: starfive: copyright: Standardize the copyright formatYanhong Wang29-30/+31
Unify the content format of the copyright section Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
2023-04-20Merge tag 'JH7110_515_SDK_v4.8.1' into vf2-develAndy Hu1-5/+2
version JH7110_515_SDK_v4.8.1 for JH7110 EVB board 1. u-boot: Merge branch 'CR_4747_remove_cycles_pmu_dts_minda' into 'jh7110-master'
2023-04-20net: phy: motorcomm: add Pad Drive Strength CfgSamin Guo1-2/+20
YT8531 supports Pad Drive Strength configuration. Including rx_data/rx_clk, etc. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-04-19Merge branch 'CR_4747_remove_cycles_pmu_dts_minda' into 'jh7110-master'andy.hu1-5/+2
CR_4747 dts: pmu: remove pmu dts stall cycles config. See merge request sdk/u-boot!50
2023-04-14Merge tag 'JH7110_515_SDK_v4.8.0' into vf2-develAndy Hu1-1/+2
version JH7110_515_SDK_v4.8.0 for JH7110 EVB board 1. u-boot: Merge branch 'CR_4427_DEFCONFIG_yanhong.wang' into 'jh7110-master'
2023-04-12Merge branch 'CR_4427_DEFCONFIG_yanhong.wang' into 'jh7110-master'andy.hu1-1/+2
CR 4427 configs: starfive:　Enable CONFIG_OF_SEPARATE configuration See merge request sdk/u-boot!47
2023-04-10dts: pmu: remove pmu dts stall cycles config.Minda Chen1-5/+2
class 8 and class9 cpu stall cycles hwcounter is not supported in U74. delete the configuration. Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
2023-04-07Merge branch 'CR_4563_memcpy_samin.guo' into 'vf2-devel'andy.hu2-29/+24
CR4563: Configure the l2 prefetcher parameter See merge request sbc/u-boot!47
2023-04-07Merge branch 'CR_3910_Modify_cpu_vol_mason.huo' into 'vf2-devel'andy.hu2-8/+20
CR_3910 Modify cpu voltage set commands See merge request sbc/u-boot!48
2023-04-07Merge tag 'JH7110_515_SDK_v4.7.0' into vf2-develah4-40/+133
version JH7110_515_SDK_v4.7.0 for JH7110 EVB board 1. #3910: u-boot: update cpu voltage set commands per binning information from OTP 2. #4563: u-boot: configure the l2 prefetcher
2023-04-07Merge branch 'CR_4563_memcpy_samin.guo' into 'jh7110-master'andy.hu3-22/+103
CR4563：Configure the l2 prefetcher parameter See merge request sdk/u-boot!48
2023-04-07Merge branch 'CR_3910_Modify_cpu_vol_mason.huo' into 'jh7110-master'andy.hu2-18/+30
CR_3910 Modify cpu voltage set commands See merge request sdk/u-boot!49
2023-04-07board: starfive: jh7110: Modify cpu voltage set commandsMason Huo2-18/+30
Update the cpu voltage set commands per binning information from OTP. Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
2023-04-07board: starfive: jh7110: Modify cpu voltage set commandsMason Huo4-26/+50
Update the cpu voltage set commands per binning information from OTP. Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
generated by cgit v1.2.3 (git 2.39.0) at 2024-06-28 13:52:54 +0300