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2023-08-21test: dm: pinmux: Handle %pa in pinctrl-single mux outputMarek Vasut1-41/+51
The pinctrl-single driver uses %pa to print register value in its single_get_pin_muxing() output. Handle this properly in the test based on CONFIG_PHYS_64BIT . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-21configs: sandbox64: Enable BUTTON_ADC driverMarek Vasut1-0/+1
Align the sandbox64 defconfig with sandbox defconfig. Enable missing BUTTON ADC driver. This fixes ut_dm_dm_test_button_keys_adc test . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-21configs: sandbox64: Enable MC34708 driverMarek Vasut1-0/+1
Align the sandbox64 defconfig with sandbox defconfig. Enable missing MC34708 PMIC driver. This fixes ut_dm_dm_test_power_pmic_mc34708_get test . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-21configs: sandbox64: Increase console record size to 0x6000Marek Vasut1-1/+1
Align the sandbox64 defconfig with sandbox defconfig. Increase the console record size. This fixes ut_bootstd_bootflow_cmd_scan_e . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-21configs: sandbox64: Enable SF bootdevMarek Vasut1-0/+1
Align the sandbox64 defconfig with sandbox defconfig. Enable missing SPI NOT bootdev. This fixes ut_bootstd_bootdev_test_cmd_hunt test . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-20Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-shTom Rini3-25/+34
2023-08-19arm: rmobile: Fix off-by-one error in cpuinfoPaul Barker1-1/+1
In rmobile_cpuinfo_idx() there is an off-by-one error in accessing the rmobile_cpuinfo array. At the end of the loop, i is equal to the array size, i.e. rmobile_cpuinfo[i] accesses one entry past the end of the array. The last entry in the array is a fallback value so the loop should count to ARRAY_SIZE(rmobile_cpuinfo) - 1 instead, this will leave i equal to the index of the fallback value if no match is found. Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-08-19Merge tag 'doc-2023-10-rc3-2' of ↵Tom Rini7-17/+10
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request doc-2023-10-rc3-2 Documentation: * csf_examples: csf.sh: Remove unneeded export ATF_LOAD_ADDR line * printf() codes: correct format specifier for unsigned int * Fix typos in clk.h, irq.h. * Correct description of proftool Other: * Quieten test for erofs filesystem presence * spl: don't assume NVMe partition 1 exists
2023-08-19doc: csf_examples: csf.sh: Remove unneeded export ATF_LOAD_ADDR lineFabio Estevam1-1/+0
Originally, exporting the ATF_LOAD_ADDR was required, but since binman has been used to generate the flash.bin, it is no longer needed to do such manual export. The ATF address is now passed via binman. Remove the unneeded export ATF_LOAD_ADDR line. Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-08-19irq: Fix typo in header commentPaul Barker1-1/+1
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-19clk: Fix typo in header commentPaul Barker1-1/+1
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-19doc: printf() codes: Fix format specifier for unsigned intSiddharth Vadapalli1-3/+3
The format specifier for the "unsigned int" variable is documented as "%d". However, it should be "%u". Thus, fix it. Fixes: f5e9035043fb ("doc: printf() codes") Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-19docs: fix wrong usage of proftoolPuhan Zhou1-3/+3
The usage of proftool in docs is incorrect. If proftool is used without '-o' argument, it will show the usage like following $ ./sandbox/tools/proftool -m sandbox/System.map -t trace -f funcgraph dump-ftrace >trace.dat Must provide trace data, System.map file and output file Usage: proftool [-cmtv] <cmd> <profdata> Change '>' to '-o' to fix it. Signed-off-by: Puhan Zhou <puh4n.zhou@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-19spl: don't assume NVMe partition 1 existsHeinrich Schuchardt1-6/+0
There is no requirement that a partition 1 exists in a partition table. We should not try to retrieve information about it. We should not even try reading with partition number CONFIG_SYS_NVME_BOOT_PARTITION here as this is done in the fs_set_blk_dev() call anyway. Fixes: 8ce6a2e17577 ("spl: blk: Support loading images from fs") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2023-08-19fs/erofs: Quieten test for filesystem presenceSimon Glass1-2/+2
At present listing a partition produces lots of errors about this filesystem: => part list mmc 4 cannot find valid erofs superblock cannot find valid erofs superblock cannot read erofs superblock: -5 [9 more similar lines] Use debugging rather than errors when unable to find a signature, as is done with other filesystems. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Gao Xiang <hsiangkao@linux.alibaba.com> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-18rockchip: rk3566-anbernic-rgxx3: Rename defconfig to include SoC nameJonas Karlman3-2/+2
Rename defconfig to include SoC name, use similar pattern as other RK356x boards: <soc>-<name>.dts -> <name>-<soc>_defconfig Suggested-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-18Merge tag 'tegra-for-2023.10-rc1' of ↵Tom Rini81-6/+5080
https://source.denx.de/u-boot/custodians/u-boot-tegra ARM: tegra: Changes for v2023.10-rc1 This adds support for various new Tegra30 boards (ASUS, LG and HTC) and has some other minor enhancements, such as enabling the poweroff command on several Tegra210 and Tegra186 boards.
2023-08-17Merge branch '2023-08-17-assorted-minor-fixes'Tom Rini17-45/+94
- More MAINTAINERS updates, update CI to use a newer coreboot and make arm-ffa a bit less verbose by default.
2023-08-17board: rockchip: rk35xx: Add myself as reviewer to MAINTAINERSJonas Karlman3-0/+6
Add myself as a reviewer for RK3566/RK3568/RK3588 boards that I have and can help with review and testing of defconfig and device tree changes. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Acked-by: Eugen Hristev <eugen.hristev@collabora.com>
2023-08-17board: rockchip: rk35xx: Add device tree files to MAINTAINERSJonas Karlman6-26/+43
Update MAINTAINERS files for RK3566/RK3568/RK3588 boards to include related device tree files. Also replace space with tabs. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Acked-by: Eugen Hristev <eugen.hristev@collabora.com>
2023-08-17doc: rockchip: Add supported RK3566/RK3568 boardsJonas Karlman1-8/+12
Update Rockchip documentation to include RK3566/RK3568 boards already supported. Also list Pine64 boards under RK3566 and drop defconfig to match other listed boards. Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-08-17MAINTAINERS: Update UFS maintainerNeha Malcom Francis1-1/+2
Dropping Faiz Abbas from the UFS maintainer list as his e-mail ID is no longer valid. Adding Bhupesh Sharma who has been using this framework working on Qualcomm Snapdragon SoCs as well as sending out fixes. Adding myself as well to support in reviewing and testing patches. Signed-off-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com> Acked-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-08-17CI: x86: coreboot: Update to latest corebootSimon Glass3-2/+22
Use a recent coreboot build for this test. The coreboot commit is: 6f5ead14b4 mb/google/nissa/var/joxer: Update eMMC DLL settings This is build with default settings, i.e. QEMU x86 i440fx/piix4 Add some documentation as to how to update it next time. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-17corstone1000: update maintainersAbdellatif El Khlifi1-2/+2
Update MAINTAINERS of corstone1000 board. Signed-off-by: Xueliang Zhong <xueliang.zhong@arm.com> Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
2023-08-17arm_ffa: use debug logsAbdellatif El Khlifi5-6/+6
replace info logs with debug logs Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-17arm: Add arch/arm/dts/Makefile specifically to MAINTAINERSTom Rini1-0/+1
In order to reduce the number of people that are cc'd on a patch for simply touching arch/arm/dts/Makefile (which is a big common file) add an entry specifically to MAINTAINERS under the ARM entry. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-16Merge tag 'u-boot-stm32-20230816' of ↵Tom Rini25-80/+375
https://source.denx.de/u-boot/custodians/u-boot-stm DHSOM: Power cycle Buck3 in reset DHCOM: Switch DWMAC RMII clock to MCO2 stm32f746: fix display pinmux stm32mp: psci: Inhibit PDDS because CSTBYDIS is set stm32mp1: DT alignment with v6.4 stm32mp1: add splashscreen with STMicroelectronics logo stm32mp1: clk: remove error for disabled clock in stm32mp1_clk_get_parent serial: stm32: Extend TC timeout
2023-08-16serial: stm32: extend TC timeoutValentin Caron1-6/+12
Waiting 150us TC bit couldn't be enough. If TFA lets 16 bits in USART fifo, we has to wait 16 times 87 us (time of 10 bits (1 byte in most use cases) at a baud rate of 115200). Fixes: b4dbc5d65a67 ("serial: stm32: Wait TC bit before performing initialization") Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-16ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOMMarek Vasut2-4/+32
The DHCOM SoM has two options for supplying ETHRX clock to the DWMAC block and PHY. Either (1) ETHCK_K generates 50 MHz clock on ETH_CLK pad for the PHY and the same 50 MHz clock are fed back to ETHRX via internal eth_clk_fb clock connection OR (2) ETH_CLK is not used at all, MCO2 generates 50 MHz clock on MCO2 output pad for the PHY and the same MCO2 clock are fed back into ETHRX via ETH_RX_CLK input pad using external pad-to-pad connection. Option (1) has two downsides. ETHCK_K is supplied directly from either PLL3_Q or PLL4_P, hence the PLL output is limited to exactly 50 MHz and since the same PLL output is also used to supply SDMMC blocks, the performance of SD and eMMC access is affected. The second downside is that using this option, the EMI of the SoM is higher. Option (2) solves both of those problems, so implement it here. In this case, the PLL4_P is no longer limited and can be operated faster, at 100 MHz, which improves SDMMC performance (read performance is improved from ~41 MiB/s to ~57 MiB/s with dd if=/dev/mmcblk1 of=/dev/null bs=64M count=1). The EMI interference also decreases. Ported from Linux kernel commit 73ab99aad50cd ("ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOM") Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-16board: stm32mp1: add splash screen with stmicroelectronics logoPatrick Delaunay6-1/+13
Display the STMicroelectronics logo with features VIDEO_LOGO and SPLASH_SCREEN on STMicroelectronics boards. With CONFIG_SYS_VENDOR = "st", the logo st.bmp is selected, loaded at the address indicated by splashimage and centered with "splashpos=m,m". Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-16ARM: dts: stm32mp: alignment with v6.4Patrick Delaunay10-56/+299
Device tree alignment with Linux kernel v6.4. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-16ARM: stm32: Inhibit PDDS because CSTBYDIS is setMarek Vasut1-1/+1
The PWR_MPUCR CSTBYDIS bit is set, therefore the CA cores can never enter CStandby state and would always end up in CStop state. Clear the PDDS bit, which indicates the CA cores can enter CStandby state as it makes little sense to keep it set with CSTBYDIS also set. This does however fix a problem too. When both PWR_MPUCR and PWR_MCUCR PDDS bits are set, then the chip enters CStandby state even though the PWR_MCUCR CSTBYDIS is set. Clearing the PWR_MPUCR PDDS prevents that from happening. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-08-16ARM: dts: stm32: fix display pinmux for stm32f746-discoDario Binacchi1-1/+1
As reported by the datasheet (DocID027590 Rev 4) for PG12: - AF9 -> LCD_B4 - AF14 -> LCD_B1 So replace AF14 with AF9 for PG12 in the dts. Fixes: fe63d3cfb77ef ("ARM: dts: stm32: Sync DT with v4.20 kernel for stm32f7") Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-16clk: stm32mp1: remove error for disabled clock in stm32mp1_clk_get_parentPatrick Delaunay1-1/+2
To disabled a clock in clock tree initialization for a mux of STM32MP15, the selected clock source index is set with the latest possible index for the number of bit used. Today this valid configuration cause a error in U-Boot messages, for example with CLK_ETH_DISABLED, when this clock is not needed for the used ETH PHY without crystal: no parents defined for clk id 123 This patch change the level of this message to avoid this trace for valid clock tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-16ARM: stm32: Power cycle Buck3 in reset on DHSOMMarek Vasut3-10/+15
In case the DHSOM is in suspend state and either reset button is pushed or IWDG2 triggers a watchdog reset, then DRAM initialization could fail as follows: " RAM: DDR3L 32bits 2x4Gb 533MHz DDR invalid size : 0x4, expected 0x40000000 DRAM init failed: -22 ### ERROR ### Please RESET the board ### " Avoid this failure by not keeping any Buck regulators enabled during reset, let the SoC and DRAMs power cycle fully. Since the change which keeps Buck3 VDD enabled during reset is ST specific, move this addition to ST specific SPL board initialization so that it wouldn't affect the DHSOM . Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-08-15Merge tag 'efi-2023-10-rc3' of ↵Tom Rini42-144/+185
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2023-10-rc3 Documentation: * Correct description of board_get_usable_ram_top * Add partition API to HTML documentation * Describe lmb_is_reserved * doc/sphinx/requirements.txt: Bump certifi up UEFI: * Fix efi_add_known_memory * Make distro_efi_boot() static Other: * Correct return type board_get_usable_ram_top
2023-08-15common: return type board_get_usable_ram_topHeinrich Schuchardt35-35/+35
board_get_usable_ram_top() returns a physical address that is stored in gd->ram_top. The return type of the function should be phys_addr_t like the current type of gd->ram_top. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-15efi_loader: fix efi_add_known_memory()Heinrich Schuchardt1-1/+1
In efi_add_known_memory() we currently call board_get_usable_ram_top() with an incorrect value 0 of parameter total_size. This leads to an incorrect value for ram_top depending on the code in board_get_usable_ram_top(). Use the value of gd->ram_top instead which is set before relocation by calling board_get_usable_ram_top(). Fixes: 7b78d6438a2b ("efi_loader: Reserve unaccessible memory") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-15bootmeth: efi: Make distro_efi_boot() staticBin Meng1-1/+1
As it is only called in bootmeth_efi.c Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-15doc: add partition API to HTML documentationHeinrich Schuchardt3-98/+119
* Convert comments in part.h to Sphinx style. * Create documentation page for the partition API. * Add the partition API page to the API index page. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-15doc: description of board_get_usable_ram_top()Heinrich Schuchardt1-5/+10
Improve the description of function board_get_usable_ram_top(). Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-15lmb: description lmb_is_reserved, lmb_is_reserved_flagsHeinrich Schuchardt1-3/+18
* provide a description for function lmb_is_reserved() * improve the description of funciton lmb_is_reserved_flags() Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-15doc/sphinx/requirements.txt: Bump certifi upTom Rini1-1/+1
Upgrade certifi to the latest version, to remove e-Tugra from the root store. Link: https://groups.google.com/a/mozilla.org/g/dev-security-policy/c/C-HrP1SEq1A?pli=1 Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-15Merge tag 'ubi-updates-for-v2023.10-rc3' of ↵Tom Rini1-1/+1
https://source.denx.de/u-boot/custodians/u-boot-ubi ubi changes for v2023.10-rc3 Fix: - Fix 'ubi list' command arguments parsing from Dmitry
2023-08-15Merge tag 'i2c-updates-for-v2023.10-rc3' of ↵Tom Rini1-0/+42
https://source.denx.de/u-boot/custodians/u-boot-i2c i2c updates for v2023.10-rc3 Bugfixes: - mvtwsi driver fix stuck "bus error" state from Sam
2023-08-15cmd: ubi: Fix 'ubi list' command arguments parsingDmitry Dunaev1-1/+1
This fixes allowed argc variable value for arguments parsing Fixes: 6de1daf64b1 ("cmd: ubi: Add 'ubi list' command") Signed-off-by: Dmitry Dunaev <dunaev@tecon.ru>
2023-08-15i2c: mvtwsi: reset controller if stuck in "bus error" stateSam Edwards1-0/+42
The MVTWSI controller can act either as a master or slave device. When acting as a master, the FSM is driven by the CPU. As a slave, the FSM is driven by the bus directly. In what is (apparently) a safety mechanism, if the bus transitions our FSM in any improper way, the FSM goes to a "bus error" state (0x00). I could find no documented or experimental way to get the FSM out of this state, except for a controller reset. Since U-Boot only uses the MVTWSI controller as a bus master, this feature only gets in the way: we do not care what happened on the bus previously as long as the bus is ready for a new transaction. So, when trying to start a new transaction, check for this state and reset the controller if necessary. Note that this should not be confused with the "deblocking" technique (used by the `i2c reset` command), which involves pulsing SCL repeatedly if SDA is found to be held low, in an attempt to force the bus back to an idle state. This patch only resets the controller in case something else had previously upset it, and (in principle) results in no externally-observable change in behavior. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2023-08-14Merge tag 'u-boot-rockchip-20230814' of ↵Tom Rini25-119/+1085
https://source.denx.de/u-boot/custodians/u-boot-rockchip - Add board: rk3568 EmbedFire Lubancat 2 - Fixes for rk3568 clock and pinctrl; - Fixes for rk3308 clock and uart; - rk3328 rock64 updates; - Video fix on veyron board;
2023-08-14Merge tag 'video-20230814' of ↵Tom Rini4-2/+7
https://source.denx.de/u-boot/custodians/u-boot-video - fix NULL dereference in vidconsole_measure() - fix simplefb format for raspberrypi-4b - fix typo in Kconfig
2023-08-14pinctrl: rockchip: Fix drive and input schmitt on RK3568Jonas Karlman1-25/+31
On RK3568 most pins have a configurable drive strength of level 0-5 and some pins level 0-11. When rk3568_set_drive is called with a strength value above 7 the drv value written to reg may overflow into the write enable bits, resulting in a bad configuration. This cause e.g. ethernet PHY on Radxa CM3-IO board not to work after drive is configured according to the device tree. Could not get PHY for ethernet@fe010000: addr 0 Level 6-11 can be configured using a second reg for some pins, however the drv value is reused resulting in lower 6 bits being written to reg. Input schmitt is configured in 2-bit fields on RK3568 compared to earlier generation and 2'b10 should be used to enable input schmitt. Change to use regmap_update_bits with a rmask to fix the overflow issue and closer match the linux driver. Bit shift the drv value used for the second reg to configure drive strength level 6-11. Also write correct values for input schmitt setting. Fixes: 1977d746aa54 ("rockchip: rk3568: add rk3568 pinctrl driver") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
generated by cgit v1.2.3 (git 2.39.0) at 2024-07-09 11:13:45 +0300