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2022-06-14imx: phycore_imx8mm/p: clean up board watchdog codePeng Fan2-38/+0
pinctrl_wdog already marked u-boot,dm-spl, so clean up board code. The set_wdog_reset() function is not necessary as this is handled by the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property being set. Signed-off-by: Peng Fan <peng.fan@nxp.com> Tested-by: Teresa Remmet <t.remmet@phytec.de>
2022-06-14imx: imx8mn-kontron-n801x: enable pinctrl_wdog in SPLPeng Fan2-18/+4
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code, The set_wdog_reset() function is not necessary as this is handled by the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property being set. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2022-06-14imx: imx8mp_rsb7320a1: enable wdog driver model in SPLPeng Fan2-12/+8
Mark wdog1/pinctrl_wdog as u-boot,dm-spl to clean up board code, The set_wdog_reset() function is not necessary as this is handled by the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property being set. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-06-14imx: imx8mn_var_som: clean up board watchdog codePeng Fan1-11/+0
pinctrl_wdog already marked u-boot,dm-spl, so clean up board code. The set_wdog_reset() function is not necessary as this is handled by the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property being set. Signed-off-by: Peng Fan <peng.fan@nxp.com> Tested-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
2022-06-14imx: imx8mn-beacon: enable pinctrl_wdog in SPLPeng Fan2-10/+4
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code, The set_wdog_reset() function is not necessary as this is handled by the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property being set. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-06-14imx: imx8mm/n/p-venice: enable pinctrl_wdog in SPLPeng Fan4-29/+12
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code, The set_wdog_reset() function is not necessary as this is handled by the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property being set. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-06-14imx: engicam-imx8mm: drop unused macroPeng Fan1-2/+0
Drop unused WDOG macro Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-06-14imx: imx8mm-cl-iot-gate: enable pinctrl_wdog in SPLPeng Fan2-19/+4
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code, The set_wdog_reset() function is not necessary as this is handled by the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property being set. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-06-14imx: imx8mm_beacon: enable pinctrl_wdog in SPLPeng Fan2-19/+4
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code, The set_wdog_reset() function is not necessary as this is handled by the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property being set. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-06-14configs: drop CONFIG_SPL_ABORT_ON_RAW_IMAGEPeng Fan26-26/+0
CONFIG_SPL_RAW_IMAGE_SUPPORT default y has been used to replace CONFIG_SPL_ABORT_ON_RAW_IMAGE for quite some time, so drop CONFIG_SPL_ABORT_ON_RAW_IMAGE. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-06-14imx: kontron-sl-mx8mm: enable DM_SERIALPeng Fan3-11/+3
Enable CONFIG_DM_SERIAL. uart and its pinmux was already marked with u-boot,dm-spl. Move preloader_console_init after spl_init to make sure driver model work. Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Fabio Estevam <festevam@denx.de> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2022-06-14imx: imx8mn_var_som: enable DM_SERIALPeng Fan3-11/+3
Enable CONFIG_DM_SERIAL. uart and its pinmux was already marked with u-boot,dm-spl. Move preloader_console_init after spl_init to make sure driver model work. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-14imx: imx8m[m/p]_phycore: Enable DM_SERIALPeng Fan6-24/+4
Enable CONFIG_DM_SERIAL. uart and its pinmux was already marked with u-boot,dm-spl. Move preloader_console_init after spl_early_init to make sure driver model work. Signed-off-by: Peng Fan <peng.fan@nxp.com> Tested-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-14imx: imx8mm_icore: Enable SPL_DM_SERIALPeng Fan4-16/+3
Enable CONFIG_SPL_DM_SERIAL. uart2 and its pinmux was already marked with u-boot,dm-spl. Move preloader_console_init after spl_early_init to make sure driver model work. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-14imx: imx8mm-cl-iot-gate: Enable DM_SERIALPeng Fan4-12/+4
Enable CONFIG_DM_SERIAL. uart3 and its pinmux was already marked with u-boot,dm-spl. Move preloader_console_init after spl_early_init to make sure driver model work. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-14imx: imx8m[m/n]_beacon: Enable SPL_DM_SERIALPeng Fan7-26/+4
Enable CONFIG_SPL_DM_SERIAL. uart2 and its pinmux was already marked with u-boot,dm-spl. Move preloader_console_init after spl_init to make sure driver model work. Signed-off-by: Peng Fan <peng.fan@nxp.com> Tested-by: Adam Ford <aford173@gmail.com> #imx8mm_beacon Reviewed-by: Fabio Estevam <festevam@denx.de> Tested-by: Adam Ford <aford173@gmail.com> #imx8mn_beacon
2022-06-14imx: drop CONFIG_MXC_UART_BASEPeng Fan13-32/+0
Since these boards has CONFIG_DM_SERIAL and/or CONFIG_SPL_DM_SERIAL, the legacy macro no need to be defined. Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Soeren Moch <smoch@web.de> Acked-by: Tim Harvey <tharvey@gateworks.com>
2022-06-10Merge branch '2022-06-10-assorted-platform-updates' into nextTom Rini85-31/+7352
- TI J721E hyperflash support, TI OMAP3 updates, TI AM654 updates, TI AM62 initial support, Broadcom bcmbca 47622 SoC support, NPCM7xx pinctrl and rng drivers, Synquacer updates
2022-06-10doc: ti: Add readme for AM62x SKVignesh Raghavendra2-0/+232
Add info of boot flow and build steps for AM62x SK. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com>
2022-06-10configs: Add configs for AM62x SKVignesh Raghavendra4-0/+249
Add am62x_evm_r5_defconfig for R5 SPL and am62x_evm_a53_defconfig for A53 SPL and U-Boot support. To keep the changes to minimum. Only UART And SD boot related configs are included. This should serve as good starting point for new board bringup with AM62x. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> [trini: Migrate a number of CONFIG symbols, have re-tested] Tested-by: Georgi Vlaev <g-vlaev@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-10arm: dts: Add support for AM62-SKNishanth Menon5-0/+2582
AM62 StarterKit (SK) board is a low cost, small form factor board designed for TI’s AM625 SoC. It supports the following interfaces: * 2 GB DDR4 RAM * x2 Gigabit Ethernet interfaces capable of working in Switch and MAC mode * x1 HDMI Port with audio + x1 OLDI/LVDS Display interface for Dual Display * x1 Headphone Jack * x1 USB2.0 Hub with two Type A host and x1 USB Type-C DRP Port * x1 UHS-1 capable µSD card slot * 2.4/5 GHz WLAN + Bluetooth 4.2 through WL1837 * 512 Mbit OSPI flash * x4 UART through UART-USB bridge * XDS110 for onboard JTAG debug using USB * Temperature sensors, user push buttons and LEDs * 40-pin User Expansion Connector * 24-pin header for peripherals in MCU island (I2C, UART, SPI, IO) * 20-pin header for Programmable Realtime Unit (PRU) IO pins * 15-pin CSI header Add basic support for AM62-SK. To keep the changes to minimum. Only UART And SD are supported at the moment. This should serve as good example for adding new board support based on AM62x SoC Schematics: https://www.ti.com/lit/zip/sprr448 Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2022-06-10board: ti: Introduce the basic files to support AM62 SK boardSuman Anna4-0/+107
Add basic support for AM62 SK. This has 2GB DDR. Note that stack for R5 SPL is in OCRAM @ 0x7000ffff so that is away from BSS and does not step on BSS section Add only the bare minimum required to support UART and SD. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-06-10arm: dts: Introduce base AM62 SoC dtsi filesSuman Anna6-0/+849
Introduce the basic AM62 SoC description dtsi files describing most peripherals as per kernel dts. Signed-off-by: Gowtham Tammana <g-tammana@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2022-06-10firmware: ti_sci_static_data: add static DMA chan dataVignesh Raghavendra1-0/+13
Add range of DMA channels available for R5 SPL usage before DM firmware is loaded. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2022-06-10dma: ti: Add PSIL data for AM62x DMASSVignesh Raghavendra4-0/+54
Add PSIL data for AM62x SoC. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2022-06-10arm: mach-k3: am62: Introduce autogenerated SoC dataSuman Anna7-0/+464
Introduce autogenerated SoC data support clk and device data for the AM62. Hook it upto to power-domain and clk frameworks of U-Boot. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2022-06-10arm: mach-k3: Introduce the basic files to support AM62Suman Anna9-3/+415
The AM62 SoC family is the follow on AM335x built on K3 Multicore SoC architecture platform, providing ultra-low-power modes, dual display, multi-sensor edge compute, security and other BOM-saving integration. The AM62 SoC targets broad market to enable applications such as Industrial HMI, PLC/CNC/Robot control, Medical Equipment, Building Automation, Appliances and more. Some highlights of this SoC are: * Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster. Pin-to-pin compatible options for single and quad core are available. * Cortex-M4F for general-purpose or safety usage. * Dual display support, providing 24-bit RBG parallel interface and OLDI/LVDS-4 Lane x2, up to 200MHz pixel clock support for 2K display resolution. * Selectable GPUsupport, up to 8GFLOPS, providing better user experience in 3D graphic display case and Android. * PRU(Programmable Realtime Unit) support for customized programmable interfaces/IOs. * Integrated Giga-bit Ethernet switch supporting up to a total of two external ports (TSN capable). * 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, GPMC for NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio, 1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals. * Dedicated Centralized System Controller for Security, Power, and Resource Management. * Multiple low power modes support, ex: Deep sleep,Standby, MCU-only, enabling battery powered system design. AM625 is the first device of the family. Add DT bindings for the same. More details can be found in the Technical Reference Manual: https://www.ti.com/lit/pdf/spruiv7 Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Gowtham Tammana <g-tammana@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-06-10soc: ti: k3-socinfo: Add entry for AM62X SoC familySuman Anna1-0/+4
Add support for AM62x SoC identification. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-06-10dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM62Suman Anna1-0/+3
Add pinctrl macros for AM62x SoCs. These macro definitions are similar to that of previous platforms, but adding new definitions to avoid any naming confusions in the SoC dts files. checkpatch insists the following error exists: ERROR: Macros with complex values should be enclosed in parentheses However, we do not need parentheses enclosing the values for this macro as we do intend it to generate two separate values as has been done for other similar platforms. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2022-06-10drivers: mmc: am654_sdhci: Add new compatible for AM62 SoCAswath Govindraju1-0/+4
The phy used in the 8 bit instance has been changed to the phy used in 4 bit instance on AM62 SoC. This implies the phy configuration required for both the instances of mmc are similar. Therefore, add a new compatible for AM62 SoC using the driver data of am64 4 bit instance. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-06-10rng: nuvoton: Add NPCM7xx rng driverJim Liu3-0/+164
Add Nuvoton BMC NPCM750 rng driver. Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-06-10configs: am65_evm_r5_usb*_defconfig: Sync the checks for size of image and ↵Aswath Govindraju2-0/+10
stack from generic r5 defconfig Sync the configs required for enabling checks for size of image and stack from generic r5 defconfig file. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-06-10arm: mach-k3: am6_init: Fix the path and value's length in the fixup ↵Aswath Govindraju1-2/+2
performed for usb boot The node name of the bus in the device tree has changed. Also, the length argument to be passed should be the length of new value. Therefore, fix the path to usb device tree node as well as the length argument passed. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-06-10arm: dts: k3-am654-r5-base-board: Fix the dt properties in usb0 instanceAswath Govindraju2-1/+2
For dfu boot mode, the clocks property needs to be deleted and dr_mode needs to be set to peripheral. Therefore, add the required fixes for the same. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-06-10spi: synquacer: simplify tx completion checkingMasahisa Kojima1-6/+4
There is a TX-FIFO and Shift Register empty(TFES) status bit in spi controller. This commit checks the TFES bit to wait the TX transfer completes. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Signed-off-by: Satoru Okamoto <okamoto.satoru@socionext.com> Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-06-10spi: synquacer: DMSTART bit must not be set while transferringMasahisa Kojima1-3/+5
DMSTART bit must not be set while there is active transfer. This commit sets the DMSTART bit only when the transfer begins. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Signed-off-by: Satoru Okamoto <okamoto.satoru@socionext.com> Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-06-10spi: synquacer: wait until slave is deselectedMasahisa Kojima1-0/+7
synquacer_cs_set() function does not wait the chip select is deasserted when the driver sets the DMSTOP to deselect the slave. This commit checks the Slave Select Released(SRS) bit to wait until the slave is deselected. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Signed-off-by: Satoru Okamoto <okamoto.satoru@socionext.com> Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-06-10spi: synquacer: busy variable must be initialized before useMasahisa Kojima1-1/+1
"busy" variable is ORed without being initialized, must be zeroed before use. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Signed-off-by: Satoru Okamoto <okamoto.satoru@socionext.com> Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-06-10pinctrl: nuvoton: Add NPCM7xx pinctrl driverJim Liu5-0/+1620
Add Nuvoton BMC NPCM750 Pinmux and Pinconf support. Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-06-10ARM: omap3: evm: Fix 'fitImage' bootingDerald D. Woods1-2/+5
This commit sets two additional variables in the default BOOTCOMMAND. Adding 'boot=mmc' and 'addr_fit=0x8b000000' removes the need for a special 'uEnv.txt' to be created. The 'addr_fit' variable is the key piece here. It is normally defined as 0x90000000, in the macro DEFAULT_FIT_TI_ARGS. For this OMAP34XX board, 0x8b000000 works without touching other varibles. This was tested with a 'fitImage' created using the following FIT source: ---------------------------------------------------------------------- /dts-v1/; / { description = "Simple image with single Linux kernel and FDT blob"; #address-cells = <1>; images { kernel { description = "Linux kernel: omap2plus"; data = /incbin/("./zImage"); type = "kernel"; arch = "arm"; os = "linux"; compression = "none"; load = <0x80008000>; entry = <0x80008000>; hash-1 { algo = "sha256"; }; }; fdt-omap3-evm.dtb { description = "FDT: omap3-evm.dtb"; data = /incbin/("./omap3-evm.dtb"); type = "flat_dt"; arch = "arm"; compression = "none"; load = <0x8ff00000>; hash-1 { algo = "sha256"; }; }; }; configurations { default = "conf-omap3-evm.dtb"; conf-omap3-evm.dtb { description = "Boot Linux kernel with FDT blob"; kernel = "kernel"; fdt = "fdt-omap3-evm.dtb"; }; }; }; ---------------------------------------------------------------------- Additionally, the default environment is now stored in "uboot.env" on the FAT partition of MMC '0'. Fixes: 11e2ab3f0b ("ARM: omap3: evm: Enable booting 'fitImage' with DEFAULT_FIT_TI_ARGS") Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2022-06-10ARM: omap3: evm: Complete DM_I2C migrationDerald D. Woods1-2/+2
This commits enables DM_I2C and sets the default bus to 0. Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2022-06-10ARM: omap3: evm: Power on MMC when setting up PMICDerald D. Woods1-7/+1
This commit copies the related code changes from the BeagleBoard. Reference: - https://source.denx.de/u-boot/u-boot/-/commit/848cfe098f59c47a2542385513fb554430b874d6 Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2022-06-10arm: bcmbca: introduce the bcmbca architecture and 47622 SOCWilliam Zhang15-0/+315
This is the initial support for Broadcom's ARM-based 47622 SOC. In this change, our first SOC is an armv7 platform called 47622. The initial support includes a bare-bone implementation and dts with ARM PL011 uart. The SOC-specific code resides in arch/arm/mach-bcmbca/<soc> and board related code is in board/broadcom/bcmba. The u-boot image can be loaded from flash or network to the entry point address in the memory and boot from there. Signed-off-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Kursad Oney <kursad.oney@broadcom.com> Signed-off-by: Anand Gore <anand.gore@broadcom.com> Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-06-10configs: j721e_evm_defconfig: Add HBMC related configsVaishnav Achath3-0/+23
Enable HBMC and HyperFlash in R5SPL, A72 SPL and A72 U-Boot Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> [trini: Update j721e_hs_evm_a72 as well] Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-10ti: j721e: enable hyperflash spl fixup for j721eVaishnav Achath1-3/+54
On j721e, its not possible to use OSPI0 and HBMC simultaneously as they are muxed within the Flash Subsystem hence disable HBMC by default and keep OSPI enabled. Bootloader will fixup DT when it detects HyperFlash mux selection instead of OSPI. Also updated detect_enable_hyperflash to use correct GPIO when checking hypermux selection state: * J7200 - hypermux sel connected to WKUP_GPIO0_6 * J721E - hypermux·sel·connected·to·WKUP_GPIO0_8 Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
2022-06-10configs: j721e_evm.h: define CONFIG_SYS_FLASH_BASEVaishnav Achath1-0/+2
Define CONFIG_SYS_FLASH_BASE to indicate start address of Flash memory Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
2022-06-10arm: k3: sysfw-loader: add hyperflash supportVaishnav Achath1-0/+28
add support for loading system firmware from hyperflash. Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
2022-06-10arm: dts: k3-j721e-common-proc-board: enable hyperflash mux sel GPIOVaishnav Achath1-0/+11
Add wkup_gpio pinmux setting which will be used for performing the DT fixup for hbmc node according to mux selection state, on J721E EVM, hypermux sel is tied to ·WKUP_GPIO0_8. Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
2022-06-10arm: dts: k3-j721e-common-proc-board-u-boot: enable HyperFlash in SPLVaishnav Achath1-0/+24
add u-boot,dm-spl pre-relocation property to enable hbmc in SPL. Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
2022-06-10arm: dts: k3-j721e-r5-common-proc-board: Add HyperFlash nodeVaishnav Achath1-0/+45
J721e SoM as a 64MB HyperFlash on board. Add pinmux and DT node for the same. Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
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