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2021-04-27fs: btrfs: fix the false alert of decompression failureQu Wenruo1-2/+14
There are some cases where decompressed sectors can have padding zeros. In kernel code, we have lines to address such situation: /* * btrfs_getblock is doing a zero on the tail of the page too, * but this will cover anything missing from the decompressed * data. */ if (bytes < destlen) memset(kaddr+bytes, 0, destlen-bytes); kunmap_local(kaddr); But not in U-boot code, thus we have some reports of U-boot failed to read compressed files in btrfs. Fix it by doing the same thing of the kernel, for both inline and regular compressed extents. Reported-by: Matwey Kornilov <matwey.kornilov@gmail.com> Link: https://bugzilla.suse.com/show_bug.cgi?id=1183717 Fixes: a26a6bedafcf ("fs: btrfs: Introduce btrfs_read_extent_inline() and btrfs_read_extent_reg()") Signed-off-by: Qu Wenruo <wqu@suse.com>
2021-04-27arm: zimage: Use correct symbol to hide messages in SPLSamuel Holland1-7/+5
When zImage support was added to SPL, the messages were hidden to reduce code size. However, the wrong config symbol was used. Since this file is only built when CONFIG_SPL_FRAMEWORK=y, the messages were always hidden. Use the correct symbol so the messages are printed in U-Boot proper. Also use IS_ENABLED to drop the #ifdef. Fixes: 431889d6ad9a ("spl: zImage support in Falcon mode") Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-04-27Prepare v2021.07-rc1Tom Rini1-2/+2
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-26Merge https://source.denx.de/u-boot/custodians/u-boot-shTom Rini16-93/+97
- RCar3 improvements
2021-04-26Merge https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini24-127/+596
This fixes the broken H5 Ethernet and updates the R40 and A64 DT files, so nothing really critical.
2021-04-26sunxi: DT: A64: Update devicetree files from Linux 5.12Andre Przywara17-76/+215
Import updated devicetree files from the Linux v5.12 release. Besides some node and audio port renames this changes the PHY modes to either rgmii-id or rgmii-txid. From the board files the Pinephone sees a lot of updates. This also adds the long missing USB PHY property for controller 0, which allows the U-Boot PHY driver to eventually use port 0 in host mode (pending another U-Boot patch). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
2021-04-26sunxi: DT: R40: Update device tree files from Linux 5.12Ivan Uvarov6-49/+375
Update R40 .dts{,i} and dt-binding headers to current version from kernel. Files taken from Linux 5.12-rc1 release (commit fe07bfda2fb9cdef8a4d4008a409bb02f35f1bd8) Signed-off-by: Ivan Uvarov <i.uvarov@cognitivepilot.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-26net: sun8i-emac: Fix pinmux setup for Allwinner H5Andre Przywara1-2/+6
Commit eb5a2b671075 ("net: sun8i-emac: Determine pinmux based on SoC, not EMAC type") switched the pinmux setup over to look at CONFIG_MACH_SUN* symbols, to find the appropriate mux value. Unfortunately this patch missed to check for the H5, which is pin-compatible to the H3, but uses a different Kconfig symbol (because it has ARMv8 vs. ARMv7 cores). Replace the pure SUN8I_H3 symbol with the joint SUNXI_H3_H5 one, which is there to cover the peripherals common to both SoCs. Also explicitly list each supported SoC, and have an error message in the fallback case, to avoid those problems in the future. This fixes Ethernet support on all H5 boards. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Samuel Holland <samuel@sholland.org> # Orange Pi PC2 Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-04-26ARM: rmobile: Enable NVMe support on RCar3Marek Vasut1-0/+1
Enable support for PCIe NVMe devices. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-04-26ARM: rmobile: Enable CONFIG_SYS_FLASH_PROTECTIONMarek Vasut6-6/+9
Enable CONFIG_SYS_FLASH_PROTECTION on Salvator-X(S), ULCB, Ebisu, which means the Spansion HF PPB protection bits can be operated using the 'protect' U-Boot command. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2021-04-26clk: renesas: Synchronize Gen2 MSTP teardown tablesMarek Vasut3-6/+6
Synchronize Gen2 MSTP teardown tables with datasheet Rev.2.00 Feb 01, 2016. This corrects the following bits: - added H2 MSTP3[10] SCIF2 - added H2/M2/E2 MSTP7[29] TCON - removed E2 MSTP5[22] Thermal Sensor - removed E2 MSTP10[31,24:22] SRC0, SRC7:9 Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2021-04-26clk: renesas: Only ever access documented bits in clock driver teardownMarek Vasut7-81/+81
The clock driver used a heavy-handed approach where it turned off all available clocks, while also possibly setting bits which are not documented in the R-Car datasheet. Update the tables so that only the bits which are documented are set or cleared when tearing down the clock driver. Note that the only clock left running before booting Linux are now MFIC, INTC-AP, INTC-EX and SCIF2 / SCIF0 on V3x. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
2021-04-25Merge tag 'mips-pull-2021-04-24' of ↵Tom Rini131-265/+120962
https://source.denx.de/u-boot/custodians/u-boot-mips - MIPS: octeon: fix minor bugs of initial merge - MIPS: octeon: add support for QLM and PCI-E controller - MIPS: octeon: add support for AHCI and SATA - MIPS: octeon: add E1000 ethernet support - MIPS: octeon: add Octeon III NIC23 board - ata/scsi: add support for Big Endian platforms
2021-04-24test/py: Bump py to 1.10.0 for CVE-2020-29651Tom Rini1-1/+1
Bump our py version to 1.10.0 to address CVE-2020-29651. Reported-by: GitHub dependabot Reported-by: Ley Foon Tan <ley.foon.tan@intel.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-24Merge tag 'video-2021-07-rc1-2' of ↵Tom Rini3-88/+72
https://source.denx.de/u-boot/custodians/u-boot-video - search for additional detailed timings in the EDID extension block - rework sunxi DE2 driver and accompanying DW-HDMI platform driver to drop redundant device specific code, and later use the DT as a source of information
2021-04-24Merge tag 'efi-2021-07-rc1-3' of ↵Tom Rini9-26/+75
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2021-07-rc1-3 Documentation fixes UEFI bug fixes: * error handling for capsule updates
2021-04-24video: sunxi: de2: switch to public uclass functionsJernej Skrabec1-19/+10
Currently DE2 driver uses functions which are defined in internal headers. They are not meant to be used outside of uclass framework. Switch DE2 driver to public ones. This has additional benefit that device_probe doesn't need to be called manually. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-24video: sunxi: dw-hdmi: read source_id laterJernej Skrabec1-4/+2
There is no real need to read source_id at probe time. It also doesn't make sense to store it in driver private data since it's already stored in class platform data. While this looks like cleanup (and it is), it's also important for DE2 driver rework because this info will be filled later (after probe is already executed). Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-24video: sunxi: Remove TV probe from DE2Jernej Skrabec1-14/+1
TV driver was never fully implemented. Remove search for it from DE2 driver. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-24video: sunxi: Remove check for ddc-i2c-bus propertyJernej Skrabec1-3/+0
No Allwinner board with DW-HDMI controller use separate I2C bus for EDID read. Remove that check. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-24video: sunxi: Use DW-HDMI hpd functionJernej Skrabec1-28/+6
It turns out that there are two ways how hot plug detection can be done. One is standard way for DW HDMI controller - checking bit 2 in 0x3004 register. Another way is applicable only to Allwinner custom PHY - by checking bit 19 in register 0x10038. Both methods are equally good as far as we know. Use standard method in order to reduce amount of custom code. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-24common: edid: Search for valid timing in extension blockJernej Skrabec1-0/+18
One of my monitors have only 4k@60 timing in base EDID block which is out of range for devices with HDMI 1.4. It turns out that it has additional detailed timings in CTA-861 Extension Block and two of them are appropriate for HDMI 1.4. Add additional search for valid detailed timing in extension block. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Acked-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-24common: edid: extract code for detailed timing searchJernej Skrabec1-21/+28
Code which searches for valid detailed timing entry will be used in more places. Extract it. No functional change is made. However, descriptors are casted to edid_detailed_timing instead of edid_monitor_descriptor. Descriptor can be of either type, but since we're interested only in DTD, it is more fitting to cast to edid_detailed_timing. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-24common: edid: check for digital display earlierJernej Skrabec1-4/+5
When searching for detailed timing in EDID, check for digital display earlier. There is no point parsing other parameters if this flag is not present. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-24video: sunxi: Add mode_valid callback to sunxi_dw_hdmiJernej Skrabec1-0/+7
Currently driver accepts all resolution which won't work on 4k screens. Add validation callback which limits acceptable resolutions to 297 MHz. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-24test/py: Fix efidebug related testsIlias Apalodimas4-19/+19
commit cbea241e935e("efidebug: add multiple device path instances on Boot####") slightly tweaked the efidebug syntax adding -b, -i and -s for the boot image, initrd and optional data. The pytests using this command were adapted as well. However I completely missed the last "" argument, which at the time indicated the optional data and needed conversion as well. This patch is adding the missing -s flag and the tests are back to normal. Fixes: cbea241e935e("efidebug: add multiple device path instances on Boot####") Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviwed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-04-24efi_loader: capsule: return a correct error code at find_boot_device()AKASHI Takahiro1-1/+1
In case of failure at efi_get_variable_int("BootOrder"), we should skip examining boot option variables and return an appropriate error code which is the one the function returned. Fixes: CID 331153 Code maintainability issues (UNUSED_VALUE) Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-04-24efi: Fix ESRT refresh after Capsule updateJose Marinho1-1/+1
Indicated by Coverity Scan CID 331147 The ESRT was being refreshed in situations where the UpdateCapsule procedure failed. In that scenario: 1) the ESRT refresh was superfluous. 2) a failed ESRT refresh return code overwrites the UpdateCapsule error return code. This commit ensures that the ESRT is only refreshed when the UpdateCapsule performs successfully. CC: Heinrich Schuchardt <xypron.glpk@gmx.de> CC: Sughosh Ganu <sughosh.ganu@linaro.org> CC: AKASHI Takahiro <takahiro.akashi@linaro.org> CC: Tom Rini <trini@konsulko.com> CC: Andre Przywara <andre.przywara@arm.com> CC: nd@arm.com Signed-off-by: Jose Marinho <jose.marinho@arm.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-04-24efi_loader: simplify tcg2_create_digest()Ilias Apalodimas1-4/+1
Bumping the digest list count, for all supported algorithms, can be calculated outside of the individual switch statements. So let's do that for every loop iteration instead and simplify the code a bit. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-04-24efi_loader: missing include in efi_string.cHeinrich Schuchardt1-0/+1
To avoid diverging function definitions we need to include efi_loader.h. Fixes: fe179d7fb5c1 ("efi_loader: Add size checks to efi_create_indexed_name()") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-04-24doc: imx: psb: Fix missing setexpr argumentsMarek Vasut1-1/+1
Due to copy-paste error, two of the setexpr arguments were missing. Add the missing arguments. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-04-24doc: fatinfo man-pageHeinrich Schuchardt1-0/+51
Provide a man-page for the fatinfo command. The .rst file was lost in patch 15d9694600fe ("doc: fatinfo man-page"). Fixes: 15d9694600fe ("doc: fatinfo man-page") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-04-23mips: octeon: ebb7304: Add support for some I2C devicesAaron Williams2-1/+15
This patch adds support for the following I2C devices connected to I2C bus 0 on the Octeon EBB7304: - Dallas DS1337 RTC - TLV EEPROM Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23mips: octeon: dts/dtsi: Change UART DT node to use clocks propertyAaron Williams2-4/+2
We already have a clock driver for MIPS Octeon. This patch changes the Octeon DT nodes to supply the clock property via the clock driver instead of using an hard-coded value, which is not correct in all cases. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23mips: octeon: Add Octeon III NIC23 board supportStefan Roese10-0/+670
This patch adds the basic support for the PCIe target board equipped with the Octeon III CN2350 SoC. Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: mrvl, cn73xx.dtsi: Add AHCI/SATA DT nodeStefan Roese1-0/+19
Add the AHCI compatible SATA DT node to the Octeon CN73xx dtsi file. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23scsi: Add ata_swap_buf_le16() to support big-endian platformsStefan Roese1-0/+6
Otherwise the output will look like this on MIPS Octeon NIC23: Device 0: (0:0) Vendor: ATA Prod.: aSDnsi klUrt aII Rev: 4X11 Type: Hard Disk Capacity: 457862.8 MB = 447.1 GB (937703088 x 512) instead of this version: Device 0: (0:0) Vendor: TA Prod.: SanDisk Ultra II Rev: X411 Type: Hard Disk Capacity: 457862.8 MB = 447.1 GB (937703088 x 512) Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23ata: ahci: Fix usage on big-endian platformsStefan Roese1-12/+11
This patch adds a few missing virt_to_phys() to use the correct physical address for DMA operations in the common AHCI code. This is done to support the big-endian MIPS Octeon platform. Additionally the code a cleaned up a bit (remove some empty lines) and made a bit better readable. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23sata: ahci_mvebu.c: Enable AHCI/SATA driver for MIPS OcteonStefan Roese2-2/+3
This patch enables the usage of the MVEBU AHCI/SATA driver. The only changes necessary to support MIPS Octeon via DT based probing are, to add the compatible DT property and the use of dev_remap_addr() so that the correct mapped address is used in the Octeon case (phys != virt). Please note that this driver supports the usage of the "scsi" command and not the "sata" command, since it does not provide an own "scan" function, which is needed for the "sata" cmd support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23mips: octeon: cpu.c: Enable AHCI/SATA supportStefan Roese1-1/+20
For easy AHCI/ SATA integration, this patch adds board_ahci_enable() for the MVEBU AHCI driver, which will be used by this platform. This platform specific "enable" function will setup the proper endian swapping in the AHCI controller so that it can be used by the common AHCI code. Additionally the endian swizzle entry for AHCI in octeon_should_swizzle_table[] is removed, as this enabled the original lowlevel code function, e.g. octeon_configure_qlm(), for the QLM setup to work correctly. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23mips: octeon: cpu.c: Add arch_misc_init() for pci-console & pci-bootcmdStefan Roese1-0/+327
This patch adds the necessary platform infrastructure code, so that the MIPS Octeon drivers "serial_octeon_pcie_console" & "serial_bootcmd" can be used. This is e.g. the bootmem initialization in a compatible way to the Marvell 2013 U-Boot, so that the exisiting PC remote tools like "oct-remote-console" & "oct-remote-load" can be used. This is be done in the newly introduced arch_misc_init(), which calls the necessary init functions when enabled. These patches are in preparation for the MIPS Octeon NIC23 board support, which is a desktop PCIe target board enabling these features. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23serial: serial_octeon_bootcmd.c: Add PCI remote console supportStefan Roese3-0/+194
This patch adds the PCI bootcmd feature for MIPS Octeon, which will be used by the upcoming Octeon III NIC23 board support. It enables the use of the "oct-remote-load" and "oct-remote-bootcmd" on host PC's to communicate with the PCIe target and load images into the onboard memory and issue commands. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23serial: serial_octeon_pcie_console.c: Add PCI remote console supportStefan Roese3-0/+379
This patch adds the PCI remote console feature for MIPS Octeon, which will be used by the upcoming Octeon III NIC23 board support. It enables the use of the "oct-remote-console" tool on host PC's to communicate with the PCIe target. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23mips: octeon: cvmx-coremask.h: Fix cvmx_coremask_dprint() with DEBUG definedStefan Roese1-2/+3
As DEBUG is no Kconfig symbol, we can't use the IS_ENABLED() macros. This patch switches to the unfortunately necessary #ifdef usage again to make it work correctly. Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: cvmx-bootmem: Fix compare in "if" statementStefan Roese1-2/+2
While porting from the Marvell source, I introduced a bug by misplacing the parenthesis. This patch fixes this issue. Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Move CVMX_SYNC from octeon_ddr.h to cvmx-regs.hStefan Roese2-2/+1
This makes is easier to use this macro from non-DDR related files. Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: octeon_ebb7304_defconfig: Enable Octeon PCIe and E1000Stefan Roese1-1/+5
This patch changes the MIPS Octeon defconfig to enable some features for PCIe enablement. This includes CONFIG_BOARD_LATE_INIT to call the board specific serdes init code. With these features enabled, the serdes and PCIe driver including the Intel E1000 driver can be tested on the Octeon EBB7304. Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add Octeon PCIe host controller driverStefan Roese3-0/+166
This patch adds the PCIe host controller driver for MIPS Octeon II/III. The driver mainly consist of the PCI config functions, as all of the complex serdes related port / lane setup, is done in the serdes / pcie code available in the "arch/mips/mach-octeon" directory. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23mips: octeon: octeon_ebb7304: Add board specific QLM init codeAaron Williams1-2/+730
This patch adds the board specific QLM/DLM init code to the Octeon 3 EBB7304 board. The configuration of each port is read from the environment exactly as done in the 2013 U-Boot version to keep the board and it's configuration compatible. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: mrvl, cn73xx.dtsi: Add PCIe controller DT nodeStefan Roese1-0/+16
This patch adds the PCIe controller node to the MIPS Octeon 73xx dtsi file. Signed-off-by: Stefan Roese <sr@denx.de>
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