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2018-08-20lib: crc32: mark function crc32() as __efi_runtimeHeinrich Schuchardt1-12/+14
The function crc32() is needed by the EFI subsystem at runtime. So it has to be linked into the runtime section together with all dependencies. Eliminate empty defines local and ZEXPORT. Mark variables as static which are not exported. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-20efi_loader: avoid NULL dereference in efi_get_memory_map()Heinrich Schuchardt1-1/+3
We should only dereference parameter memory_map_size after checking that it is valid. Fixes: 8e835554b36b ("efi_loader: check parameters of GetMemoryMap") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-20efi_loader: fix a parameter check at CreateEvent()AKASHI Takahiro1-1/+2
The commit 21b3edfc9644 ("efi_loader: check parameters of CreateEvent") enforces a strict parameter check at CreateEvent(). On the other hand, UEFI specification version 2.7, section 7.1, says: The EVT_NOTIFY_WAIT and EVT_NOTIFY_SIGNAL flags are exclusive. If neither flag is specified, the caller does not require any notification concerning the event and the NotifyTpl, NotifyFunction, and NotifyContext parameters are ignored. So the check should be mitigated so as to comply with the specification. Without this patch, EDK2's Shell.efi won't be started. Fixes: 21b3edfc9644 ("efi_loader: check parameters of CreateEvent") Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-20riscv: Include bss subsections in linker scriptAlexander Graf1-1/+1
When we build with -fdata-sections we may end up with bss subsections. Our linker script explicitly lists only a single consecutive bss section though. Adapt the statement to also include subsections. Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-20x86: Enable -fdata-sections alwaysAlexander Graf1-3/+1
We left -fdata-sections disabled for x86_64 before because we encountered random bugs that were at that time inexplicable. Turns out this really was just side effects of missing .bss* statements in the linker scripts. With those fixed, we can enable data sections for all targets. Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-20x86: Include bss subsections in linker scriptAlexander Graf4-4/+4
When we build with -fdata-sections we may end up with bss subsections. Our linker script explicitly lists only a single consecutive bss section though. Adapt the statement to also include subsections. This fixes booting efi-x86_app_defconfig. Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-20efi_loader: relocate pointer to tablesHeinrich Schuchardt1-1/+8
When applying a virtual memory map we have to update the pointer to the list of configuration tables. Fixes: 4182a129ef73 ("efi_loader: allocate configuration table array") Reported-by: Mark Kettenis <mark.kettenis@xs4all.nl> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Tested-by: Mark Kettenis <kettenis@openbsd.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-20Revert "efi_loader: efi_allocate_pages is too restrictive"Stephen Warren1-1/+1
This reverts commit aa909462d01866354f4cd4534db5f571c2cf1fbb. This change caused "dhcp filename" to crash the system on p2371-2180 (Jetson TX1), for example when running test/py. Reverting this change isn't optimal, but at least restores TX1 to a working state. In the future, we should: a) Fix whatever problem causes the crash with this patch applied. This needs further discussion, so isn't something we can immediately do. b) Undo the revert; re-apply the original patch to efi_allocate_pages. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-20sandbox: Move BSS after EFI sectionsAlexander Graf1-3/+2
Something went wrong when writing the sandbox linker scripts and so we ended up with a .bss section marker right before the efi runtime sections. That obviously is a terrible idea, as it may result in overwriting efi runtime code and data. So let's move the .bss identifier behind the efi sections. Signed-off-by: Alexander Graf <agraf@suse.de>
2018-08-17Convert CONFIG_SYS_I2C_DAVINCI to KconfigAdam Ford21-6/+20
This converts the following to Kconfig: CONFIG_SYS_I2C_DAVINCI Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-17Removed unused references to CONFIG_SERIALxAdam Ford36-43/+6
After creating CONS_INDEX and migrating a bunch of boards to it, there are a bunch of defined references to CONFIG_SERIALx which are not referenced in any C code or #ifdef, so they can now be removed Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-17Convert CONFIG_TWL4030_LED et al to KconfigAdam Ford27-16/+23
This converts the following to Kconfig: CONFIG_TWL4030_LED CONFIG_TWL4030_INPUT This also removes dead references to: CONFIG_TWL4030_KEYPAD Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-17Convert CONFIG_VIDEO_OMAP3 to KconfigAdam Ford12-6/+11
This converts the following to Kconfig: CONFIG_VIDEO_OMAP3 Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-17Convert CONFIG_MISC_INIT_R to KconfigAdam Ford447-235/+326
This converts the following to Kconfig: CONFIG_MISC_INIT_R Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Update the defaults logic slightly] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-17Migrate bootlimit to KconfigAlex Kiernan37-6/+31
Migrate boards which set bootlimit in the environment to Kconfig. We exclude gurnard_defconfig which includes a bootlimit=, but doesn't set CONFIG_BOOTCOUNT_LIMIT, so we'd fail to include a bootlimit setting if we migrated it. display5_defconfig and display5_factory_defconfig share a SYS_CONFIG_NAME, but only display5_defconfig enables CONFIG_BOOTCOUNT_LIMIT, so we fail to set bootlimit= in display5_factory_defconfig. This is okay because the display5_factory_defconfig doesn't need to have it set, as it is only meant to prepare the board in the factory. Environment changes for all modified configs as seen from buildman: boards.cfg is up to date. Nothing to do. Summary of 3 commits for 32 boards (8 threads, 1 job per thread) 01: Merge git://git.denx.de/u-boot-x86 arm: + draco etamin rastaban pxm2 display5 thuban rut 02: Add BOOTCOUNT_BOOTLIMIT to set reboot limit 03: Migrate bootlimit to Kconfig - display5_factory: bootlimit=3 Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-08-17Add BOOTCOUNT_BOOTLIMIT to set reboot limitAlex Kiernan2-0/+11
Add ability to set environment bootlimit from Kconfig Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-08-17Convert CONFIG_MII et al to KconfigAdam Ford882-630/+714
This converts the following to Kconfig: CONFIG_MII CONFIG_DRIVER_TI_EMAC Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-08-17dts: Fix typo in OF_LIVE Kconfig helpMichal Simek1-1/+1
Fix typo in Kconfig description. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-17kconfig: fix typo 'parition'Simon Goldschmidt2-2/+2
Replaced misspelled words "parition"/"paritioning" (missing 't') in two Kconfig files by correct words "partition"/"partitioning" Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-08-17Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini5-1/+202
2018-08-17Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini35-627/+800
2018-08-16configs: Migrate CONFIG_NR_DRAM_BANKSTom Rini1017-334/+746
We have the following cases: - CONFIG_NR_DRAM_BANKS was defined, migrate normally - CONFIG_NR_DRAM_BANKS_MAX was defined and then used for CONFIG_NR_DRAM_BANKS after a check, just migrate it over now. - CONFIG_NR_DRAM_BANKS was very oddly defined on p2771-0000-* (to 1024 + 2), set this to 8. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-16Kconfig: Migrate CONFIG_NR_DRAM_BANKSRamon Fried1-0/+6
Move CONFIG_NR_DRAM_BANKS from headers to Kconfig. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-08-16fdt_support: Use CONFIG_NR_DRAM_BANKS if necessaryRamon Fried1-0/+4
If CONFIG_NR_DRAM_BANKS is bigger than the default value (4) define MEMORY_BANKS_MAX as CONFIG_NR_DRAM_BANKS. Fixes: 2a1f4f1758b5 ("Revert "fdt_support: Use CONFIG_NR_DRAM_BANKS if defined"") Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-08-16CONFIG_SYS_GENERIC_BOARD: Finish migrationTom Rini5-28/+0
While we have long since migrated to CONFIG_SYS_GENERIC_BOARD being enabled, we had just a few places left that still referenced or defined it. Update. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-15arm: socfpga: Fix SYSMGR_FPGAINTF_EMACx bit maskLey Foon Tan1-3/+3
Bitmask for EMAC should be bit-0, EMAC1 bit-8 and EMAC2 bit-16. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-14ARM: rmobile: Enable USB PHY on Gen2Marek Vasut1-0/+2
Enable support for USB PHY on the R-Car Gen2. This allows for both of the USB host ports to be used on such boards. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-08-14phy: rcar: Add R-Car Gen2 PHY driverMarek Vasut3-0/+199
Add a PHY driver for the R-Car Gen2 which allows configuring the mux connected to the EHCI controllers and USBHS controller. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-08-14phy: Fix off-by-one error when parsing DT PHY bindingsMarek Vasut1-1/+1
The code fails to copy the last PHY phandle argument, so it is missing from the adjusted phandle args and the consumer cannot use it to determine what the PHY should do. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com>
2018-08-14Prepare v2018.09-rc2Tom Rini1-1/+1
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-14configs: Resync with savedefconfigTom Rini3-23/+1
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-13ARM: socfpga: clk: Convert to clock frameworkMarek Vasut2-218/+40
Use clock framework functions to fetch clock information now that there is a clock driver for Arria10, instead of custom coded register parsing. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13mmc: socfpga: Add clock framework supportMarek Vasut1-9/+31
Add support for fetching the clock frequency both using the legacy method in case clock framework is disabled as well as via the clock framework if it is enabled. This allows for migration to the clock framework on platforms which supports it while not breaking legacy platforms. That said, the legacy method must be removed eventually. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13clk: socfpga: Add initial Arria10 clock driverMarek Vasut3-0/+371
Add clock driver for the Arria10, which allows reading the clock frequency from all the clock described in the DT. The driver also allows enabling and disabling the clock. Reconfiguring frequency is not supported thus far. Since the DT bindings for the SoCFPGA clock are massively misdesigned and the handoff DT adds additional incorrectly described entries to the DT, the driver contains workarounds which attempt to rectify all of those problems. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: dts: socfpga: Add u-boot,dm-pre-reloc to necessary clock nodesMarek Vasut3-0/+50
Add the pre-reloc DT markers to clock nodes needed in SPL and early U-Boot stages. This is required to let the Arria10 clock driver start early and provide clock information for UART and SDMMC. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: socfpga: clk: Drop unused variables on Arria10Marek Vasut1-17/+2
The variables removed in this patch are never used, they are only ever assigned and then waste precious memory. Drop both the assignment and the variables. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: socfpga: clk: Make L4SP and MMC clock calculation Gen5 onlyMarek Vasut1-0/+2
The L4SP and MMC clock precalculation is specific to Gen5, it is not needed on Arria10/Stratix10. Isolate it to Gen5 until there is a proper clock driver for Gen5, at which point this will go away completely. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: socfpga: clk: Obtain handoff base clock via DMMarek Vasut2-12/+27
Bind fixed clock driver to the base clock instantiated in the handoff DT and use DM clock framework to get their clock rate. This replaces the ad-hoc DT parsing present thus far. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: socfpga: Enable DM ethernet on A10Marek Vasut1-0/+2
Enable DM ethernet framework on Arria10, so that the designware GMAC can be probed from DT as it should be. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: socfpga: Remove adhoc ethernet reset and configurationMarek Vasut3-50/+6
Remove ad-hoc ethernet syscon registers configuration and reset support. Reset is now handled by the reset framework and the syscon registers are set in the dwmac_socfpga.c driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: socfpga: Zap unused reset codeMarek Vasut2-126/+0
Remove code from the reset manager that is never called. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13net: designware: socfpga: Add Arria10 extrasMarek Vasut3-0/+152
Add wrapper around the designware MAC driver to handle the SoCFPGA specific configuration bits. On Arria10, this is configuration of syscon phy_intf. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-08-13ARM: socfpga: Zap all the UART handling complexityMarek Vasut5-149/+0
The UART reset handling is now done via reset framework using the SoCFPGA reset driver. The UART console assignment is done using the DM and console framework. Nuke all this comlexity, since it is just duplicating the same functionality, badly. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-08-13ARM: socfpga: Enable DM I2C framework on A10Marek Vasut1-0/+1
Enable the DM I2C framework on Arria10, so that the DM capable Designware I2C driver can handle the reset via DM reset framework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: socfpga: Enable DM reset framework on A10Marek Vasut1-0/+2
Enable the DM reset framework and DM reset driver on Arria10 both in U-Boot and in SPL. This lets U-Boot parse reset control from DT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: dts: socfpga: Add i2c alias to A10 SoCDKMarek Vasut1-0/+1
The A10 SoCDK is missing the I2C bus alias, so DM I2C cannot assign the I2C bus a bus number. Add the missing alias. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: dts: socfpga: Add missing I2C resetsMarek Vasut1-0/+10
The I2Cx resets are missing from DT, so the reset manager cannot control them. Add the missing DT reset entries. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: dts: socfpga: Fix Arria10 GMAC resetsMarek Vasut1-4/+6
Add the GMAC0,1 OCP resets, which must also be ungated for those GMACs to work and add GMAC2 reset and OCP resets which were missing altogether. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: dts: socfpga: Add missing UART resetsMarek Vasut1-0/+2
The UART0 and UART1 resets are missing from DT, so the reset manager cannot control them. Add the missing DT reset entries. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: dts: socfpga: Flag reset manager on A10 as pre-relocMarek Vasut1-0/+2
The Altera reset manager block must be available very early on, since it controls ie. UART resets. Flag it as pre-reloc. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
generated by cgit v1.2.3 (git 2.39.0) at 2024-08-21 10:45:33 +0300