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2016-09-21clk: boston: Providea simple driver for Boston board clocksPaul Burton4-0/+119
2016-09-21dm: syscon: Provide a generic syscon driverPaul Burton1-0/+11
2016-09-21dm: core: Match compatible strings in order of priorityPaul Burton1-37/+41
2016-09-21dm: regmap: Implement simple regmap_read & regmap_writePaul Burton1-0/+20
2016-09-21net: pch_gbe: Make 64 bit safePaul Burton1-10/+10
2016-09-21net: pch_gbe: Use dm_pci_map_bar to discover MMIO basePaul Burton1-5/+3
2016-09-21pci: Flip condition for detecting non-PCI parent devicesPaul Burton1-1/+1
2016-09-21pci: xilinx: Add a driver for Xilinx AXI to PCIe bridgePaul Burton3-0/+228
2016-09-21dt-bindings: Add interrupt-controller/mips-gic.h headerPaul Burton1-0/+9
2016-09-21serial: ns16550: Support clocks via phandlePaul Burton1-3/+18
2016-09-21clk: Use dummy clk_get_by_* functions when CONFIG_CLK is disabledPaul Burton1-1/+1
2016-09-21MIPS: Ensure cache ops complete in mips_cache_resetPaul Burton1-0/+2
2016-09-21MIPS: Clear hazard between TagLo writes & cache opsPaul Burton1-0/+1
2016-09-21MIPS: Ensure Config.K0=2 applies before any memory accessesPaul Burton1-0/+1
2016-09-21MIPS: Malta: Enable CM & L2 supportPaul Burton2-6/+2
2016-09-21MIPS: Join the coherent domain when a CM is presentPaul Burton2-0/+43
2016-09-21MIPS: L2 cache supportPaul Burton6-6/+291
2016-09-21MIPS: Map CM Global Control RegistersPaul Burton5-0/+88
2016-09-21MIPS: Define register names for cache initPaul Burton1-19/+23
2016-09-21MIPS: If we don't need DDR for cache init, init cache firstPaul Burton1-0/+9
2016-09-21MIPS: Preserve Config implementation-defined bitsPaul Burton2-2/+4
2016-09-21MIPS: Enable use of the instruction cache earlierPaul Burton2-8/+13
2016-09-21MIPS: Probe cache line sizes once during bootPaul Burton4-18/+45
2016-09-21MIPS: ath79: Use mach_cpu_init instead of arch_cpu_initPaul Burton1-1/+1
2016-09-21board_f: Add a mach_cpu_init callbackPaul Burton1-0/+6
2016-09-21mips: Add MIPSfpga platform supportZubair Lutfullah Kakakhel8-0/+211
2016-09-21mips: xilfpga: Add device tree filesZubair Lutfullah Kakakhel3-0/+84
2016-09-21net: emaclite: Enable driver for MIPSZubair Lutfullah Kakakhel1-1/+1
2016-09-21net: emaclite: use __raw_readl/writel instead of weird defineZubair Lutfullah Kakakhel1-41/+45
2016-09-21net: emaclite: Use ioremap_nocacheZubair Lutfullah Kakakhel1-1/+3
2016-09-19Revert "Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL"Masahiro Yamada25-1/+24
2016-09-19A20-OLinuXino-Lime2: Enable USB gadget supportTom Rini1-0/+8
2016-09-18Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini86-1179/+1472
2016-09-18Merge branch 'master' of git://www.denx.de/git/u-boot-sunxiTom Rini10-34/+209
2016-09-18Merge branch 'master' of git://www.denx.de/git/u-boot-arcTom Rini1-3/+3
2016-09-18ARM: uniphier: update DRAM init code for LD20 SoCMasahiro Yamada2-62/+447
2016-09-18ARM: uniphier: add PLL init code for LD20 SoCMasahiro Yamada9-5/+234
2016-09-18ARM: uniphier: collect clock/PLL init code into a single directoryMasahiro Yamada13-24/+18
2016-09-18ARM: uniphier: move PLL init code to U-Boot proper where possibleMasahiro Yamada19-495/+365
2016-09-18ARM: uniphier: rename CONFIG_DPLL_SSC_RATE_1PERMasahiro Yamada1-1/+1
2016-09-18ARM: uniphier: move XIRQ pin-mux settings of LD11/LD20Masahiro Yamada5-31/+10
2016-09-18ARM: uniphier: consolidate System Bus pin-mux settings for LD11/LD20Masahiro Yamada6-44/+5
2016-09-18ARM: dts: uniphier: include System Bus pin group node in SPL DTMasahiro Yamada2-0/+8
2016-09-18ARM: uniphier: consolidate NAND pin-mux settingsMasahiro Yamada13-274/+51
2016-09-18ARM: uniphier: remove ad-hoc pin-mux code for sLD3Masahiro Yamada5-58/+0
2016-09-18ARM: uniphier: remove redundant pin-muxing for EA24 pin of sLD3 SoCMasahiro Yamada1-2/+0
2016-09-18ARM: uniphier: select PINCTRL and SPL_PINCTRLMasahiro Yamada6-10/+2
2016-09-18ARM: dts: uniphier: add pinctrl device node and pinctrl propertiesMasahiro Yamada2-0/+43
2016-09-18pinctrl: uniphier: add UniPhier sLD3 pinctrl driverMasahiro Yamada3-0/+135
2016-09-18pinctrl: uniphier: support 4bit-width pin-mux register capabilityMasahiro Yamada2-14/+11
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