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path: root/arch/arm/cpu/armv7/psci-common.c
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2018-05-07psci: arm: remove armv7 function psci_save_target_pcPatrick Delaunay1-7/+0
This function is no more used, and replaced by psci_save which save also context id as requested by PSCI requirements. Even if the context id is not used by Linux, it should be saved and restored in r0 when the CPU_ON is performed. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-07arm: psci: save context id for cpu_on PSCI commandPatrick Delaunay1-0/+14
Save and use the 3rd parameter of PSCI CPU_ON request: context_id. The context_id parameter is only meaningful to the caller. U-Boot PSCI preserves a copy of the value passed in this parameter. Following wakeup from a powerdown state, U-BOOT PSCI places this value in R0 when it first enters the OS. NB: this context id is not (yet?) used by Linux but it is mandatory to be PSCI compliant. update armv7 psci functions: - psci_save_target_pc(): keep for backward compatibility with current platform (only save PC and force context id to 0) => should be removed when all platform migrate to the new API - psci_save(): new API to use by ARMv7 platform with PSCI, save pc (= entry_point_address) and context_id Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-05ARM: Rework and correct barrier definitionsTom Rini1-1/+1
As part of testing booting Linux kernels on Rockchip devices, it was discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for some cases incomplete isb definitions. This was causing a failure to boot of the Linux kernel. In order to solve this problem as well as cover any corner cases that we may also have had a number of changes are made in order to consolidate things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb definitions. This however introduces another complexity. Due to needing to build SPL for 32bit tegra with -march=armv4 we need to borrow the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add a comment about it. Now that we can always know what the target CPU is capable off we can get always do the correct thing for the barrier. The final part of this is that need to be consistent everywhere and call isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the function names in others. Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Sandy Patterson <apatterson@sightlogix.com> Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com> Reported-by: Sandy Patterson <apatterson@sightlogix.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2016-07-15ARM: PSCI: Add helper functions to access per-CPU target PC storageChen-Yu Tsai1-0/+39
Now that we have a data section, add helper functions to save and fetch per-CPU target PC. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>