summaryrefslogtreecommitdiff
path: root/arch/arm/cpu
AgeCommit message (Collapse)AuthorFilesLines
2021-09-01Convert CONFIG_SKIP_LOWLEVEL_INIT et al to KconfigTom Rini10-30/+36
This converts the following to Kconfig: CONFIG_SKIP_LOWLEVEL_INIT CONFIG_SKIP_LOWLEVEL_INIT_ONLY In order to do this, we need to introduce SPL and TPL variants of these options so that we can clearly disable these options only in SPL in some cases, and both instances in other cases. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-01nxp: Migrate CONFIG_DDR_CLK_FREQ to KconfigTom Rini3-7/+7
As this symbol can either be a fixed value or the function get_board_ddr_clk, migration is tricky. Introduce a choice of DYNAMIC or STATIC_DDR_CLK_FREQ. If DYNAMIC, we continue to use the board defined get_board_ddr_clk function. If STATIC, set CONFIG_DDR_CLK_FREQ to that value and now include/clock_legacy.h contains the function prototype or defines get_board_ddr_clk() to that static value. Update callers to test for DYNAMIC or STATIC. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30arm: Migrate GICV2 / GICV3 to KconfigTom Rini1-0/+8
Migrate CONFIG_GICV2 and CONFIG_GICV3 to Kconfig. We still have the GIC related registers that need to be handled more cleanly but start by moving this symbol to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30Convert CONFIG_SYS_I2C_MXC et al to KconfigTom Rini1-0/+1
This converts the following to Kconfig: CONFIG_SYS_I2C_MXC CONFIG_SYS_I2C_MXC_I2C1 CONFIG_SYS_I2C_MXC_I2C2 CONFIG_SYS_I2C_MXC_I2C3 CONFIG_SYS_I2C_MXC_I2C4 Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30Convert CONFIG_SYS_I2C_LEGACY to Kconfig and add CONFIG_[ST]PL_SYS_I2C_LEGACYTom Rini3-2/+7
First, we convert CONFIG_SYS_I2C_LEGACY to Kconfig. Next, as you cannot have SYS_I2C_LEGACY and DM_I2C at the same time, introduce CONFIG_SPL_SYS_I2C_LEGACY so that we can enable the legacy option only in SPL. Finally, for some PowerPC cases we also need CONFIG_TPL_SYS_I2C_LEGACY support. Convert all of the existing users to one or more symbols. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30Convert CONFIG_ID_EEPROM to KconfigTom Rini1-0/+5
This converts the following to Kconfig: CONFIG_ID_EEPROM Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-18armv8: fsl : create bootcmd and mcinitcmd as per boot sourceWasim Khan1-3/+6
NXP platforms expect custom bootcmd and mcinitcmd to be updated as per boot source with default environment. Check env variable fsl_bootcmd_mcinitcmd_set to prepare bootcmd and mcinitcmd Fixes: cbf77d201870 (armv8: fsl-layerscape: Fix automatic setting of bootmcd with TF-A) Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-18arm: Finish migration of HAS_FSL_XHCI_USBTom Rini1-2/+4
This symbol was largely migrated, except for one case. Update it. Cc: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-02global: Convert simple_strtoul() with decimal to dectoul()Simon Glass1-1/+1
It is a pain to have to specify the value 10 in each call. Add a new dectoul() function and update the code to use it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02global: Convert simple_strtoul() with hex to hextoul()Simon Glass1-6/+6
It is a pain to have to specify the value 16 in each call. Add a new hextoul() function and update the code to use it. Add a proper comment to simple_strtoul() while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-29arm64: Update memcpy_{from, to}io() helpersPatrice Chotard1-0/+10
At early U-Boot stage, before relocation, MMU is not yet configured and disabled. DDR may not be configured with the correct memory attributes (can be configured in MT_DEVICE instead of MT_MEMORY). In this case, usage of memcpy_{from, to}io() may leads to synchronous abort in AARCH64 in case the normal memory address is not 64Bits aligned. To avoid such situation, forbid usage of normal memory cast to (u64 *) in case MMU is not enabled. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: mark.kettenis@xs4all.nl Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-28i2c: Rename SPL/TPL_I2C_SUPPORT to I2CSimon Glass1-1/+1
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-28i2c: Rename CONFIG_SYS_I2C to CONFIG_SYS_I2C_LEGACYSimon Glass2-2/+2
It is quite confusing that CONFIG_SYS_I2C selects the legacy I2C and CONFIG_DM_I2C selects the current I2C. The deadline to migrate I2C is less than a year away. Also we want to have a CONFIG_I2C for U-Boot proper just like we have CONFIG_SPL_I2C for SPL, so we can simplify the Makefile rules. Rename this symbol so it is clear it is going away. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-24armv8: Initialize CNTFRQ if at highest exception levelPeter Hoyes1-5/+8
CNTFRQ_EL0 is only writable from the highest supported exception level on the platform. For Armv8-A, this is typically EL3, but technically EL2 and EL3 are optional so it may need to be initialized at EL2 or EL1. For Armv8-R, the highest exception level is always EL2. This patch moves the initialization outside of the switch_el block and uses a new macro branch_if_not_highest_el which dynamically detects whether it is at the highest supported exception level. Linux's docs state that CNTFRQ_EL0 should be initialized by the bootloader. If not set, the the U-Boot prompt countdown hangs. Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
2021-07-09arm: armv8: Fix warning about redeclaring global functions as weakTom Rini1-6/+3
As seen with clang-12: warning: __asm_invalidate_l3_dcache changed binding to STB_WEAK As we indeed use ENTRY and then declare the function weak manually. Use the WEAK declarative from <linux/linkage.h> instead. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-09armv8: Handle EL2 Host modeMark Kettenis1-2/+4
On implementations that support VHE, the layout of the CPTR_EL2 register depends on whether HCR_EL2.E2H is set. If the bit is set, CPTR_EL2 uses the same layout as CPACR_EL1 and can in fact be accessed through that register. In that case, jump to the EL1 code to enable access to the FP/SIMD registers. This allows U-Boot to run on systems that pass control to U-Boot in EL2 with EL2 Host mode enabled such as machines using Apple's M1 SoC. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Acked-by: Marc Zyngier <maz@kernel.org>
2021-07-08arm: Remove spear600 boards and the rest of SPEAr supportTom Rini14-1824/+0
These boards have not been converted to CONFIG_DM_USB by the deadline and is also missing conversion to CONFIG_DM. Remove them. As this is the last of the SPEAr platforms, so remove the rest of the remaining support as well. Cc: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-08arm: Remove spear320 boardsTom Rini3-12/+3
These boards have not been converted to CONFIG_DM_USB by the deadline and is also missing conversion to CONFIG_DM. Remove them. As this is also the last SPEAR3XX platform, remove that symbol as well. Cc: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-08arm: Remove spear310 boardsTom Rini2-6/+2
These boards have not been converted to CONFIG_DM_USB by the deadline and is also missing conversion to CONFIG_DM. Remove them. Cc: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-08arm: Remove spear300 boardsTom Rini2-6/+2
These boards have not been converted to CONFIG_DM_USB by the deadline and is also missing conversion to CONFIG_DM. Remove them. Cc: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-08arm: Remove at91rm9200ek boardsTom Rini1-1/+1
These boards have not been converted to CONFIG_DM_USB by the deadline and is also missing conversion to CONFIG_DM. Remove them. Cc: Andreas Bießmann <andreas@biessmann.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-06arm: iproc: Add higher speed configurationsChris Packham1-13/+16
Add support for 1.3GHz, 1.35GHz and 1.4GHz parts. This is based on equivalent code in Broadcom's LDK 5.0.6. Signed-off-by: Chris Packham <judge.packham@gmail.com>
2021-06-17armv8: Update erratum number to align with docRan Wang2-7/+7
Change the USB erratum number A-050106 to A-050204 as A-050106 is a duplicate and never be published. Fixes 0cfa00cdb94 (“armv8: Add workaround for USB erratum A-050106”) Signed-off-by: Ran Wang <ran.wang_1@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17armv8: ls1012a: Pass PPFE firmware to Linux through FDTChaitanya Sakinam1-1/+149
Read Linux PPFE firmware from flash partition and pass it to Linux through FDT entry. So that we can avoid placing PPFE firmware in Linux rootfs. (FDT may increase at max by 64KB) Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com> Signed-off-by: Anji J <anji.jagarlmudi@nxp.com> Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17armv8: layerscape: enable eMMC HS400 workarounds for LX2160A/LX2162AYangbo Lu1-0/+4
Enable eMMC HS400 workarounds for LX2160A/LX2162A. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17armv8: layerscape: add PSCI support for cpu releaseJiafei Pan3-16/+36
For cpu release command, check whether PSCI is supported firstly, if supported, use PSCI to kick off secondary cores, otherwise still use spin table. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> [Fixed checkpatch alignment CHECKs] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-05-24armv8: SPL: discard relocation informationMarek Behún1-0/+1
For some reason when building SPL for ARMv8 with LTO, the relocation information is not discarded. Discard it explicitly in the linker script. This fixes LTO build for imx8mm_venice_defconfig. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24ARM: kona: fix clk_bsc_enable() type mismatch for LTOMarek Behún1-1/+1
When building with LTO, the compiler complains about type mismatch of function clk_bsc_enable() in file: arch/arm/cpu/armv7/kona-common/clk-stubs.c vs other files that define or use this function: warning: type of ‘clk_bsc_enable’ does not match original declaration. Change the type of this function to that of the other usages. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-24ARM: fix LTO for imx28_xeaMarek Behún2-2/+2
When imx28_xea_defconfig is built with LTO, the compiler complains about the two different declarations of _start: include/asm-generic/sections.h as extern void _start(void); arch/arm/cpu/arm926ejs/mxs/mxs.c as extern uint32_t _start; Fix this. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-24ARM: fix LTO build for some thumb-interwork casesMarek Behún1-0/+2
Fix LTO build for some thumb-interwork usecases (such as for da850evm_defconfig), where inline assmebly such as mrc p15,0,r2,c1,c0,0 causes the compiler to fail during LTO linking with Error: selected processor does not support `mrc p15,0,r2,c1,c0,0' in Thumb mode Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24ARM: make gd a function call for LTO and set via set_gd()Marek Behún1-1/+1
On ARM, the gd pointer is stored in registers r9 / x18. For this the -ffixed-r9 / -ffixed-x18 flag is used when compiling, but using global register variables causes errors when building with LTO, and these errors are very difficult to overcome. Richard Biener says [1]: Note that global register vars shouldn't be used with LTO and if they are restricted to just a few compilation units the recommended fix is to build those CUs without -flto. We cannot do this for U-Boot since all CUs use -ffixed-reg flag. It seems that with LTO we could in fact store the gd pointer differently and gain performance or size benefit by allowing the compiler to use r9 / x18. But this would need more work. So for now, when building with LTO, go the clang way, and instead of declaring gd a global register variable, we make it a function call via macro. [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68384 Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24treewide: Convert macro and uses of __section(foo) to __section("foo")Marek Behún3-4/+4
This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-19Revert "spl: Drop bd_info in the data section"Alexandru Gagniuc1-4/+1
This reverts commit 38d6b7ebdaee3e0e8426ef1b9df88bdce8ae2e75. struct global_data contains a pointer to the bd_info structure. This pointer was populated spl_set_bd() to a pre-allocated bd_info in the ".data" section. The referenced commit replaced this mechanism to one that uses malloc(). That new mechanism is only used if SPL_ALLOC_BD=y. which very few boards do. The result is that (struct global_data)->bd is NULL in SPL on most platforms. This breaks falcon mode, since arch_fixup_fdt() tries to access (struct global_data)->bd and set the "/memory" node in the devicetree. The result is that the "/memory" node contains garbage values, causing linux to panic() as it sets up the page table. Instead of trying to fix the mess, potentially causing other issues, revert to the code that worked, while this change is reworked. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-04-16Merge branch '2021-04-14-assorted-vboot-improvements'Tom Rini1-9/+0
- Add ECDSA support to FIT images - Improve FIT image loadables (incl fpga) support - Further FIT improvements with SPL
2021-04-15armv8: fsl-layerscape: spl: call spl_early_init()Michael Walle1-0/+8
DM_SERIAL needs both the device tree as well as an early heap. Thus, we have to call spl_early_init() to initialize the memory allocator and the setup the device tree. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15armv8: fsl-layerscape: spl: add debug UART supportMichael Walle1-0/+3
To use the debug UART we have to call debug_uart_init() in the SPL. Do so as soon as possible. As an example, here is how you can use it on a LS1028A SoC: CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_BASE=0x21c0500 CONFIG_DEBUG_UART_CLOCK=200000000 Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-14common: fit: Add weak board_fit_config_name_matchSean Anderson1-9/+0
Several architectures had a default board_fit_config_name_match already; this provides a generic weak version. We default to rejecting all configs. This will use the FIT's default config, instead of the first config. This may result in boot failures if there are multiple configurations and the first config is *not* the default. Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2021-04-10arm: Remove s32v234evb boardTom Rini5-470/+1
This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Eddy Petrișor <eddy.petrisor@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-06mmc: fsl_esdhc: add pulse width detection workaroundMichael Walle1-0/+1
HS400 mode on the LS1028A SoC isn't reliable. The linux driver has a workaroung for the pulse width detection. Apply this workaround in u-boot, too. This will make HS400 mode work reliably on the LS1028A SoC. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-06mmc: fsl_esdhc: add workaround for erratum A-011334Michael Walle1-0/+1
LS1028A SoCs are restricted in what divider values are allowed for HS400 mode. This is basically a port from the corresponding linux driver. Signed-off-by: Michael Walle <michael@walle.cc>
2021-03-15Merge tag 'v2021.04-rc4' into nextTom Rini1-0/+10
Prepare v2021.04-rc4
2021-03-05configs: fsl: move bootrom specific defines to KconfigRajesh Bhagat1-0/+10
Moves below bootrom specific defines to Kconfig: CONFIG_SYS_FSL_BOOTROM_BASE CONFIG_SYS_FSL_BOOTROM_SIZE Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-02arm: cp15: remove weak function arm_init_domainsPatrick Delaunay1-3/+0
Remove the unused weak function arm_init_domains used to change the DACR value. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-02reset: Remove addr parameter from reset_cpu()Harald Seiler19-22/+22
Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-16image: Adjust the workings of fit_check_format()Simon Glass1-1/+1
At present this function does not accept a size for the FIT. This means that it must be read from the FIT itself, introducing potential security risk. Update the function to include a size parameter, which can be invalid, in which case fit_check_format() calculates it. For now no callers pass the size, but this can be updated later. Also adjust the return value to an error code so that all the different types of problems can be distinguished by the user. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Bruce Monroe <bruce.monroe@intel.com> Reported-by: Arie Haenel <arie.haenel@intel.com> Reported-by: Julien Lenoir <julien.lenoir@intel.com>
2021-02-15Merge branch '2021-02-02-drop-asm_global_data-when-unused'Tom Rini34-1/+33
- Merge the patch to take <asm/global_data.h> out of <common.h>
2021-02-15arm: Remove ls2080a_simu boardTom Rini1-1/+1
This board has not been converted to CONFIG_DM_MMC by the deadline of v2019.04, which is almost two years ago. In addition there are other DM migrations it is also missing. Remove it. Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08armv7: ls102xa: Enable I-Cache to speed up the boot timeHou Zhiqiang1-0/+2
Enable the I-Cache to speed up the boot time, especailly for the NOR boot, currently it takes about 15 seconds from power up to the U-Boot prompt, and with the I-Cache enabled it only takes around 2.5 seconds. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass34-1/+33
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-02arm: Remove #include <version.h> from armv8/fwcall.cPali Rohár1-1/+0
No version information is used in armv8/fwcall.c therefore do not include version.h header file. This change prevents recompiling fwcall.o when SOURCE_DATE_EPOCH changes. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.2.3 (git 2.39.0) at 2024-07-23 14:16:51 +0300