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path: root/arch/arm/include/asm/system.h
AgeCommit message (Expand)AuthorFilesLines
2022-03-02armv8: Always unmask SErrorsAndre Przywara1-0/+1
2021-09-03Revert most of the series for adding vexpress_aemv8r supportTom Rini1-24/+0
2021-09-02psci: fix double declarationOleksandr Suvorov1-1/+0
2021-09-02armv8: Ensure EL1&0 VMSA is enabledPeter Hoyes1-0/+24
2021-09-02armv8: Disable pointer authentication traps for EL1Peter Hoyes1-0/+15
2021-07-24armv8: Initialize CNTFRQ if at highest exception levelPeter Hoyes1-0/+6
2021-03-02arm: remove set_dacr/get_dacr functionsPatrick Delaunay1-14/+0
2021-03-02arm: cosmetic: align TTB_SECT define valuePatrick Delaunay1-1/+1
2021-03-02arm: remove TTB_SECT_XN_MASK in DCACHE_WRITETHROUGHPatrick Delaunay1-1/+1
2021-01-15common: board_r: Drop initr_noncached wrapperOvidiu Panait1-1/+12
2020-07-29arm: enable allocate-on-read for LPAE's DCACHE_WRITEBACK/_WRITETHROUGHArd Biesheuvel1-4/+19
2020-07-10arm: provide a function for boards init code to modify MMU virtual-physical mapMarek Szyprowski1-0/+13
2020-07-10arm: update comments to the common styleMarek Szyprowski1-9/+14
2020-07-08arm: use correct argument size of special registersHeinrich Schuchardt1-4/+6
2020-06-03ARM: add psci_arch_init() declaration for CONFIG_ARMV7_PSCIMasahiro Yamada1-0/+1
2020-05-18arm: Don't include common.h in header filesSimon Glass1-1/+2
2020-05-01arm: caches: add DCACHE_DEFAULT_OPTIONPatrick Delaunay1-0/+8
2020-01-10arm: cpu: armv8: add support for arm psci reset2.Rajesh Ravi1-0/+1
2019-07-24psci: Fix warnings when compiling with W=1Patrick Delaunay1-0/+15
2018-11-16ARMv8: Enable all asynchronous abort exceptions taken to EL3Chee Hong Ang1-0/+1
2018-05-07arm: v7: Kconfig: Rename CPU_V7 as CPU_V7ALokesh Vutla1-2/+2
2017-11-22arm: make save_boot_params_ret prototype visible for AArch64Philipp Tomsich1-31/+31
2017-10-09armv8: layerscape: Enable falcon bootYork Sun1-2/+2
2017-05-12arm: Support cache invalidateSimon Glass1-0/+15
2017-03-14armv8: mmu: Add a function to change mapping attributesYork Sun1-0/+1
2017-01-18armv8: aarch64: Fix the warning about x1-x3 nonzero issueAlison Wang1-3/+5
2016-12-15ARMv8: Setup PSCI memory and device treemacro.wave.z@gmail.com1-0/+11
2016-11-22armv8: fsl-layerscape: Support loading 32-bit OS with PSCI enabledAlison Wang1-0/+2
2016-11-22armv8: Support loading 32-bit OS in AArch32 execution stateAlison Wang1-2/+117
2016-11-13arm: Set TTB XN bit in case DCACHE_OFF for LPAE modeKeerthy1-1/+1
2016-11-08armv8: add hooks for all cache-wide operationsStephen Warren1-1/+3
2016-10-18arm: Add PSCI shutdown functionAlexander Graf1-0/+1
2016-10-18arm: Disable HVC PSCI calls by defaultAlexander Graf1-10/+1
2016-10-07ARM: Introduce function to switch to hypervisor modeKeerthy1-0/+4
2016-08-05ARM: Rework and correct barrier definitionsTom Rini1-7/+1
2016-05-27arm: implement generic PSCI reset call for armv8Beniamino Galvani1-0/+2
2016-03-27arm: Add support for HYP mode and LPAE page tablesAlexander Graf1-6/+93
2016-03-27arm64: Add 32bit arm compatible dcache definitionsAlexander Graf1-1/+5
2016-03-15arm64: Remove non-full-va map codeAlexander Graf1-8/+4
2016-03-15arm64: Make full va map code more dynamicAlexander Graf1-6/+8
2016-01-31arm: Remove S bit from MMU section entryMarek Vasut1-2/+1
2016-01-31arm: Replace test for CONFIG_ARMV7 with CONFIG_CPU_V7Marek Vasut1-2/+2
2016-01-20armv8: Add Secure Monitor/Hypervisor Call (SMC/HVC) infrastructureSergey Temerkhanov1-0/+21
2016-01-20armv8: New MMU setup code allowing to use 48+ bits PA/VASergey Temerkhanov1-0/+7
2016-01-20armv8: Add read_mpidr() functionSergey Temerkhanov1-0/+11
2015-11-10armv8: enable compilation with CONFIG_SYS_NONCACHED_MEMORYStephen Warren1-5/+6
2015-10-16arm: mmu: Add missing volatile for reading SCTLR registerAlison Wang1-1/+1
2015-07-31armv8: caches: Added routine to set non cacheable regionSiva Durga Prasad Paladugu1-10/+19
2015-05-15arm: Add a prototype for save_boot_params_ret()Simon Glass1-0/+16
2015-05-13tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0Ian Campbell1-0/+1
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