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starfive-tech/u-boot.git
Fedora_JH7100_2021.04
Fedora_JH7100_2021.07
Fedora_JH7100_upstream
Fedora_JH7100_upstream_devel
JH7100_Multimedia_V0.1.0
JH7100_VisionFive_OH_dev
JH7100_VisionFive_devel
JH7100_starlight_multimedia
JH7100_upstream
JH7100_upstream_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
master
rtthread_AMP
visionfive_devel
StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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arch
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arm
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mach-socfpga
/
clock_manager_arria10.c
Age
Commit message (
Expand
)
Author
Files
Lines
2020-05-19
common: Drop linux/delay.h from common header
Simon Glass
1
-0
/
+1
2020-02-06
dm: core: Create a new header file for 'compat' features
Simon Glass
1
-0
/
+1
2020-01-07
arm: socfpga: Convert clock manager from struct to defines
Ley Foon Tan
1
-69
/
+86
2018-08-24
ARM: socfpga: Reorder Arria10 SPL
Marek Vasut
1
-3
/
+8
2018-08-13
ARM: socfpga: clk: Convert to clock framework
Marek Vasut
1
-212
/
+40
2018-08-13
ARM: socfpga: clk: Drop unused variables on Arria10
Marek Vasut
1
-17
/
+2
2018-08-13
ARM: socfpga: clk: Obtain handoff base clock via DM
Marek Vasut
1
-12
/
+25
2018-05-18
ARM: socfpga: Sync A10 clock manager binding parser
Marek Vasut
1
-48
/
+110
2018-05-07
SPDX: Convert all of our single license tags to Linux Kernel style
Tom Rini
1
-2
/
+1
2018-04-27
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
Tom Rini
1
-2
/
+0
2018-01-26
SOCFPGA: clock manager: implement dw_spi_get_clk function
Eugeniy Paltsev
1
-0
/
+9
2017-05-18
arm: socfpga: Add clock driver for Arria 10
Ley Foon Tan
1
-0
/
+1096