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path: root/arch/arm/mach-tegra/tegra210
AgeCommit message (Expand)AuthorFilesLines
2021-04-13Tegra: remove e2220-1170 boardPeter Robinson1-9/+0
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass1-0/+1
2020-05-19common: Drop linux/bitops.h from common headerSimon Glass1-0/+1
2020-05-19common: Drop linux/delay.h from common headerSimon Glass2-0/+2
2020-05-19common: Drop log.h from common headerSimon Glass3-0/+3
2020-05-19common: Drop init.h from common headerSimon Glass1-0/+1
2020-05-19common: Drop net.h from common headerSimon Glass1-0/+1
2020-04-03ARM: tegra: Add NVIDIA Jetson Nano Developer Kit supportTom Warren1-0/+7
2020-04-03i2c: t210: Add VI_I2C clock source supportTom Warren1-4/+4
2020-04-03t210: pinmux: Remove pinmux/GPIO init from T210 boardsTom Warren2-196/+1
2020-04-03t210: do not enable PLLE and UPHY PLL HW PWRSEQJC Kuo2-44/+43
2019-07-10arm64: add an option to switch visibility of CONFIG_SYS_INIT_SP_BSS_OFFSETMasahiro Yamada1-3/+0
2019-06-05ARM: tegra: Remove disp1 clock initialization on Tegra210Thierry Reding1-1/+0
2019-06-05ARM: tegra: Fix mux type for disp1 and disp2 clocks on Tegra210Thierry Reding1-5/+5
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini4-8/+4
2018-01-12ARM: tegra: use CONFIG_SYS_INIT_SP_BSS_OFFSETStephen Warren1-0/+3
2017-10-04treewide: replace with error() with pr_err()Masahiro Yamada1-1/+1
2017-07-28dm: tegra: Convert USB setup to livetreeSimon Glass1-11/+31
2017-01-24Kconfig: Migrate BOARD_LATE_INIT to a selectTom Rini1-0/+4
2016-09-27ARM: tegra: add APIs the clock uclass driver will needStephen Warren1-16/+48
2016-09-27ARM: tegra: add peripheral clock init tableStephen Warren1-0/+23
2016-03-29ARM: tegra210: set PLLE_PTS bit when enabling PLLEStephen Warren1-0/+2
2015-11-12ARM: tegra: note that p2371-2180 is Jetson TX1Stephen Warren1-5/+5
2015-11-12ARM: tegra: error check Tegra210 XUSB padctl waitsStephen Warren1-5/+20
2015-11-12ARM: tegra: add lane tables to Tegra210 XUSB padctlStephen Warren1-4/+74
2015-11-12ARM: tegra: switch Tegra210 to common XUSB padctlStephen Warren2-158/+16
2015-11-12ARM: tegra210: implement PLLE init procedure from TRMStephen Warren1-47/+132
2015-09-17ARM: tegra: clk_m is the architected timer source clockThierry Reding1-6/+4
2015-09-17ARM: tegra: Implement clk_mThierry Reding1-0/+11
2015-09-17ARM: tegra: Add p2371-2180 boardStephen Warren1-0/+9
2015-08-13tegra: Correct logic for reading pll_misc in clock_start_pll()Simon Glass1-0/+7
2015-08-06ARM: tegra: Add p2371-0000 boardStephen Warren1-0/+9
2015-08-06ARM: tegra: Add e2220-1170 boardStephen Warren1-0/+8
2015-08-06Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc.Tom Warren1-1/+30
2015-08-06Tegra: clocks: Add 38.4MHz OSC support for T210 useTom Warren1-2/+6
2015-07-28T210: Add support for 64-bit T210-based P2571 boardTom Warren1-0/+7
2015-07-28ARM: Tegra210: Add SoC code/include files for T210Tom Warren5-0/+1648
2015-03-30ARM: tegra: pinctrl: move Tegra210 code to the correct dirStephen Warren1-0/+195
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