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2023-09-23imx7: Disable CAAM Job Ring 0Fabio Estevam6-0/+18
Trying to boot a fitImage after a successful hab_auth_img operation causes the following error: ## Loading kernel from FIT Image at 88000000 ... Using 'conf-imx7d-smegw01.dtb' configuration Trying 'kernel-1' kernel subimage Description: Linux kernel Type: Kernel Image Compression: uncompressed Data Start: 0x8800010c Data Size: 9901752 Bytes = 9.4 MiB Architecture: ARM OS: Linux Load Address: 0x80800000 Entry Point: 0x80800000 Hash algo: sha256 Hash value: 28f8779bbf010780f16dd3d84ecb9b604c44c5c2cf7acd098c264a2d3f68e969 Verifying Hash Integrity ... sha256Error in SEC deq CAAM was not setup properly or it is faulty error! The reason for this error is that the BootROM uses the CAAM Job Ring 0, so disable its node in U-Boot to avoid the resource conflict. imx8m dtsi files also have the Job Ring 0 disable since the following kernel commit: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/arch?h=v6.5&id=dc9c1ceb555ff661e6fc1081434600771f29657c For a temporary solution, disable the Job Ring 0 in imx7s-u-boot.dtsi. Reported-by: Eduard Strehlau <eduard@lionizers.com> Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-23imx: hab: Explain that ivt_offset is optionalFabio Estevam1-2/+2
The ivt_offset parameter is optional for both hab_auth_img_or_fail and hab_auth_img commands. Document it in their usage texts to make it clearer. Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-23imx: hab: Improve the hab_auth_img_or_fail usage textFabio Estevam1-1/+1
Split the hab_auth_img_or_fail usage text in two sentences to make it clearer. Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-23imx: hab: Allow hab_auth_img_or_fail to be called without ivt_offsetEduard Strehlau1-1/+1
Since commit ea91031b2232 ("imx: hab: extend hab_auth_img to calculate ivt_offset"), it is possible to call the hab_auth_img command without the last ivt_offset argument. Currently, calling hab_auth_img_or_fail without the last ivt_offset parameter causes a failure and the command usage text is shown. Fix this problem by adjusting the argc logic to allow calling hab_auth_img_or_fail with only the address and size parameters. This way, both hab_auth_img and hab_auth_img_or_fail have the same behavior with respect to the allowed number of command parameters. Signed-off-by: Eduard Strehlau <eduard@lionizers.com> Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-23mach-imx: bootaux: fix building with disabled bootelfOleksandr Suvorov1-0/+1
If CMD_ELF disabled and IMX_BOOTAUX enabled, the u-boot building ends up with a linking error [1]. Select LIB_ELF to fix the building issue. [1] ld: /tmp/ccaF1rpv.ltrans0.ltrans.o: in function `do_bootaux': arch/arm/mach-imx/imx_bootaux.c:108: undefined reference to `valid_elf_image' Fixes: c0f037f6a2a ("mach-imx: bootaux: elf firmware support") Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2023-09-17ARM: dts: renesas: Add compatible properties to KSZ9031 Ethernet PHYs on ↵Marek Vasut1-0/+2
Salvator-X boards Add compatible values to Ethernet PHY subnodes representing Micrel KSZ9031 PHYs on R-Car Gen3 Salvator-X boards. This allows software to identify the PHY model at any time, regardless of the state of the PHY reset line. This is a fix for missed addition of these properties on Salvator-X boards. Ported from Linux kernel commit 722d55f3a9bd810f3a1a31916cc74e2915a994ce . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-09-05Merge tag 'u-boot-imx-20230905' of ↵Tom Rini2-6/+7
https://gitlab.denx.de/u-boot/custodians/u-boot-imx Fixes for release ----------------- - imx9: fix DRAM calculation - thermal: fixes - fixed for DM, DH and Gateworks boards CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/17639
2023-09-05nokia_rx51: Remove platformTom Rini2-12/+1
This platform is behind on migrations (it is the sole user of the oldest legacy version of the USB gadget stack and is long overdue for migration) and with Pali no longer being a maintainer, we remove this platform. Signed-off-by: Tom Rini <trini@konsulko.com>
2023-09-04arm: imx: imx8m: imx9: Fix DRAM size calculation due to rom_pointerElena Popa2-6/+7
If dram_init_banksize() is called from SPL, the rom_pointer, at that point, is not correctly initialized. This causes wrong calculation of DRAM start and size in dram_init_banksize(). The issue became apparent only in Falcon Mode. Added an extra condition to prevent using rom_pointer in SPL. Signed-off-by: Elena Popa <elena.popa@nxp.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-08-28Revert "arm: imx: mx7: Move CONFIG_OPTEE_TZDRAM_SIZE from lib/optee"Ricardo Salveti1-8/+0
This reverts commit c5b68ef8af3c2f515c1f5b8d63a69359a85d753b. CONFIG_OPTEE_TZDRAM_SIZE is used by imx6-based SoCs as well. Move the option back. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2023-08-28imx: Drop unneeded phandle in FIT templateSimon Glass7-9/+13
Adding a phandle to a template node is not allowed, since when the node is instantiated multiple times, we end up with duplicate phandles. Drop this invalid constructs. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Tim Harvey <tharvey@gateworks.com>
2023-08-28arm: dts: mediatek: convert gmac link mode to 2500base-x for r3Frank Wunderlich1-2/+2
Ethernet on Bananapi-r3 is broken after commit bd70f3cea353 ("net: mediatek: add support for SGMII 1Gbps auto-negotiation mode") because changes from this commit were not applied to bpi-r3 devicetree too: commit aef54ea16cac ("arm: dts: medaitek: convert gmac link mode to 2500base-x") Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
2023-08-25ARM: dts: stm32mp13: remove shmem for scmi-opteePatrick Delaunay2-22/+0
CFG_STM32MP1_SCMI_SHM_SYSRAM will be disabled by default for STM32MP13x SoCs in next OP-TEE version and the OP-TEE SMCI server uses the OP-TEE native shared memory registered by clients. To be compatible by default with this configuration this patch removes the shared memory in the SCMI configuration and the associated reserved memory in SRAM. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-25ARM: dts: stm32mp15: remove shmem for scmi-opteePatrick Delaunay1-16/+0
Since OP-TEE commit 89ba3422ee80 ("plat-stm32mp1: scmi_server: default use OP-TEE shared memory"), integrated in OP-TEE 3.22.0-rc1 the default configuration for STM32MP15x SoCs changes, CFG_STM32MP1_SCMI_SHM_SYSRAM is disabled by default and the OP-TEE SMCI server uses ithe OP-TEE native shared memory registered by clients. To be compatible by default with this configuration and the next OP-TEE version, this patch removes the SHMEM in the SCMI configuration and the associated reserved memory in the last 4KByte page of SRAM, in the STM32MP15 device tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-20Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-shTom Rini2-25/+32
2023-08-19arm: rmobile: Fix off-by-one error in cpuinfoPaul Barker1-1/+1
In rmobile_cpuinfo_idx() there is an off-by-one error in accessing the rmobile_cpuinfo array. At the end of the loop, i is equal to the array size, i.e. rmobile_cpuinfo[i] accesses one entry past the end of the array. The last entry in the array is a fallback value so the loop should count to ARRAY_SIZE(rmobile_cpuinfo) - 1 instead, this will leave i equal to the index of the fallback value if no match is found. Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-08-18Merge tag 'tegra-for-2023.10-rc1' of ↵Tom Rini22-1/+1312
https://source.denx.de/u-boot/custodians/u-boot-tegra ARM: tegra: Changes for v2023.10-rc1 This adds support for various new Tegra30 boards (ASUS, LG and HTC) and has some other minor enhancements, such as enabling the poweroff command on several Tegra210 and Tegra186 boards.
2023-08-16ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOMMarek Vasut2-4/+32
The DHCOM SoM has two options for supplying ETHRX clock to the DWMAC block and PHY. Either (1) ETHCK_K generates 50 MHz clock on ETH_CLK pad for the PHY and the same 50 MHz clock are fed back to ETHRX via internal eth_clk_fb clock connection OR (2) ETH_CLK is not used at all, MCO2 generates 50 MHz clock on MCO2 output pad for the PHY and the same MCO2 clock are fed back into ETHRX via ETH_RX_CLK input pad using external pad-to-pad connection. Option (1) has two downsides. ETHCK_K is supplied directly from either PLL3_Q or PLL4_P, hence the PLL output is limited to exactly 50 MHz and since the same PLL output is also used to supply SDMMC blocks, the performance of SD and eMMC access is affected. The second downside is that using this option, the EMI of the SoM is higher. Option (2) solves both of those problems, so implement it here. In this case, the PLL4_P is no longer limited and can be operated faster, at 100 MHz, which improves SDMMC performance (read performance is improved from ~41 MiB/s to ~57 MiB/s with dd if=/dev/mmcblk1 of=/dev/null bs=64M count=1). The EMI interference also decreases. Ported from Linux kernel commit 73ab99aad50cd ("ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOM") Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-16ARM: dts: stm32mp: alignment with v6.4Patrick Delaunay10-56/+299
Device tree alignment with Linux kernel v6.4. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-16ARM: stm32: Inhibit PDDS because CSTBYDIS is setMarek Vasut1-1/+1
The PWR_MPUCR CSTBYDIS bit is set, therefore the CA cores can never enter CStandby state and would always end up in CStop state. Clear the PDDS bit, which indicates the CA cores can enter CStandby state as it makes little sense to keep it set with CSTBYDIS also set. This does however fix a problem too. When both PWR_MPUCR and PWR_MCUCR PDDS bits are set, then the chip enters CStandby state even though the PWR_MCUCR CSTBYDIS is set. Clearing the PWR_MPUCR PDDS prevents that from happening. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-08-16ARM: dts: stm32: fix display pinmux for stm32f746-discoDario Binacchi1-1/+1
As reported by the datasheet (DocID027590 Rev 4) for PG12: - AF9 -> LCD_B4 - AF14 -> LCD_B1 So replace AF14 with AF9 for PG12 in the dts. Fixes: fe63d3cfb77ef ("ARM: dts: stm32: Sync DT with v4.20 kernel for stm32f7") Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-15common: return type board_get_usable_ram_topHeinrich Schuchardt6-6/+6
board_get_usable_ram_top() returns a physical address that is stored in gd->ram_top. The return type of the function should be phys_addr_t like the current type of gd->ram_top. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-13ARM: rmobile: Update little‐endian byte order option in srec_cat commandHai Pham1-24/+31
Since srecord v1.60, option "-Little_Endian_CONSTant" is deprecated. Fix the build warnings by updating little‐endian byte order option in srec_cat command when generating loader header. Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-08-12dts: rockchip: rk3308: Avoid warning for serial probe on prerelocMassimo Pegorer1-0/+27
Make device tree complete and consistent for pre relocation phase. Some nodes are missing, causing warnings to be issued on serial port probing during pre relocation phase (uclass_get_device_by_phandle_id fails when called by pinctrl_select_state_full: none of these failures is fatal nor causing issues). Add to *-u-boot.dtsi all required nodes with the 'bootph-some-ram' attribute. Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-12clk: rockchip: rk3308: Support reading UART rate and clock registersMassimo Pegorer2-2/+15
Add support to read RK3308 registers used to configure UART clocks, and thus to get UART rate and baudrate. This fixes clock_get_rate returning error on serial device probing. Moreover, there is no need anymore to use 'clock-frequency' property for UART nodes in *-u-boot.dtsi files for all cases where UART is not inited by U-Boot proper or by SPL o by TPL code but by a preliminary external boot phase (for Rock PI S, UART is inited by external TPL). Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-12rockchip: spl: Drop out of scope debug message related to uart initMassimo Pegorer1-11/+0
Debug uart is no more inited in board_init_f function: remove this debug message from board_init_f. If an earliest-as-possible message after debug uart initialization is needed, enable DEBUG_UART_ANNOUNCE Kconfig option, instead. Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-12rockchip: spl: Drop useless call to debug_uart_initMassimo Pegorer1-2/+0
Since commit 0dba45864b2a ("arm: Init the debug UART") function debug_uart_init is called in crt files _main before calling board_init_f. Therefore, there is no need to call it again inside board_init_f implementation in arm/mach-rockchip/spl.c. Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-12rockchip: rk356x-u-boot: Set max-frequency prop in sdhci nodeJonas Karlman1-2/+1
Most board device trees for RK356x set max-frequency = <200000000> in the sdhci node, some boards like Quartz64 do not. This result in an error message due to sdhci driver trying to set a clock rate of 0 instead of the max-frequency value. rockchip_sdhci_probe clk set rate fail! Fix this by setting a common max-frequency in rk356x-u-boot.dtsi. A patch to set default max-frequency of sdhci node in linux is planned. Also remove the forced status = "okay" for the sdhci and sdmmc0 nodes, boards already set correct state for these nodes. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-12clk: rockchip: rk3568: Fix mask for clk_cpll_div_25m_divJonas Karlman1-1/+1
The field for clk_cpll_div_25m_div in CRU_CLKSEL_CON81 is 6 bits wide, not 5 bits wide as currently defined in CPLL_25M_DIV_MASK. Fix this and the assert so that CPLL_25M can be assigned a 25 MHz rate. Fixes: 4a262feba3a5 ("rockchip: rk3568: add clock driver") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-12rockchip: cru: Enable cpu info support for rk3568Anton2-0/+4
Add cru structure definition in head file to support cpu_info driver. Series-version: 2 Series-changes: 2 Format the patch header, add commit message and signature. Signed-off-by: Anton <vao@asu-vei.ru> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-12rockchip: rk3568: Add EmbedFire Lubancat 2 supportAndy Yan3-0/+761
LubanCat2 is a rk3568 based SBC from EmbedFire. Specification: - Rockchip rk3568 - LPDDR4/4X 1/2/4/8 GB - TF scard slot - eMMC 8/32/64/128 GB - Gigabit ethernet x 2 - HDMI out - USB 2.0 Host x 1 - USB 2.0 Type-C OTG x 1 - USB 3.0 Host x 1 - Mini PCIE interface for WIFI/BT module - M.2 key for 2280 NVME - 40 pin header The dts file is sync from linux mainline. Signed-off-by: Andy Yan <andyshrk@163.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-12rockchip: rv1126: Enable fdtoverlay supportJagan Teki1-0/+1
Add fdtoverlay_addr_r and enable OF_LIBFDT_OVERLAY for the use of DT overlay in RV1126. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-12rockchip: dts: rk3328: rock64: Align spi flash entryPeter Robinson2-2/+2
Align the SPI flash entry with upstream. There's no need to diverge here. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-12rockchip: dts: rk3328: Add rng details to u-boot.dtsiPeter Robinson1-0/+6
Add the rk3328 rng details to the u-boot.dtsi and enable the RNG on the Rock64 to be able to provide a random seed via UEFI. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> (Fix typo message) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-12rockchip: rk3399: remove duplicate call to regulators_enable_boot_onQuentin Schulz1-10/+0
An earlier commit makes the common SPL code call regulators_enable_boot_on and regulators_enable_boot_off before iterating over possible boot media for U-Boot proper. There is therefore no need to do this in the rk3399-specific code, so let's remove it. Cc: Quentin Schulz <foss+uboot@0leil.net> Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-08-09arm64: fsl: layerscape: Remove unused functionsShenlin Liang1-5/+0
Function board_switch_core_volt has not been used since it was defined Signed-off-by: Shenlin Liang <liangshenlin@eswincomputing.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-08-08arm64: smccc: add support for SMCCCv1.2 x0-x17 registersAbdellatif El Khlifi2-1/+72
add support for x0-x17 registers used by the SMC calls In SMCCC v1.2 [1] arguments are passed in registers x1-x17. Results are returned in x0-x17. This work is inspired from the following kernel commit: arm64: smccc: Add support for SMCCCv1.2 extended input/output registers [1]: https://documentation-service.arm.com/static/5f8edaeff86e16515cdbe4c6?token= Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
2023-08-04board: toradex: add verdin am62 supportMarcel Ziswiler10-1/+4663
This adds initial support for the Toradex Verdin AM62 Quad 1GB WB IT V1.0A module and subsequent V1.1 launch configuration SKUs. They are strapped to boot from their on-module eMMC. U-Boot supports booting from the on-module eMMC only, DFU support is disabled for now due to missing AM62x USB support. The device trees were taken straight from Linux v6.5-rc1. Boot sequence is: SYSFW ---> R5 SPL (both in tiboot3.bin) ---> ATF (TF-A) ---> OP-TEE ---> A53 SPL (part of tispl.bin) ---> U-boot proper (u-boot.img) Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Nishanth Menon <nm@ti.com>
2023-08-04arm: dts: k3-binman: fix rcfg_yaml and pcfg_yaml labelsMarcel Ziswiler1-8/+8
Fix rcfg_yaml to really point to rm-cfg.yaml and pcfg_yaml to really point to pm-cfg.yaml which likely is the intention. While at it also add labels for the remaining items like custmpk_pem, dkey_pem, bcfg_yaml_sysfw, scfg_yaml_sysfw, pcfg_yaml_sysfw and rcfg_yaml_sysfw. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com>
2023-08-04arm: mach-k3: am62: fix 2nd mux option of clkout0Marcel Ziswiler1-2/+3
Fix second mux option of clkout0 which should really be DEV_BOARD0_CLKOUT0_IN_PARENT_HSDIV4_16FFT_MAIN_2_HSDIVOUT1_CLK10 rather than twice the same according to [1]. [1] https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/am62x/clocks.html#clocks-for-board0-device Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com>
2023-08-03arch: arm: fsl-layerscape: allow "opt-out" of fsl_setenv_bootcmdMathew McBride1-1/+1
Allow individual Layerscape boards to opt-out of fsl_setenv_bootcmd by declaring the original function as weak. fsl_setenv_bootcmd is used to change the bootcmd based on the TF-A boot source (e.g QSPI vs SD/MMC) for reasons including secure boot / integrity measurements and DPAA2 configuration loading. See previous discussion at [1]. On the Ten64 board, our bootcmd is the same across all TF-A boot sources so we don't want this behaviour. Signed-off-by: Mathew McBride <matt@traverse.com.au> [1] https://patchwork.ozlabs.org/project/uboot/patch/20211110044639.7070-3-matt@traverse.com.au/#2790037 Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-08-03board: traverse: ten64: fix allocation order of MAC addressesMathew McBride1-0/+10
On Ten64 boards, the "serial number" is the MAC address of the first Gigabit Ethernet interface (labelled GE0 on the appliance), and counted up from there. The previous logic did not take into account U-Boot's ordering of the network interfaces. By setting aliases/ethernetX in the device tree we can ensure the U-Boot 'ethX' is the same as the labelled port order on the unit, as well as the one adopted by Linux. Signed-off-by: Mathew McBride <matt@traverse.com.au>
2023-08-03board: mediatek: add MT7988 reference boardsWeijie Gao3-0/+318
This patch adds general board files based on MT7988 SoCs. MT7988 uses one mmc controller for booting from both SD and eMMC, and the pins of mmc controller booting from SD are also shared with one of spi controllers. So two configs are need for these boot types: 1. mt7988_rfb_defconfig - SPI-NOR, SPI-NAND and eMMC 2. mt7988_sd_rfb_defconfig - SPI-NAND and SD Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2023-08-03arm: mediatek: add support for MediaTek MT7988 SoCWeijie Gao7-1/+526
This patch adds basic support for MediaTek MT7988 SoC. This includes files that will initialize the SoC after boot and its device tree. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2023-08-03arm: dts: mediatek: add infracfg registers to support GMAC/USB3 Co-PHYWeijie Gao1-0/+7
This patch adds infracfg to eth node to support enabling GMAC2. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2023-08-03arm: dts: medaitek: convert gmac link mode to 2500base-xWeijie Gao10-20/+20
Now that individual 2.5Gbps SGMII support has been added to mtk-eth, all boards that use 2.5Gbps link with mt7531 must be converted to use "2500base-x" instead of "sgmii". Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2023-08-03arm: dts: enable i2c support for MediaTek MT7981Weijie Gao1-0/+14
This patch enables i2c support for MediaTek MT7981 Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2023-08-03arm: mediatek: retrieve ram_base from dts node for armv8 platformWeijie Gao11-8/+68
Now we use fdtdec_setup_mem_size_base() to get DRAM base from fdt ram node and update gd->ram_base. CFG_SYS_SDRAM_BASE is unused and will be removed. Also, since mt7622 always passes fdt to linux kernel, there's no need to assign value to gd->bd->bi_boot_params. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2023-08-01Merge https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini1-7/+23
- i2c-gpio: Correctly handle new {sda, scl}-gpios bindings (Chris) - mvebu: x240: Use i2c-gpio instead of built in controller (Chris)
2023-07-31board: rockchip: Add Radxa E25 Carrier BoardJonas Karlman4-0/+684
Radxa E25 is a network application carrier board for the Radxa CM3I SoM with a RK3568 SoC. It features dual 2.5G ethernet, mini PCIe, M.2 B Key, USB3, eMMC, SD, nano SIM card slot and a 26-pin GPIO header. Features tested on a Radxa E25 v1.4: - SD-card boot - eMMC boot - USB host - PCIe/Ethernet adapters is detected - SATA Device tree is imported from linux next-20230728. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: FUKAUMI Naoki <naoki@radxa.com>
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