Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2018-12-19 | MIPS: move create_tlb() in an proper header: mipsregs.h | Gregory CLEMENT | 1 | -0/+11 |
2018-12-19 | MIPS: remove local_irq_[save|restore] from CP0 macros | Daniel Schwierzeck | 1 | -7/+0 |
2018-05-07 | SPDX: Convert all of our single license tags to Linux Kernel style | Tom Rini | 1 | -2/+1 |
2016-11-30 | MIPS: fix iand optimize setup of CP0 registers | Daniel Schwierzeck | 1 | -0/+1 |
2016-09-21 | MIPS: Hang if run on a secondary CPU | Paul Burton | 1 | -0/+7 |
2016-09-21 | MIPS: L2 cache support | Paul Burton | 1 | -0/+5 |
2016-09-21 | MIPS: Preserve Config implementation-defined bits | Paul Burton | 1 | -0/+1 |
2016-01-16 | MIPS: sync processor and register definitions with linux-4.4 | Daniel Schwierzeck | 1 | -434/+1061 |
2015-08-21 | mips: Use unsigned int when reading c0 registers | Chris Packham | 1 | -2/+2 |
2013-11-09 | mips32: detect L1 cache sizes if they're not defined | Paul Burton | 1 | -0/+6 |
2010-04-13 | Move architecture-specific includes to arch/$ARCH/include/asm | Peter Tyser | 1 | -0/+1364 |