starfive-tech/u-boot.git - StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2020-05-19	common: Drop net.h from common header	Simon Glass	1	-0/+1
2020-04-09	MIPS: allow override of flush_dcache_range()	Alex Nemirovsky	1	-1/+1
2019-12-03	common: Move some cache and MMU functions out of common.h	Simon Glass	1	-0/+1
2019-10-25	MIPS: add compile time definition of L2 cache size	Ramon Fried	1	-1/+1
2018-09-22	MIPS: cache: reimplement dcache_[status, enable, disable]	Daniel Schwierzeck	1	-0/+20
2018-05-07	SPDX: Convert all of our single license tags to Linux Kernel style	Tom Rini	1	-2/+1
2017-11-28	MIPS: Break out of cache loops for unimplemented caches	Paul Burton	1	-7/+6
2017-11-28	MIPS: Clear instruction hazards in flush_cache()	Paul Burton	1	-0/+4
2017-11-28	MIPS: Ensure cache ops complete in cache maintenance functions	Paul Burton	1	-1/+12
2017-05-12	MIPS: Make CM GCR base configurable	Paul Burton	1	-0/+2
2016-09-21	MIPS: L2 cache support	Paul Burton	1	-1/+61
2016-09-21	MIPS: Probe cache line sizes once during boot	Paul Burton	1	-18/+25
2016-06-10	MIPS: Fix invalidate_dcache_range to operate on L1 Dcache	Paul Burton	1	-1/+1
2016-05-31	MIPS: Abstract cache op loops with a macro	Paul Burton	1	-41/+18
2016-05-31	MIPS: Split I & D cache line size config	Paul Burton	1	-15/+7
2016-05-31	MIPS: Move cache sizes to Kconfig	Paul Burton	1	-1/+1
2016-02-02	mips: cache: Bulletproof the code against cornercases	Marek Vasut	1	-0/+8
2016-01-16	MIPS: sync processor and register definitions with linux-4.4	Daniel Schwierzeck	1	-2/+2
2015-01-29	MIPS: unify cache maintenance functions	Paul Burton	1	-0/+118