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2023-02-10Correct SPL use of OCTEON_SERIAL_PCIE_CONSOLESimon Glass1-1/+1
This converts 1 usage of this option to the non-SPL form, since there is no SPL_OCTEON_SERIAL_PCIE_CONSOLE defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10Correct SPL use of OCTEON_SERIAL_BOOTCMDSimon Glass1-1/+1
This converts 1 usage of this option to the non-SPL form, since there is no SPL_OCTEON_SERIAL_BOOTCMD defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-04mips: octeon: cpu.c: Implement configure_lmtdma_window()Stefan Roese1-1/+33
Import configure_lmtdma_window from Marvell 2013 U-Boot as it's needed for network functionality. Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-04mips: octeon: cpu.c: Move bootmem init to arch_early_init_r()Stefan Roese1-1/+12
Call octeon_bootmem_init() earlier in the boot process, so that this bootmemory infrastructure is already initialized when e.g. the networking support gets probed. Signed-off-by: Stefan Roese <sr@denx.de>
2022-01-19doc: replace @return by Return:Heinrich Schuchardt1-1/+1
Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-04-23mips: octeon: cpu.c: Enable AHCI/SATA supportStefan Roese1-1/+20
For easy AHCI/ SATA integration, this patch adds board_ahci_enable() for the MVEBU AHCI driver, which will be used by this platform. This platform specific "enable" function will setup the proper endian swapping in the AHCI controller so that it can be used by the common AHCI code. Additionally the endian swizzle entry for AHCI in octeon_should_swizzle_table[] is removed, as this enabled the original lowlevel code function, e.g. octeon_configure_qlm(), for the QLM setup to work correctly. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23mips: octeon: cpu.c: Add arch_misc_init() for pci-console & pci-bootcmdStefan Roese1-0/+327
This patch adds the necessary platform infrastructure code, so that the MIPS Octeon drivers "serial_octeon_pcie_console" & "serial_bootcmd" can be used. This is e.g. the bootmem initialization in a compatible way to the Marvell 2013 U-Boot, so that the exisiting PC remote tools like "oct-remote-console" & "oct-remote-load" can be used. This is be done in the newly introduced arch_misc_init(), which calls the necessary init functions when enabled. These patches are in preparation for the MIPS Octeon NIC23 board support, which is a desktop PCIe target board enabling these features. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-10-07mips: octeon: cpu.c: Add table for selective swappingStefan Roese1-0/+21
Import octeon_should_swizzle_table[] which is needed for the area specific swapping. It will be used by the platform specific mangle-port.h header. Imported from Linux v5.7. Signed-off-by: Stefan Roese <sr@denx.de>
2020-07-18mips: octeon: Initial minimal support for the Marvell Octeon SoCAaron Williams1-0/+66
This patch adds very basic support for the Octeon III SoCs. Only CFI parallel NOR flash and UART is supported for now. Please note that the basic Octeon port does not include the DDR3/4 initialization yet. This will be added in some follow-up patches later. To still use U-Boot on with this port, the L2 cache (4MiB on Octeon III CN73xx) is used as RAM. This way, U-Boot can boot to the prompt on such boards. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>