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starfive-tech/u-boot.git
Fedora_JH7100_2021.04
Fedora_JH7100_2021.07
Fedora_JH7100_upstream
Fedora_JH7100_upstream_devel
JH7100_Multimedia_V0.1.0
JH7100_VisionFive_OH_dev
JH7100_VisionFive_devel
JH7100_starlight_multimedia
JH7100_upstream
JH7100_upstream_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
master
rtthread_AMP
visionfive_devel
StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
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path:
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arch
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riscv
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Kconfig
Age
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Author
Files
Lines
2021-07-06
board: riscv: add openpiton-riscv64 SoC support
Tianrui Wei
1
-0
/
+4
2021-05-31
board: sifive: add HiFive Unmatched board support
Green Wan
1
-0
/
+4
2021-05-31
riscv: cpu: fu740: Add support for cpu fu740
Green Wan
1
-0
/
+1
2021-05-17
riscv: Group assembly optimized implementation of memory routines into a submenu
Bin Meng
1
-0
/
+4
2021-05-17
riscv: Split SiFive CLINT support between SPL and U-Boot proper
Bin Meng
1
-1
/
+8
2021-04-08
riscv: assembler versions of memcpy, memmove, memset
Heinrich Schuchardt
1
-0
/
+78
2021-04-08
riscv: sifive: Rename fu540 board to unleashed
Bin Meng
1
-3
/
+3
2021-01-18
riscv: Add DMA 64-bit address support
Padmarao Begari
1
-0
/
+4
2020-10-26
riscv: Move Andes PLMT driver to drivers/timer
Sean Anderson
1
-7
/
+0
2020-10-26
riscv: Only enable OF_BOARD_FIXUP for S-Mode
Sean Anderson
1
-1
/
+1
2020-09-30
riscv: Rework Sifive CLINT as UCLASS_TIMER driver
Sean Anderson
1
-4
/
+0
2020-09-30
riscv: Rework Andes PLMT as a UCLASS_TIMER driver
Sean Anderson
1
-4
/
+0
2020-09-30
riscv: Rework riscv timer driver to only support S-mode
Sean Anderson
1
-8
/
+0
2020-07-06
Merge branch 'next'
Tom Rini
1
-0
/
+14
2020-07-02
riscv: Enable CONFIG_OF_BOARD_FIXUP by default for OF_SEPARATE
Bin Meng
1
-0
/
+3
2020-07-01
riscv: Add Sipeed Maix support
Sean Anderson
1
-0
/
+4
2020-07-01
riscv: Add option to support RISC-V privileged spec 1.9
Sean Anderson
1
-0
/
+10
2020-06-04
riscv: cpu: fu540: Add support for cpu fu540
Pragnesh Patel
1
-0
/
+1
2020-04-23
riscv: Make SBI v0.2 the default SBI version
Bin Meng
1
-1
/
+1
2020-04-23
riscv: Add Kconfig option for SBI v0.2
Bin Meng
1
-1
/
+19
2020-04-23
riscv: Add SMP Kconfig option dependency for U-Boot proper
Bin Meng
1
-0
/
+1
2020-04-23
riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL
Bin Meng
1
-1
/
+12
2020-04-01
Merge branch 'next' of git://git.denx.de/u-boot-usb into next
Tom Rini
1
-0
/
+13
2020-03-17
riscv: Introduce a new config for SBI v0.1
Bin Meng
1
-0
/
+8
2020-03-17
riscv: Add basic support for SBI v0.2
Bin Meng
1
-0
/
+5
2020-03-16
Kconfig: Remove redundant variable sets
Tom Rini
1
-3
/
+0
2020-02-10
riscv: Add option to print registers on exception
Sean Anderson
1
-0
/
+3
2019-12-10
riscv: increase stack size to avoid a stack overflow during distro boot
Lukas Auer
1
-1
/
+1
2019-08-26
riscv: add SPL support
Lukas Auer
1
-0
/
+3
2019-08-26
riscv: add run mode configuration for SPL
Lukas Auer
1
-5
/
+28
2019-06-05
riscv: Add Microchip MPFS Icicle board support
Padmarao Begari
1
-0
/
+4
2019-05-18
CONFIG_SPL_SYS_[DI]CACHE_OFF: add
Trevor Woerner
1
-0
/
+14
2019-05-18
CONFIG_SYS_[DI]CACHE_OFF: convert to Kconfig
Trevor Woerner
1
-0
/
+12
2019-05-09
riscv: Introduce CONFIG_XIP to support booting from flash
Rick Chen
1
-0
/
+7
2019-04-08
riscv: Add a SYSCON driver for Andestech's PLMT
Rick Chen
1
-0
/
+9
2019-04-08
riscv: Add a SYSCON driver for Andestech's PLIC
Rick Chen
1
-0
/
+9
2019-04-08
riscv: add support for multi-hart systems
Lukas Auer
1
-0
/
+4
2019-04-08
riscv: implement IPI platform functions using SBI
Lukas Auer
1
-0
/
+5
2019-04-08
riscv: add infrastructure for calling functions on other harts
Lukas Auer
1
-0
/
+19
2019-02-27
riscv: Add SiFive FU540 board support
Anup Patel
1
-0
/
+4
2019-02-27
riscv: Rename cpu/qemu to cpu/generic
Anup Patel
1
-1
/
+1
2018-12-18
riscv: Enlarge the default SYS_MALLOC_F_LEN
Bin Meng
1
-0
/
+3
2018-12-18
riscv: qemu: Add platform-specific Kconfig options
Bin Meng
1
-0
/
+1
2018-12-18
riscv: Implement riscv_get_time() API using rdtime instruction
Anup Patel
1
-0
/
+8
2018-12-18
riscv: Add a SYSCON driver for SiFive's Core Local Interruptor
Bin Meng
1
-0
/
+9
2018-12-18
riscv: Introduce a Kconfig option for machine mode
Anup Patel
1
-5
/
+16
2018-12-18
riscv: add Kconfig entries for the code model
Lukas Auer
1
-0
/
+18
2018-12-05
riscv: Add kconfig option to run U-Boot in S-mode
Anup Patel
1
-0
/
+5
2018-11-26
riscv: cache: Implement i/dcache [status, enable, disable]
Rick Chen
1
-0
/
+6
2018-11-26
riscv: add Kconfig entries for the C and A ISA extensions
Lukas Auer
1
-0
/
+11
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