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starfive-tech/u-boot.git
Fedora_JH7100_2021.04
Fedora_JH7100_2021.07
Fedora_JH7100_upstream
Fedora_JH7100_upstream_devel
JH7100_Multimedia_V0.1.0
JH7100_VisionFive_OH_dev
JH7100_VisionFive_devel
JH7100_starlight_multimedia
JH7100_upstream
JH7100_upstream_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
master
rtthread_AMP
visionfive_devel
StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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Age
Commit message (
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Author
Files
Lines
2021-08-17
riscv: cpu: fu740: Fix typo of date
Zong Li
1
-1
/
+1
2021-07-28
i2c: Rename SPL/TPL_I2C_SUPPORT to I2C
Simon Glass
1
-1
/
+1
2021-07-06
riscv: sifive: fu740: Support i2c in spl
Zong Li
1
-0
/
+1
2021-07-06
riscv: sifive: fu740: kconfig: Enable support for Opencores I2C controller
Zong Li
1
-0
/
+2
2021-05-31
riscv: cpu: fu740: clear feature disable CSR
Green Wan
1
-0
/
+15
2021-05-31
drivers: clk: add fu740 support
Green Wan
1
-1
/
+1
2021-05-31
riscv: cpu: fu740: Add support for cpu fu740
Green Wan
6
-0
/
+187
2021-05-24
treewide: Convert macro and uses of __section(foo) to __section("foo")
Marek BehĂșn
1
-2
/
+2
2021-05-19
riscv: qemu: Switch to use binman to generate u-boot.itb
Bin Meng
1
-0
/
+1
2021-05-17
riscv: Split SiFive CLINT support between SPL and U-Boot proper
Bin Meng
2
-2
/
+3
2021-05-14
Revert "riscv: cpu: fu740: clear feature disable CSR"
Bin Meng
1
-15
/
+0
2021-05-05
riscv: cpu: fu740: clear feature disable CSR
Green Wan
1
-0
/
+15
2021-05-05
riscv: cpu: Add callback to init each core
Green Wan
2
-0
/
+15
2021-03-27
cpu: Rename SPL_CPU_SUPPORT to SPL_CPU
Simon Glass
3
-3
/
+3
2021-02-15
Merge branch '2021-02-02-drop-asm_global_data-when-unused'
Tom Rini
3
-0
/
+3
2021-02-03
riscv: Adjust board_get_usable_ram_top() for 32-bit
Bin Meng
2
-8
/
+6
2021-02-02
common: Drop asm/global_data.h from common header
Simon Glass
3
-0
/
+3
2020-12-14
riscv: fix the wrong swap value register
Brad Kim
1
-1
/
+1
2020-11-28
riscv: sifive/fu540: kconfig: Enable support for Opencores I2C controller
Pragnesh Patel
1
-0
/
+2
2020-10-26
timer: Add _TIMER suffix to Andes PLMT Kconfig
Sean Anderson
1
-1
/
+1
2020-09-30
riscv: Add some comments to start.S
Sean Anderson
1
-2
/
+17
2020-09-30
riscv: Ensure gp is NULL or points to valid data
Sean Anderson
1
-3
/
+25
2020-09-30
riscv: Consolidate fences into AMOs for available_harts_lock
Sean Anderson
1
-6
/
+3
2020-09-30
riscv: Clear pending IPIs on initialization
Sean Anderson
1
-0
/
+20
2020-09-30
Revert "riscv: Clear pending interrupts before enabling IPIs"
Sean Anderson
1
-2
/
+0
2020-09-30
riscv: Rework riscv timer driver to only support S-mode
Sean Anderson
3
-3
/
+3
2020-08-25
riscv: fu540: Use correct API to get L2 cache controller base address
Bin Meng
1
-1
/
+2
2020-08-14
riscv: sifive: fu540: redundant initialization
Heinrich Schuchardt
1
-1
/
+1
2020-08-14
riscv: sifive/fu540: kconfig: Move FU540 driver related options to the SoC level
Bin Meng
1
-0
/
+22
2020-08-14
riscv: sifive/fu540: spl: Rename soc_spl_init()
Bin Meng
1
-1
/
+1
2020-07-24
riscv: Fix linking error when building u-boot-spl with no SMP support
Leo Yu-Chi Liang
1
-0
/
+2
2020-07-24
env: Enable SPI flash env for SiFive FU540
Jagan Teki
1
-0
/
+13
2020-07-24
riscv: Make SiFive HiFive Unleashed board boot again
Bin Meng
1
-1
/
+1
2020-07-06
Merge branch 'next'
Tom Rini
2
-0
/
+17
2020-07-03
riscv: sifive: fu540: enable all cache ways from U-Boot proper
Pragnesh Patel
2
-0
/
+54
2020-07-01
riscv: Add option to support RISC-V privileged spec 1.9
Sean Anderson
1
-0
/
+9
2020-07-01
riscv: Clean up IPI initialization code
Sean Anderson
1
-0
/
+6
2020-07-01
riscv: Clear pending interrupts before enabling IPIs
Sean Anderson
1
-0
/
+2
2020-06-04
riscv: sifive: fu540: add SPL configuration
Pragnesh Patel
2
-0
/
+27
2020-06-04
riscv: cpu: fu540: Add support for cpu fu540
Pragnesh Patel
4
-0
/
+82
2020-06-04
riscv: Add _image_binary_end for SPL
Pragnesh Patel
1
-0
/
+1
2020-05-19
common: Drop linux/bitops.h from common header
Simon Glass
1
-0
/
+1
2020-05-19
common: Drop init.h from common header
Simon Glass
1
-0
/
+1
2020-05-19
common: Drop net.h from common header
Simon Glass
2
-0
/
+2
2020-04-23
riscv: Provide a mechanism to fix DT for reserved memory
Atish Patra
1
-0
/
+1
2020-04-23
riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL
Bin Meng
1
-7
/
+7
2020-04-23
riscv: Merge unnecessary SMP ifdefs in start.S
Bin Meng
1
-4
/
+0
2020-04-23
riscv: qemu: Remove the simple-bus driver for the SoC node
Bin Meng
1
-14
/
+0
2020-04-23
riscv: ax25: cache: Remove SPL_RISCV_MMODE config check
Pragnesh Patel
1
-8
/
+8
2020-02-10
riscv: Remove unnecessary instruction
Sean Anderson
1
-3
/
+2
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