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starfive-tech/u-boot.git
Fedora_JH7100_2021.04
Fedora_JH7100_2021.07
Fedora_JH7100_upstream
Fedora_JH7100_upstream_devel
JH7100_Multimedia_V0.1.0
JH7100_VisionFive_OH_dev
JH7100_VisionFive_devel
JH7100_starlight_multimedia
JH7100_upstream
JH7100_upstream_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
master
rtthread_AMP
visionfive_devel
StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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log
tree
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path:
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arch
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riscv
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dts
Age
Commit message (
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Files
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2021-07-06
board: riscv: add openpiton-riscv64 SoC support
Tianrui Wei
2
-0
/
+154
2021-06-28
Merge tag 'v2021.07-rc5' into next
Tom Rini
3
-7
/
+61
2021-06-17
k210: dts: Set PLL1 to the same rate as PLL0
Sean Anderson
1
-0
/
+2
2021-06-17
riscv: ae350: dts: Add missing "u-boot, dm-spl" for SPL config
Bin Meng
3
-0
/
+54
2021-06-17
riscv: ae350: dts: Fix #interrupt-cells for plic0 in 32-bit
Bin Meng
1
-1
/
+1
2021-06-17
riscv: ae350: dts: Remove the unnecessary #address-cells in plic nodes
Bin Meng
2
-4
/
+0
2021-06-17
riscv: ae350: dts: Remove the unnecessary space in bootargs
Bin Meng
2
-2
/
+2
2021-06-17
riscv: ae350: dts: Add SPDX license header
Bin Meng
2
-0
/
+4
2021-05-31
riscv: dts: add SiFive Unmatched board support
Green Wan
4
-0
/
+1790
2021-05-31
riscv: dts: add fu740 support
Green Wan
2
-0
/
+434
2021-05-19
riscv: ae350: Switch to use binman to generate u-boot.itb
Bin Meng
2
-0
/
+4
2021-05-19
riscv: qemu: Switch to use binman to generate u-boot.itb
Bin Meng
3
-0
/
+17
2021-05-19
riscv: dts: Sort build targets in alphabetical order
Bin Meng
1
-1
/
+1
2021-05-19
riscv: sifive: unleashed: Switch to use binman to generate u-boot.itb
Bin Meng
2
-0
/
+71
2021-05-14
riscv: Don't reserve AI ram in k210 dts
Sean Anderson
1
-12
/
+0
2021-05-14
riscv: k210: Use AI as the parent clock of aisram, not PLL1
Sean Anderson
1
-1
/
+1
2021-05-14
riscv: k210: Rename airam to aisram
Sean Anderson
1
-2
/
+2
2021-05-14
riscv: Enable some devices pre-relocation
Sean Anderson
1
-0
/
+4
2021-04-08
riscv: dts: mpfs-icicle-kit: Drop 'clock-frequency' in the uart nodes
Bin Meng
1
-4
/
+0
2021-04-08
riscv: sifive: Rename fu540 board to unleashed
Bin Meng
1
-1
/
+1
2021-04-08
riscv: Add watchdog bindings for the k210
Sean Anderson
1
-1
/
+0
2021-02-25
riscv: k210: Enable QSPI for spi3
Sean Anderson
1
-0
/
+2
2021-01-18
riscv: dts: Add device tree for Microchip Icicle Kit
Padmarao Begari
3
-0
/
+436
2020-12-18
riscv: Add device tree bindings for SPI
Sean Anderson
2
-1
/
+47
2020-12-18
spi: dw: Add SoC-specific compatible strings
Sean Anderson
1
-5
/
+8
2020-10-26
riscv: fu540: dts: Correct reg size of clint node
Pragnesh Patel
1
-1
/
+1
2020-10-26
riscv: k210: Reduce DMA block size
Sean Anderson
1
-2
/
+2
2020-10-08
riscv: add DT binding for BOOT button on Maix board
Heinrich Schuchardt
1
-0
/
+11
2020-10-08
riscv: Add pinmux and gpio bindings for Kendryte K210
Sean Anderson
2
-0
/
+116
2020-09-30
riscv: Update SiFive device tree for new CLINT driver
Sean Anderson
2
-2
/
+10
2020-09-30
riscv: Update Kendryte device tree for new CLINT driver
Sean Anderson
1
-3
/
+4
2020-08-04
fu540: dtsi: add reset producer and consumer entries
Sagar Shrikant Kadam
1
-0
/
+12
2020-07-24
riscv: dts: hifive-unleashed-a00: Make memory node available to SPL
Bin Meng
1
-0
/
+4
2020-07-24
sifive: fu540: Add Booting from SPI
Jagan Teki
1
-0
/
+12
2020-07-06
Merge branch 'next'
Tom Rini
4
-0
/
+646
2020-07-03
riscv: sifive: fu540: enable all cache ways from U-Boot proper
Pragnesh Patel
1
-0
/
+4
2020-07-02
riscv: fu540: dts: Correct reg size of otp and dmc nodes
Bin Meng
1
-2
/
+2
2020-07-02
riscv: fu540: dts: Remove the unnecessary space in the cpu2_intc node
Bin Meng
1
-1
/
+1
2020-07-01
riscv: dts: hifive-unleashed-a00: add cpu aliases
Sagar Shrikant Kadam
1
-0
/
+4
2020-07-01
riscv: Add device tree for K210 and Sipeed Maix BitM
Sean Anderson
3
-0
/
+642
2020-06-04
riscv: sifive: fu540: add SPL configuration
Pragnesh Patel
1
-0
/
+5
2020-06-04
riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux
Pragnesh Patel
2
-1
/
+45
2020-06-04
riscv: sifive: dts: fu540: set ethernet clock rate
Pragnesh Patel
1
-0
/
+5
2020-06-04
riscv: sifive: dts: fu540: add U-Boot dmc node
Pragnesh Patel
1
-0
/
+9
2020-06-04
sifive: dts: fu540: Add DDR controller and phy register settings
Pragnesh Patel
1
-0
/
+1489
2020-06-04
riscv: sifive: dts: fu540: Add board -u-boot.dtsi files
Pragnesh Patel
2
-0
/
+76
2020-06-04
riscv: sifive: fu540: Use OTP DM driver for serial environment variable
Pragnesh Patel
2
-0
/
+16
2020-04-30
sifive: fu540: Enable spi-nor flash support
Jagan Teki
1
-0
/
+1
2020-04-30
riscv: dts: hifive-unleashed-a00: Add -u-boot.dtsi
Jagan Teki
1
-0
/
+10
2019-12-10
riscv: dts: Add #address-cells and #size-cells in nor node
Rick Chen
2
-2
/
+6
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