starfive-tech/u-boot.git - StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2023-07-12	riscv: Rename SiFive CLINT to RISC-V ALINT	Bin Meng	1	-2/+2
2023-02-17	riscv: global_data.h: Correct the comment for PLICSW	Yu Chien Peter Lin	1	-1/+1
2022-11-03	riscv: Rename Andes PLIC to PLICSW	Yu Chien Peter Lin	1	-2/+2
2022-09-26	riscv: Introduce AVAILABLE_HARTS	Rick Chen	1	-0/+2
2022-09-26	spl: introduce SPL_XIP to config	Nikita Shubin	1	-1/+1
2021-05-17	riscv: Split SiFive CLINT support between SPL and U-Boot proper	Bin Meng	1	-1/+1
2020-09-30	riscv: Rework Andes PLMT as a UCLASS_TIMER driver	Sean Anderson	1	-3/+0
2020-09-15	riscv: define function set_gd()	Heinrich Schuchardt	1	-0/+9
2020-07-01	riscv: Add headers for asm/global_data.h	Sean Anderson	1	-0/+2
2020-04-23	riscv: Provide a mechanism to fix DT for reserved memory	Atish Patra	1	-0/+1
2020-04-23	riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL	Bin Meng	1	-1/+1
2019-05-09	riscv: Introduce CONFIG_XIP to support booting from flash	Rick Chen	1	-0/+2
2019-04-08	riscv: Add a SYSCON driver for Andestech's PLMT	Rick Chen	1	-0/+3
2019-04-08	riscv: Add a SYSCON driver for Andestech's PLIC	Rick Chen	1	-0/+3
2019-04-08	riscv: add infrastructure for calling functions on other harts	Lukas Auer	1	-0/+6
2018-12-18	riscv: Save boot hart id to the global data	Bin Meng	1	-0/+1
2018-12-18	riscv: Add a SYSCON driver for SiFive's Core Local Interruptor	Bin Meng	1	-0/+3
2018-05-07	SPDX: Convert all of our single license tags to Linux Kernel style	Tom Rini	1	-2/+1
2018-03-30	riscv: checkpatch: Fix use of volatile	Rick Chen	1	-1/+1
2018-01-12	riscv: nx25: include: Add header files to support RISC-V	Rick Chen	1	-0/+22