Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2022-11-03 | riscv: Rename Andes PLIC to PLICSW | Yu Chien Peter Lin | 1 | -1/+1 |
2020-09-30 | riscv: Rework Andes PLMT as a UCLASS_TIMER driver | Sean Anderson | 1 | -2/+2 |
2019-04-08 | riscv: Add a SYSCON driver for Andestech's PLMT | Rick Chen | 1 | -0/+1 |
2019-04-08 | riscv: Add a SYSCON driver for Andestech's PLIC | Rick Chen | 1 | -2/+1 |
2018-12-18 | riscv: Add a SYSCON driver for SiFive's Core Local Interruptor | Bin Meng | 1 | -0/+19 |