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starfive-tech/u-boot.git
Fedora_JH7100_2021.04
Fedora_JH7100_2021.07
Fedora_JH7100_upstream
Fedora_JH7100_upstream_devel
JH7100_Multimedia_V0.1.0
JH7100_VisionFive_OH_dev
JH7100_VisionFive_devel
JH7100_starlight_multimedia
JH7100_upstream
JH7100_upstream_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
master
rtthread_AMP
visionfive_devel
StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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arch
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riscv
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include
Age
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Author
Files
Lines
2019-04-08
riscv: add infrastructure for calling functions on other harts
Lukas Auer
2
-0
/
+59
2019-02-27
riscv: Enable CONFIG_SYS_BOOT_RAMDISK_HIGH for using initrd
Anup Patel
1
-0
/
+1
2019-02-27
riscv: Add place-holder asm/arch/clk.h for driver compilation
Anup Patel
1
-0
/
+14
2019-02-27
riscv: Add asm/dma-mapping.h for DMA mappings
Anup Patel
1
-0
/
+38
2018-12-18
riscv: Save boot hart id to the global data
Bin Meng
1
-0
/
+1
2018-12-18
riscv: Add indirect stringification to csr_xxx ops
Bin Meng
1
-7
/
+9
2018-12-18
riscv: Add exception codes for xcause register
Bin Meng
1
-0
/
+15
2018-12-18
riscv: Add CSR numbers
Bin Meng
1
-0
/
+221
2018-12-18
riscv: Add a SYSCON driver for SiFive's Core Local Interruptor
Bin Meng
2
-0
/
+22
2018-12-05
riscv: Add kconfig option to run U-Boot in S-mode
Anup Patel
1
-0
/
+6
2018-11-26
riscv: cache: Implement i/dcache [status, enable, disable]
Rick Chen
1
-0
/
+3
2018-11-26
riscv: do not reimplement generic io functions
Lukas Auer
1
-28
/
+3
2018-11-26
riscv: make use of the barrier functions from Linux
Lukas Auer
2
-7
/
+71
2018-11-26
riscv: fix use of incorrectly sized variables
Lukas Auer
3
-6
/
+10
2018-11-20
Use _AC and UL macros from linux/const.h
Baruch Siach
1
-0
/
+2
2018-10-03
riscv: Remove CSR read/write defines in encoding.h
Bin Meng
1
-46
/
+4
2018-10-03
riscv: Add a helper routine to print CPU information
Bin Meng
1
-0
/
+124
2018-10-03
riscv: Remove mach type
Bin Meng
2
-30
/
+0
2018-10-03
riscv: Remove setup.h
Bin Meng
2
-207
/
+0
2018-09-11
arch: types.h: factor out fixed width typedefs to int-ll64.h
Masahiro Yamada
1
-31
/
+2
2018-05-29
riscv: cpu: nx25: Rename as ax25
Rick Chen
1
-5
/
+5
2018-05-29
SPDX: Convert single license tags to Linux Kernel style
Rick Chen
1
-2
/
+1
2018-05-29
riscv: Add board_quiesce_devices stub
Alexander Graf
1
-0
/
+1
2018-05-29
riscv: Add setjmp/longjmp code
Alexander Graf
1
-0
/
+26
2018-05-16
riscv: Define PLATFORM__CLEAR_BIT for generic_clear_bit()
Bryan O'Donoghue
1
-0
/
+2
2018-05-16
riscv: Define PLATFORM__SET_BIT for generic_set_bit()
Bryan O'Donoghue
1
-0
/
+2
2018-05-07
SPDX: Convert all of our single license tags to Linux Kernel style
Tom Rini
13
-27
/
+13
2018-03-30
riscv: bootm: Remove ATAGS
Rick Chen
1
-49
/
+0
2018-03-30
riscv: checkpatch: Fix alignment should match open parenthesis
Rick Chen
2
-19
/
+13
2018-03-30
riscv: checkpatch: Fix use of volatile
Rick Chen
1
-1
/
+1
2018-03-30
riscv: checkpatch: Fix Macro argument reuse
Rick Chen
4
-15
/
+35
2018-01-12
riscv: nx25: include: Add header files to support RISC-V
Rick Chen
21
-0
/
+1669
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