starfive-tech/u-boot.git - StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2023-02-10	Correct SPL uses of LMB	Simon Glass	1	-1/+1
2023-02-01	riscv: memcpy: check src and dst before copy	Rick Chen	1	-0/+2
2022-12-29	efi_loader: set IMAGE_FILE_LARGE_ADDRESS_AWARE	Heinrich Schuchardt	1	-5/+12
2022-12-08	arch/riscv: add semihosting support for RISC-V	Kautuk Consul	3	-0/+51
2022-11-03	riscv: Rename Andes PLIC to PLICSW	Yu Chien Peter Lin	2	-14/+14
2022-10-20	riscv: andes_plic.c: use modified IPI scheme	Yu Chien Peter Lin	1	-3/+4
2022-09-29	dm: core: Drop ofnode_is_available()	Simon Glass	2	-2/+2
2022-09-29	treewide: Drop bootm_headers_t typedef	Simon Glass	1	-4/+4
2022-09-26	riscv: Introduce AVAILABLE_HARTS	Rick Chen	2	-0/+4
2022-09-26	spl: introduce SPL_XIP to config	Nikita Shubin	2	-2/+2
2022-07-26	zynqmp: Run board_get_usable_ram_top() only on main U-Boot	Ashok Reddy Soma	1	-1/+1
2022-07-26	arm: riscv: Remove additional ifdef from code guarded by CONFIG_IS_ENABLED	Michal Simek	1	-2/+0
2022-04-06	riscv: provide missing base extension functions	Heinrich Schuchardt	1	-0/+65
2022-03-10	event: Convert arch_cpu_init_dm() to use events	Simon Glass	1	-1/+2
2022-01-15	efi_loader: fix SectionAlignment, FileAlignment	Heinrich Schuchardt	3	-6/+7
2022-01-15	riscv: revert Complete efi header for RV32/64	Heinrich Schuchardt	1	-10/+0
2021-11-08	riscv: function to retrieve SBI implementation version	Heinrich Schuchardt	1	-0/+19
2021-10-14	fdtdec: Support reserved-memory flags	Thierry Reding	1	-1/+1
2021-10-14	fdtdec: Support compatible string list for reserved memory	Thierry Reding	1	-1/+1
2021-10-08	image: Drop IMAGE_ENABLE_OF_LIBFDT	Simon Glass	1	-2/+2
2021-10-07	sysreset: provide SBI based sysreset driver	Heinrich Schuchardt	1	-0/+12
2021-10-07	riscv: Fix setting no-map in reserved memory nodes	Samuel Holland	1	-4/+1
2021-09-23	lmb: riscv: Add arch_lmb_reserve()	Marek Vasut	1	-0/+13
2021-09-07	riscv: lib: implement enable_caches for sifive cache	Zong Li	2	-0/+28
2021-09-07	common: board_r: support enable_caches for RISC-V	Zong Li	1	-0/+4
2021-09-07	riscv: show code leading to exception	Heinrich Schuchardt	1	-0/+33
2021-08-14	efi_loader: add Linux magic to RISC-V crt0	Heinrich Schuchardt	1	-2/+5
2021-07-21	riscv: booti: do not force relocation if force_reloc is not set	Vitaly Wool	1	-1/+6
2021-06-17	riscv: andes_plic: Fix riscv_get_ipi() mask	Bin Meng	1	-1/+3
2021-05-19	riscv: Drop USE_SPL_FIT_GENERATOR	Bin Meng	1	-100/+0
2021-05-17	riscv: Fix memmove and optimise memcpy when misalign	Bin Meng	2	-142/+257
2021-05-17	riscv: Fix arch_fixup_fdt always failing without /chosen	Sean Anderson	1	-4/+7
2021-05-17	riscv: Split SiFive CLINT support between SPL and U-Boot proper	Bin Meng	1	-1/+1
2021-04-20	Add support for stack-protector	Joel Peshkin	1	-0/+1
2021-04-08	riscv: assembler versions of memcpy, memmove, memset	Heinrich Schuchardt	4	-0/+289
2021-04-08	riscv: simplify longjmp	Heinrich Schuchardt	1	-6/+2
2021-02-02	common: Drop asm/global_data.h from common header	Simon Glass	9	-0/+9
2021-01-06	Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into next	Tom Rini	1	-1/+1
2021-01-05	dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()	Simon Glass	1	-1/+1
2020-12-14	riscv: Complete efi header for RV32/64	Leo Yu-Chi Liang	1	-0/+10
2020-12-14	riscv: Fix efi header size for RV32	Leo Yu-Chi Liang	1	-3/+14
2020-12-14	riscv: Fix efi header for RV32	Atish Patra	1	-1/+6
2020-12-14	riscv: reset after crash	Heinrich Schuchardt	1	-4/+4
2020-10-26	riscv: Move timer portions of SiFive CLINT to drivers/timer	Sean Anderson	1	-39/+2
2020-10-26	riscv: Move Andes PLMT driver to drivers/timer	Sean Anderson	2	-51/+0
2020-10-22	timer: Return count from timer_ops.get_count	Sean Anderson	2	-8/+4
2020-10-05	Merge branch 'next'	Tom Rini	8	-126/+98
2020-09-30	riscv: Ensure gp is NULL or points to valid data	Sean Anderson	1	-1/+2
2020-09-30	riscv: Use a valid bit to ignore already-pending IPIs	Sean Anderson	1	-2/+14
2020-09-30	riscv: Match memory barriers between send_ipi_many and handle_ipi	Sean Anderson	1	-0/+2