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starfive-tech/u-boot.git
Fedora_JH7100_2021.04
Fedora_JH7100_2021.07
Fedora_JH7100_upstream
Fedora_JH7100_upstream_devel
JH7100_Multimedia_V0.1.0
JH7100_VisionFive_OH_dev
JH7100_VisionFive_devel
JH7100_starlight_multimedia
JH7100_upstream
JH7100_upstream_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
master
rtthread_AMP
visionfive_devel
StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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riscv
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2021-02-15
Merge branch '2021-02-02-drop-asm_global_data-when-unused'
Tom Rini
12
-0
/
+12
2021-02-03
riscv: Change phys_addr_t and phys_size_t to 64-bit
Bin Meng
1
-2
/
+2
2021-02-03
riscv: Adjust board_get_usable_ram_top() for 32-bit
Bin Meng
2
-8
/
+6
2021-02-02
common: Drop asm/global_data.h from common header
Simon Glass
12
-0
/
+12
2021-01-18
riscv: dts: Add device tree for Microchip Icicle Kit
Padmarao Begari
3
-0
/
+436
2021-01-18
riscv: Add DMA 64-bit address support
Padmarao Begari
2
-0
/
+8
2021-01-06
Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into next
Tom Rini
1
-1
/
+1
2021-01-06
Merge tag 'v2021.01-rc5' into next
Tom Rini
5
-12
/
+87
2021-01-05
dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()
Simon Glass
1
-1
/
+1
2020-12-18
riscv: Add device tree bindings for SPI
Sean Anderson
2
-1
/
+47
2020-12-18
spi: dw: Add SoC-specific compatible strings
Sean Anderson
1
-5
/
+8
2020-12-14
riscv: Complete efi header for RV32/64
Leo Yu-Chi Liang
1
-0
/
+10
2020-12-14
riscv: Fix efi header size for RV32
Leo Yu-Chi Liang
1
-3
/
+14
2020-12-14
riscv: Fix efi header for RV32
Atish Patra
1
-1
/
+6
2020-12-14
riscv: reset after crash
Heinrich Schuchardt
1
-4
/
+4
2020-12-14
riscv: fix the wrong swap value register
Brad Kim
1
-1
/
+1
2020-12-14
dm: treewide: Rename ..._platdata variables to just ..._plat
Simon Glass
2
-2
/
+2
2020-11-28
riscv: sifive/fu540: kconfig: Enable support for Opencores I2C controller
Pragnesh Patel
1
-0
/
+2
2020-10-26
riscv: fu540: dts: Correct reg size of clint node
Pragnesh Patel
1
-1
/
+1
2020-10-26
riscv: Move timer portions of SiFive CLINT to drivers/timer
Sean Anderson
1
-39
/
+2
2020-10-26
timer: Add _TIMER suffix to Andes PLMT Kconfig
Sean Anderson
1
-1
/
+1
2020-10-26
riscv: Move Andes PLMT driver to drivers/timer
Sean Anderson
3
-58
/
+0
2020-10-26
riscv: k210: Reduce DMA block size
Sean Anderson
1
-2
/
+2
2020-10-26
riscv: Only enable OF_BOARD_FIXUP for S-Mode
Sean Anderson
1
-1
/
+1
2020-10-22
timer: Return count from timer_ops.get_count
Sean Anderson
2
-8
/
+4
2020-10-08
riscv: add DT binding for BOOT button on Maix board
Heinrich Schuchardt
1
-0
/
+11
2020-10-08
riscv: Add pinmux and gpio bindings for Kendryte K210
Sean Anderson
2
-0
/
+116
2020-10-05
Merge branch 'next'
Tom Rini
20
-168
/
+189
2020-09-30
riscv: Add some comments to start.S
Sean Anderson
1
-2
/
+17
2020-09-30
riscv: Ensure gp is NULL or points to valid data
Sean Anderson
2
-4
/
+27
2020-09-30
riscv: Consolidate fences into AMOs for available_harts_lock
Sean Anderson
1
-6
/
+3
2020-09-30
riscv: Clear pending IPIs on initialization
Sean Anderson
1
-0
/
+20
2020-09-30
riscv: Use a valid bit to ignore already-pending IPIs
Sean Anderson
2
-2
/
+21
2020-09-30
riscv: Match memory barriers between send_ipi_many and handle_ipi
Sean Anderson
1
-0
/
+2
2020-09-30
Revert "riscv: Clear pending interrupts before enabling IPIs"
Sean Anderson
1
-2
/
+0
2020-09-30
riscv: Update SiFive device tree for new CLINT driver
Sean Anderson
2
-2
/
+10
2020-09-30
riscv: Update Kendryte device tree for new CLINT driver
Sean Anderson
1
-3
/
+4
2020-09-30
riscv: Rework Sifive CLINT as UCLASS_TIMER driver
Sean Anderson
2
-32
/
+34
2020-09-30
riscv: Clean up initialization in Andes PLIC
Sean Anderson
1
-33
/
+25
2020-09-30
riscv: Rework Andes PLMT as a UCLASS_TIMER driver
Sean Anderson
4
-32
/
+23
2020-09-30
riscv: Rework riscv timer driver to only support S-mode
Sean Anderson
6
-50
/
+3
2020-09-28
riscv: restore global data pointer in trap handler
Heinrich Schuchardt
1
-0
/
+3
2020-09-22
fdtdec: optionally add property no-map to created reserved memory node
Etienne Carriere
1
-1
/
+1
2020-09-15
riscv: define function set_gd()
Heinrich Schuchardt
1
-0
/
+9
2020-08-25
cmd: provide command sbi
Heinrich Schuchardt
2
-0
/
+38
2020-08-25
riscv: fix building with CONFIG_SPL_SMP=n
Heinrich Schuchardt
1
-1
/
+1
2020-08-25
riscv: fu540: Use correct API to get L2 cache controller base address
Bin Meng
1
-1
/
+2
2020-08-14
riscv: additional crash information
Heinrich Schuchardt
1
-22
/
+35
2020-08-14
riscv: sifive: fu540: redundant initialization
Heinrich Schuchardt
1
-1
/
+1
2020-08-14
riscv: remove redundant logical constraint.
Heinrich Schuchardt
1
-1
/
+1
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