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starfive-tech/u-boot.git
Fedora_JH7100_2021.04
Fedora_JH7100_2021.07
Fedora_JH7100_upstream
Fedora_JH7100_upstream_devel
JH7100_Multimedia_V0.1.0
JH7100_VisionFive_OH_dev
JH7100_VisionFive_devel
JH7100_starlight_multimedia
JH7100_upstream
JH7100_upstream_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
master
rtthread_AMP
visionfive_devel
StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
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log
tree
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arch
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riscv
Age
Commit message (
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Author
Files
Lines
2023-07-24
riscv: define a cache line size for the generic CPU
Heinrich Schuchardt
1
-0
/
+1
2023-07-24
riscv: dts: jh7110: Add clock source from PLL
Xingyu Wu
3
-6
/
+9
2023-07-24
riscv: dts: jh7110: Add PLL clock controller node
Xingyu Wu
1
-1
/
+7
2023-07-24
riscv: setup per-hart stack earlier
Bo Gan
1
-13
/
+24
2023-07-12
riscv: dts: t-head: Add basic device tree for Sipeed Lichee PI 4A board
Yixun Lan
4
-0
/
+473
2023-07-12
riscv: t-head: licheepi4a: initial support added
Yixun Lan
1
-0
/
+5
2023-07-12
riscv: Rename SiFive CLINT to RISC-V ALINT
Bin Meng
9
-21
/
+21
2023-07-12
riscv: clint: Update the sifive clint ipi driver to support aclint
Bin Meng
2
-1
/
+24
2023-07-12
ram: starfive: Read memory size information from EEPROM
Yanhong Wang
1
-1
/
+31
2023-07-12
riscv: dts: starfive: Add support eeprom device tree node
Yanhong Wang
2
-0
/
+20
2023-07-12
eeprom: starfive: Enable ID EEPROM configuration
Yanhong Wang
1
-0
/
+13
2023-07-12
riscv: dts: jh7110: Combine the board device tree files of 1.2A and 1.3B
Yanhong Wang
5
-86
/
+26
2023-07-12
riscv: dts: jh7110: Add ethernet device tree nodes
Yanhong Wang
2
-0
/
+103
2023-07-06
riscv: andes_plicsw: Fix IPI during OpenSBI invocation
Yu Chien Peter Lin
1
-3
/
+22
2023-07-06
riscv: dts: sync mpfs-icicle devicetree with linux
Conor Dooley
3
-302
/
+387
2023-07-06
riscv: dts: drop microchip from dts filenames
Conor Dooley
4
-2
/
+2
2023-07-06
riscv: define test_and_{set,clear}_bit in asm/bitops.h
Ben Dooks
1
-0
/
+3
2023-07-06
riscv: implement local_irq_{save,restore} macros
Ben Dooks
1
-4
/
+13
2023-07-06
riscv: add generic link for <asm/atomic.h>
Ben Dooks
1
-0
/
+14
2023-07-06
cmd/sbi: display new extensions
Heinrich Schuchardt
1
-0
/
+9
2023-07-05
Merge tag 'v2023.07-rc6' into next
Tom Rini
1
-3
/
+1
2023-06-27
riscv: Fix alignment of RELA sections in the linker scripts
Bin Meng
1
-3
/
+1
2023-06-20
common: spl: Add spl NVMe boot support
Mayuresh Chitale
1
-0
/
+1
2023-06-12
Merge tag v2023.07-rc4 into next
Tom Rini
1
-1
/
+1
2023-05-31
include: Remove unused header files
Tom Rini
1
-15
/
+0
2023-05-11
dm: Emit the arch_cpu_init_dm() even only before relocation
Simon Glass
1
-1
/
+1
2023-04-20
riscv: Support CONFIG_REMAKE_ELF
Samuel Holland
1
-0
/
+2
2023-04-20
riscv: Update alignment for some sections in linker scripts
Bin Meng
2
-4
/
+4
2023-04-20
riscv: spl: Remove relocation sections
Bin Meng
2
-25
/
+2
2023-04-20
riscv: Avoid updating the link register
Bin Meng
1
-1
/
+1
2023-04-20
riscv: Change to use positive offset to access relocation entries
Bin Meng
1
-12
/
+7
2023-04-20
riscv: Optimize loading relocation type
Bin Meng
1
-1
/
+0
2023-04-20
riscv: Optimize source end address calculation in start.S
Bin Meng
1
-3
/
+1
2023-04-20
riscv: Enforce DWARF4 output
Bin Meng
1
-2
/
+1
2023-04-20
riscv: Correct a comment in io.h
Bin Meng
1
-1
/
+1
2023-04-20
riscv: dts: jh7110: Add initial StarFive VisionFive v2 board device tree
Yanhong Wang
6
-1
/
+483
2023-04-20
riscv: dts: jh7110: Add initial u-boot device tree
Yanhong Wang
1
-0
/
+99
2023-04-20
riscv: dts: jh7110: Add initial StarFive JH7110 device tree
Yanhong Wang
1
-0
/
+573
2023-04-20
board: starfive: Add TARGET_STARFIVE_VISIONFIVE2 to Kconfig
Yanhong Wang
1
-0
/
+5
2023-04-20
riscv: cpu: jh7110: Add Kconfig for StarFive JH7110 SoC
Yanhong Wang
1
-0
/
+28
2023-04-20
riscv: cpu: jh7110: Add support for jh7110 SoC
Yanhong Wang
6
-0
/
+166
2023-03-07
riscv: semihosting: replace inline assembly with assembly file
Andre Przywara
2
-24
/
+22
2023-02-28
Merge tag 'v2023.04-rc3' into next
Tom Rini
14
-265
/
+221
2023-02-17
riscv: binman: Add help message for missing blobs
Rick Chen
1
-0
/
+1
2023-02-17
riscv: Rename Andes cpu and board names
Leo Yu-Chi Liang
7
-5
/
+5
2023-02-17
configs: ae350: Enable v5l2 cache for AE350 platforms in SPL
Yu Chien Peter Lin
1
-0
/
+1
2023-02-17
riscv: ax25: cache.c: Cleanups to L1/L2 cache function used in SPL
Yu Chien Peter Lin
1
-30
/
+68
2023-02-17
riscv: ae350: dts: Update L2 cache compatible string
Yu Chien Peter Lin
2
-2
/
+2
2023-02-17
riscv: cpu: ax25: Simplify cache enabling logic in harts_early_init()
Yu Chien Peter Lin
2
-37
/
+43
2023-02-17
riscv: Remove redundant Kconfig "RISCV_NDS_CACHE"
Leo Yu-Chi Liang
2
-92
/
+2
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