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AgeCommit message (Expand)AuthorFilesLines
2021-01-18riscv: dts: Add device tree for Microchip Icicle KitPadmarao Begari3-0/+436
2021-01-18riscv: Add DMA 64-bit address supportPadmarao Begari2-0/+8
2021-01-06Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into nextTom Rini1-1/+1
2021-01-06Merge tag 'v2021.01-rc5' into nextTom Rini5-12/+87
2021-01-05dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()Simon Glass1-1/+1
2020-12-18riscv: Add device tree bindings for SPISean Anderson2-1/+47
2020-12-18spi: dw: Add SoC-specific compatible stringsSean Anderson1-5/+8
2020-12-14riscv: Complete efi header for RV32/64Leo Yu-Chi Liang1-0/+10
2020-12-14riscv: Fix efi header size for RV32Leo Yu-Chi Liang1-3/+14
2020-12-14riscv: Fix efi header for RV32Atish Patra1-1/+6
2020-12-14riscv: reset after crashHeinrich Schuchardt1-4/+4
2020-12-14riscv: fix the wrong swap value registerBrad Kim1-1/+1
2020-12-14dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass2-2/+2
2020-11-28riscv: sifive/fu540: kconfig: Enable support for Opencores I2C controllerPragnesh Patel1-0/+2
2020-10-26riscv: fu540: dts: Correct reg size of clint nodePragnesh Patel1-1/+1
2020-10-26riscv: Move timer portions of SiFive CLINT to drivers/timerSean Anderson1-39/+2
2020-10-26timer: Add _TIMER suffix to Andes PLMT KconfigSean Anderson1-1/+1
2020-10-26riscv: Move Andes PLMT driver to drivers/timerSean Anderson3-58/+0
2020-10-26riscv: k210: Reduce DMA block sizeSean Anderson1-2/+2
2020-10-26riscv: Only enable OF_BOARD_FIXUP for S-ModeSean Anderson1-1/+1
2020-10-22timer: Return count from timer_ops.get_countSean Anderson2-8/+4
2020-10-08riscv: add DT binding for BOOT button on Maix boardHeinrich Schuchardt1-0/+11
2020-10-08riscv: Add pinmux and gpio bindings for Kendryte K210Sean Anderson2-0/+116
2020-10-05Merge branch 'next'Tom Rini20-168/+189
2020-09-30riscv: Add some comments to start.SSean Anderson1-2/+17
2020-09-30riscv: Ensure gp is NULL or points to valid dataSean Anderson2-4/+27
2020-09-30riscv: Consolidate fences into AMOs for available_harts_lockSean Anderson1-6/+3
2020-09-30riscv: Clear pending IPIs on initializationSean Anderson1-0/+20
2020-09-30riscv: Use a valid bit to ignore already-pending IPIsSean Anderson2-2/+21
2020-09-30riscv: Match memory barriers between send_ipi_many and handle_ipiSean Anderson1-0/+2
2020-09-30Revert "riscv: Clear pending interrupts before enabling IPIs"Sean Anderson1-2/+0
2020-09-30riscv: Update SiFive device tree for new CLINT driverSean Anderson2-2/+10
2020-09-30riscv: Update Kendryte device tree for new CLINT driverSean Anderson1-3/+4
2020-09-30riscv: Rework Sifive CLINT as UCLASS_TIMER driverSean Anderson2-32/+34
2020-09-30riscv: Clean up initialization in Andes PLICSean Anderson1-33/+25
2020-09-30riscv: Rework Andes PLMT as a UCLASS_TIMER driverSean Anderson4-32/+23
2020-09-30riscv: Rework riscv timer driver to only support S-modeSean Anderson6-50/+3
2020-09-28riscv: restore global data pointer in trap handlerHeinrich Schuchardt1-0/+3
2020-09-22fdtdec: optionally add property no-map to created reserved memory nodeEtienne Carriere1-1/+1
2020-09-15riscv: define function set_gd()Heinrich Schuchardt1-0/+9
2020-08-25cmd: provide command sbiHeinrich Schuchardt2-0/+38
2020-08-25riscv: fix building with CONFIG_SPL_SMP=nHeinrich Schuchardt1-1/+1
2020-08-25riscv: fu540: Use correct API to get L2 cache controller base addressBin Meng1-1/+2
2020-08-14riscv: additional crash informationHeinrich Schuchardt1-22/+35
2020-08-14riscv: sifive: fu540: redundant initializationHeinrich Schuchardt1-1/+1
2020-08-14riscv: remove redundant logical constraint.Heinrich Schuchardt1-1/+1
2020-08-14riscv: sifive/fu540: kconfig: Move FU540 driver related options to the SoC levelBin Meng1-0/+22
2020-08-14riscv: sifive/fu540: spl: Rename soc_spl_init()Bin Meng2-2/+2
2020-08-14riscv: Call spl_board_init_f() in the generic SPL board_init_f()Bin Meng2-0/+16
2020-08-04sifive: reset: add DM based reset driver for SiFive SoC'sSagar Shrikant Kadam1-0/+13