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starfive-tech/u-boot.git
Fedora_JH7100_2021.04
Fedora_JH7100_2021.07
Fedora_JH7100_upstream
Fedora_JH7100_upstream_devel
JH7100_Multimedia_V0.1.0
JH7100_VisionFive_OH_dev
JH7100_VisionFive_devel
JH7100_starlight_multimedia
JH7100_upstream
JH7100_upstream_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
master
rtthread_AMP
visionfive_devel
StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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tree
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path:
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/
arch
/
x86
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cpu
/
ivybridge
/
sdram.c
Age
Commit message (
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Author
Files
Lines
2020-08-04
sf: Drop dm.h header file from spi_flash.h
Simon Glass
1
-0
/
+1
2020-05-19
common: Drop log.h from common header
Simon Glass
1
-0
/
+1
2019-12-15
x86: Update mrccache to support multiple caches
Simon Glass
1
-3
/
+5
2019-12-03
common: Move board_get_usable_ram_top() out of common.h
Simon Glass
1
-0
/
+1
2018-07-20
x86: Switch to use DM sysreset driver
Bin Meng
1
-1
/
+2
2018-05-07
SPDX: Convert all of our single license tags to Linux Kernel style
Tom Rini
1
-2
/
+1
2017-08-01
x86: ivybridge: remove unused uma_memory_size
xypron.glpk@gmx.de
1
-5
/
+0
2017-04-05
board_f: Drop setup_dram_config() wrapper
Simon Glass
1
-1
/
+3
2017-02-06
x86: ivybridge: Add more debugging for failures
Simon Glass
1
-9
/
+28
2016-07-12
x86: link: Correct a failure in DRAM init
Simon Glass
1
-0
/
+5
2016-05-23
x86: Unify reserve_arch() for all x86 boards
Bin Meng
1
-5
/
+0
2016-03-17
x86: ivybridge: Convert to use the common SDRAM code
Simon Glass
1
-311
/
+83
2016-03-17
x86: Move Intel Management Engine code to a common place
Simon Glass
1
-1
/
+2
2016-03-17
x86: Create a common header for Intel register access
Simon Glass
1
-1
/
+2
2016-03-15
dm: Use uclass_first_device_err() where it is useful
Simon Glass
1
-3
/
+1
2016-01-24
x86: Set up a shared syscon numbering schema
Simon Glass
1
-3
/
+3
2016-01-24
x86: ivybridge: Convert report_platform to DM PCI API
Simon Glass
1
-1
/
+1
2016-01-24
x86: ivybridge: Convert SDRAM init to use driver model
Simon Glass
1
-7
/
+13
2016-01-24
x86: ivybridge: Convert sdram_initialise() to use DM PCI API
Simon Glass
1
-9
/
+10
2016-01-24
x86: ivybridge: Convert dram_init() to use DM PCI API
Simon Glass
1
-14
/
+25
2015-10-21
x86: ivybridge: Enable the MRC cache
Bin Meng
1
-8
/
+2
2015-10-21
x86: ivybridge: Measure the MRC code execution time
Simon Glass
1
-0
/
+3
2015-10-21
x86: ivybridge: Check the RTC return value
Simon Glass
1
-3
/
+10
2015-10-21
x86: ivybridge: Use 'ret' instead of 'rcode'
Simon Glass
1
-8
/
+8
2015-10-21
x86: ivybridge: Correct two typos for MRC
Bin Meng
1
-2
/
+2
2015-10-21
x86: Use struct mrc_region to describe a mrc region
Bin Meng
1
-1
/
+1
2015-10-21
x86: ivybridge: Use APIs provided in the mrccache lib
Bin Meng
1
-108
/
+4
2015-10-21
x86: Move mrccache.[c|h] to a common place
Bin Meng
1
-1
/
+1
2015-07-28
x86: Enable DM RTC support for all x86 boards
Bin Meng
1
-8
/
+24
2015-04-30
x86: ivybridge: Use reset_cpu()
Simon Glass
1
-2
/
+1
2015-04-18
dm: x86: spi: Convert ICH SPI driver to driver model
Simon Glass
1
-7
/
+10
2015-04-17
x86: Add a x86_ prefix to the x86-specific PCI functions
Simon Glass
1
-10
/
+10
2015-02-06
x86: Rename MMCONF_BASE_ADDRESS and make it common across x86
Simon Glass
1
-1
/
+1
2015-01-24
x86: Implement a cache for Memory Reference Code parameters
Simon Glass
1
-0
/
+253
2015-01-13
x86: ivybridge: Request MTRRs for DRAM regions
Simon Glass
1
-0
/
+10
2014-12-19
x86: Use consistent name XXX_ADDR for binary blob flash address
Bin Meng
1
-1
/
+1
2014-11-21
x86: ivybridge: Implement SDRAM init
Simon Glass
1
-1
/
+552
2014-11-21
x86: Add chromebook_link board
Simon Glass
1
-0
/
+20